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JPS56129349A - Method of manufacturing airtight terminal - Google Patents

Method of manufacturing airtight terminal

Info

Publication number
JPS56129349A
JPS56129349A JP3292680A JP3292680A JPS56129349A JP S56129349 A JPS56129349 A JP S56129349A JP 3292680 A JP3292680 A JP 3292680A JP 3292680 A JP3292680 A JP 3292680A JP S56129349 A JPS56129349 A JP S56129349A
Authority
JP
Japan
Prior art keywords
lead wire
plating
plated
base plate
glass sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3292680A
Other languages
Japanese (ja)
Other versions
JPS6041860B2 (en
Inventor
Junichi Okada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP3292680A priority Critical patent/JPS6041860B2/en
Publication of JPS56129349A publication Critical patent/JPS56129349A/en
Publication of JPS6041860B2 publication Critical patent/JPS6041860B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Connections Arranged To Contact A Plurality Of Conductors (AREA)
  • Manufacturing Of Electrical Connectors (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

PURPOSE:To effect the plating work with ease and eliminate the fear of oxidation by a method wherein a lead wire with an Ni plated coating is fixed with glass sealing to a metal outer ring which is not yet subjected to plating treatment, and then Ni plating is effected on the metal outer ring. CONSTITUTION:All over the surface of a lead wire 5 is covered with an electrically plated Ni coating. Then, this lead wire 5 is fixed with glass sealing to a stem base plate 1 to which a heat sink 3 is fastened and which is not yet subjected to plating treatment. After removing an oxidated film on the exposed surface of the base plate 1, an electrically plated Ni layer 9 is formed. This forming of the plated layer 9 can be easily conducted by using a racking method with the aid of mounting holes 2 in the base plate 1. Also, since the plating is effected after the glass sealing of the lead wire 5, a thickness of the plated layer is freely determined and the fear of oxidation on the surface is eliminated.
JP3292680A 1980-03-14 1980-03-14 Manufacturing method for airtight terminals Expired JPS6041860B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3292680A JPS6041860B2 (en) 1980-03-14 1980-03-14 Manufacturing method for airtight terminals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3292680A JPS6041860B2 (en) 1980-03-14 1980-03-14 Manufacturing method for airtight terminals

Publications (2)

Publication Number Publication Date
JPS56129349A true JPS56129349A (en) 1981-10-09
JPS6041860B2 JPS6041860B2 (en) 1985-09-19

Family

ID=12372506

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3292680A Expired JPS6041860B2 (en) 1980-03-14 1980-03-14 Manufacturing method for airtight terminals

Country Status (1)

Country Link
JP (1) JPS6041860B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS577951A (en) * 1980-06-18 1982-01-16 Toshiba Component Kk Manufacture of stem for semiconductor device needing no whole surface finishing nickel plating process

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62133165U (en) * 1986-02-12 1987-08-22
JPH029620A (en) * 1988-06-29 1990-01-12 Polyplastics Co Metal insert method to thermoplastic resin molded product and metal insert applied molded product

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS577951A (en) * 1980-06-18 1982-01-16 Toshiba Component Kk Manufacture of stem for semiconductor device needing no whole surface finishing nickel plating process

Also Published As

Publication number Publication date
JPS6041860B2 (en) 1985-09-19

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