[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

CN107742643B - Method for improving linearity of AlGaN/GaN heterojunction field effect transistor - Google Patents

Method for improving linearity of AlGaN/GaN heterojunction field effect transistor Download PDF

Info

Publication number
CN107742643B
CN107742643B CN201710930227.XA CN201710930227A CN107742643B CN 107742643 B CN107742643 B CN 107742643B CN 201710930227 A CN201710930227 A CN 201710930227A CN 107742643 B CN107742643 B CN 107742643B
Authority
CN
China
Prior art keywords
algan
gate
barrier layer
increasing
polarization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710930227.XA
Other languages
Chinese (zh)
Other versions
CN107742643A (en
Inventor
林兆军
崔鹏
吕元杰
杨铭
付晨
杨勇雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shandong University
Original Assignee
Shandong University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shandong University filed Critical Shandong University
Priority to CN201710930227.XA priority Critical patent/CN107742643B/en
Publication of CN107742643A publication Critical patent/CN107742643A/en
Application granted granted Critical
Publication of CN107742643B publication Critical patent/CN107742643B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

Compared with the traditional method for improving the linearity of a device by utilizing an external circuit, the method for improving the linearity of the AlGaN/GaN heterojunction field effect transistor increases polarization coulomb field scattering to a certain extent, enhances the offset effect of the polarization coulomb field scattering on polarization optical phonon scattering, and leads R to be more stableSThe method has smaller variation, thereby achieving the final purpose of improving the linearity of the device, and having the characteristics of simplicity, directness, strong operability, high integration level and the like.

Description

Method for improving linearity of AlGaN/GaN heterojunction field effect transistor
Technical Field
The invention relates to a method for improving linearity of an AlGaN/GaN heterojunction field effect transistor, belonging to the technical field of microelectronic research.
Background
The wireless communication network is one of the most important bases of the information technology in the 21 st century, the next generation of mobile broadband wireless communication needs high-frequency and high-power solid-state electronic devices, and the GaN material has a wide band gap and a high saturated electron drift velocity, so that AlGaN/GaN-based Heterojunction Field Effect Transistors (HFETs) become the most potential candidates of radio-frequency power electronic devices. Linearity is a key indicator in radio frequency applications such as wireless base stations, satellite communications, radar, and the like. At present, the linear distortion problem of AlGaN/GaNHFETs seriously restricts the full play of the advantages thereof, and becomes a non-negligible problem in the field of radio frequency application. Common methods for improving linearity, such as digital predistortion, envelope tracking offset control, and the like, all adopt the form of an external circuit. On one hand, the integration level of the device is influenced by the existence of external circuits; on the other hand, the power consumption and the reaction time of the device are also increased. Therefore, it is very urgent and important to develop a method capable of improving linearity from a device level, such as changing a material structure or a device structure.
Disclosure of Invention
In order to overcome the defects and shortcomings of the existing method, the invention provides a method for improving linearity of an AlGaN/GaN heterojunction field effect transistor.
Summary of the invention:
in the AlGaN/GaN heterojunction field effect transistor, the linearity of the device represents the relevance of the input and the output of the device, and is closely related to the transconductance of the device. Transconductance is the differential ratio of the output current of the drain terminal of the device to the input voltage of the gate, and directly determines the linearity of the device along with the change of gate bias voltage. Based on gm=1/(1/gm0+RS) This formula, where gmIs the unit gate width transconductance of the device, gm0The intrinsic transconductance is the unit gate width of the device, and is the intrinsic property of the device and cannot be changed; rSIs the unit gate width parasitic source on-resistance, which is related to the scattering experienced by electrons in the gate source channel. We have found that R is reducedSWith the change of the gate bias voltage, g can be effectively reducedmThe linearity of the device is improved along with the change of the grid bias voltage.
Parasitic source-side on-resistance refers to the resistance in the gate-source channel, which is determined by the scattering experienced by electrons in the gate-source channel region. Wherein the Polarization Optical Phonon (POP) scattering and Polarization Coulomb Field (PCF) scattering suffered by the gate-source channel resistance can change along with the change of the gate bias voltage, thereby affecting RSIs changed. During device operation, a negative gate bias voltage is generally selected as a quiescent operating point. In the negative bias range, the polarized optical phonon scattering will increase as the gate bias increases from negative bias to zero; and the polarization coulomb field scattering, in contrast, decreases with increasing gate bias. Polarization optical phonon scattering is the strongest scattering mechanism in AlGaN/GaN heterojunction field effect transistors due to the small mass of nitrogen atoms, and it is difficult to change its scattering strength because it is closely related to electron temperature. However, polarization coulomb field scattering, which is a unique scattering mechanism in AlGaN/GaN heterojunction field effect transistors, is closely related to the material and structure of the device.
Polarization coulomb field scattering, arises from the polarization charge that is not uniformly distributed at the AlGaN/GaN heterojunction interface. Due to spontaneous polarization and piezoelectric polarization of the AlGaN barrier layer, uniformly distributed polarization charges are generated at the AlGaN/GaN heterojunction material interface. This uniform distribution of polarization charges can be altered when device processing or gate biasing is applied, thereby introducing additional scattering potential associated with the non-uniform distribution of polarization charges. These non-uniformly distributed polarization charges scatter channel carriers, resulting in the formation of polarized coulomb field scattering. Wherein the difference between the non-uniformly distributed polarization charges and the uniformly distributed polarization charges is referred to as additional polarization charges. With the change of the grid bias voltage, the polarization charge of the area under the grid can change due to the inverse piezoelectric effect, and the additional polarization charge delta sigma is obtained by the following formula:
Figure BDA0001428553520000031
wherein, VGIs a gate bias voltage, dAlGaNIs the thickness of the barrier layer; e.g. of the type33And C33Respectively, the piezoelectric coefficient and the elastic rigidity tensor of the AlGaN barrier layer, e33And C33In relation to the Al composition of the AlGaN barrier layer, it is obtained according to the following formula:
e33=(0.73x+0.73)C/m2(2)
C33=(-32x+405)GPa (3)
wherein x is Al component of AlGaN barrier layer, m represents unit length meter, GPa is elastic constant unit, C/m2Is a piezoelectric coefficient unit.
In summary, in the negative bias range, the larger the additional polarization charge Δ σ, the stronger the polarization coulomb field scattering: as the gate bias increases (from negative to zero), its VGThe absolute value of (a) is reduced and the value of the additional polarization charge is smaller, so that the polarization coulomb field scattering is reduced. This reduced polarized coulomb field scattering will offset to some extent the increased polarized optical phonon scattering, thereby reducing RSA change in (c). Therefore, the invention utilizes the principle to optimize the design of device materials and structures and increases the polarization library to a certain extentLomb field scattering, which enhances its cancellation of polarized optical phonon scattering, will cause R to beSHas smaller variation, thereby achieving the final purpose of improving the linearity of the device.
The technical scheme of the invention is as follows:
a method for improving linearity of AlGaN/GaN heterojunction field effect transistor is disclosed, which is as following formula (1), (2) and (3):
Figure BDA0001428553520000032
in the formula (1), VGIs a gate bias voltage, dAlGaNIs the thickness of the barrier layer; e.g. of the type33And C33Respectively, the piezoelectric coefficient and the elastic rigidity tensor of the AlGaN barrier layer, e33And C33In relation to the Al composition of the AlGaN barrier layer, it is obtained according to the following formula:
e33=(0.73x+0.73)C/m2(2)
C33=(-32x+405)GPa (3)
in the formulas (2) and (3), x is the Al component of the AlGaN barrier layer, m represents the unit length meter, GPa is the unit of elastic constant, C/m2Is a piezoelectric coefficient unit;
by increasing the value of the additional polarization charge Δ σ, the polarization coulomb field scattering is increased.
According to a preferred embodiment of the present invention, the specific method of increasing the value of the additional polarization charge Δ σ comprises: by using AlxGa1-xThe N barrier layer is thin, the AlxGa1-xVariation range of Al composition in the N barrier layer: x is more than or equal to 0.15 and less than or equal to 0.35, AlxGa1-xThickness variation range of the N barrier layer: 10nm to 35 nm. Al (Al)xGa1-xThe thickness of the N barrier layer is related to the Al composition, the higher the Al compositionxGa1-xThe smaller the allowable thickness of the N-barrier layer, the range of variation of Al composition in general: x is more than or equal to 0.15 and less than or equal to 0.35, AlxGa1-xThickness variation range of the N barrier layer: 10nm to 35nm, for Al with a defined Al compositionxGa1-xN barrier layer of thickness not affecting the gateThe smaller the electron gas concentration, the better. From the formula (1), when the AlGaN barrier layer thickness is small, d isAlGaNIn the hour, the value of the additional polarization charge Δ σ is increased, effectively increasing the polarization coulomb field scattering.
According to a preferred embodiment of the present invention, the specific method of increasing the value of the additional polarization charge Δ σ comprises: the AlGaN barrier layer under the gate is etched through a gate trench digging process. Reducing the thickness d of the AlGaN barrier layerAlGaNAnd the additional polarization charge under the grid is increased, so that the polarization coulomb field scattering is enhanced.
According to a preferred embodiment of the present invention, the specific method of increasing the value of the additional polarization charge Δ σ comprises: the AlGaN/GaN heterostructure material with high Al component is adopted, and the high Al component range is as follows: 15 to 35 percent. The AlGaN/GaN heterostructure material with high Al component is selected, so that the larger the AlGaN barrier layer is, the better the AlGaN barrier layer is on the premise of not causing strain relaxation, and the formulas (1), (2) and (3) show that when the Al component is increased, the piezoelectric coefficient e of the AlGaN barrier layer is33Increase, elastic stiffness tensor C33The decrease results in an increase in the magnitude of the additional polarization charge, which effectively increases the polarization coulomb field scattering.
According to the preferred method of the invention, the method for improving the linearity of the AlGaN/GaN heterojunction field effect transistor comprises the step of increasing the total amount of additional polarization charges under a grid, thereby increasing polarization Coulomb field scattering.
According to the invention, the specific method for increasing the total amount of the under-gate additional polarization charges comprises the following steps: by increasing the ratio of gate length to gate-source length, the ratio of gate length to gate-source length is > 0.5. The gate length is the length of a Schottky gate electrode of the AlGaN/GaN heterojunction field effect transistor; the length of the grid source is the distance between the grid electrode and the source electrode of the AlGaN/GaN heterojunction field effect transistor. By designing a device structure with a large ratio of gate length to gate-source length, more additional polarization charges can be generated under the gate and act on electrons in a smaller gate-source channel range, so that the effect of the additional polarization charges under the gate on the gate-source channel electrons is enhanced, and the polarization Coulomb field scattering is enhanced.
According to the inventionPreferably, the specific method for increasing the total amount of the additional polarization charges comprises: by increasing the gate width length. On the premise of meeting the parameter requirements of the device, the larger the size is, the better the size is, the total amount of the additional polarization charges under the grid can be increased, so that the scattering effect of the additional polarization charges under the grid on grid source channel electrons is increased, and the R of the polarization Coulomb field scattering pair is improvedSThe effect of (c).
According to the preferable method, the method for improving the linearity of the AlGaN/GaN heterojunction field effect transistor comprises the step of adopting a back barrier layer structure, so that the polarization Coulomb field scattering is increased.
According to the invention, the back barrier structure preferably adopts a thin GaN channel layer, and an AlGaN back barrier layer is grown under the GaN channel layer.
Preferably, according to the present invention, the thin GaN channel layer has a thickness of 10-20 nm. Due to the existence of the AlGaN back barrier layer, the limitation effect on the two-dimensional electron gas in the GaN channel is enhanced, so that the two-dimensional electron gas is closer to an AlGaN/GaN interface, the distance between the polarization charge at the interface and the two-dimensional electron gas is closer, the effect of the additional polarization charge on the two-dimensional electron gas is enhanced, and the polarization Coulomb field scattering enhancement is further enhanced.
Drawings
FIG. 1 shows the output power (P) of two devices in an embodiment of the present inventionOUT) Gain (G)T) And additional power efficiency (PAE) with input power (P)OUT) Graph of the variation of (c).
Detailed Description
The invention is further described below, but not limited thereto, with reference to the following examples and the accompanying drawings.
Examples 1,
A method for improving linearity of AlGaN/GaN heterojunction field effect transistor is disclosed, which is as following formula (1), (2) and (3):
Figure BDA0001428553520000061
in the formula (1), VGIs a gate bias voltage, dAlGaNIs the thickness of the barrier layer;e33and C33Respectively, the piezoelectric coefficient and the elastic rigidity tensor of the AlGaN barrier layer, e33And C33In relation to the Al composition of the AlGaN barrier layer, it is obtained according to the following formula:
e33=(0.73x+0.73)C/m2(2)
C33=(-32x+405)GPa (3)
in the formulas (2) and (3), x is the Al component of the AlGaN barrier layer, m represents the unit length meter, GPa is the unit of elastic constant, C/m2Is a piezoelectric coefficient unit;
by increasing the value of the additional polarization charge Δ σ, the polarization coulomb field scattering is increased.
Examples 2,
The method according to embodiment 1, wherein the specific method for increasing the value of the additional polarization charge Δ σ includes: by using AlxGa1-xThe N barrier layer is thin, the AlxGa1-xVariation range of Al composition in the N barrier layer: x is more than or equal to 0.15 and less than or equal to 0.35, AlxGa1-xThickness variation range of the N barrier layer: 10nm to 35 nm.
Examples 3,
The method according to embodiment 1, wherein the specific method for increasing the value of the additional polarization charge Δ σ includes: the AlGaN barrier layer under the gate is etched through a gate trench digging process.
Examples 4,
The method according to embodiment 1, wherein the specific method for increasing the value of the additional polarization charge Δ σ includes: the AlGaN/GaN heterostructure material with high Al component is adopted, and the high Al component range is as follows: 15 to 35 percent.
Examples 5,
The method of embodiment 1, wherein the method of improving linearity of the AlGaN/GaN heterojunction field effect transistor is different from the method of embodiment 1, and comprises increasing polarization coulomb field scattering by increasing the total amount of polarization charge under the gate.
Examples 6,
The method of embodiment 5, wherein the specific method for increasing the total amount of under-gate additional polarization charges comprises: by increasing the ratio of gate length to gate-source length, the ratio of gate length to gate-source length is > 0.5.
Example 7,
The method for improving linearity of the AlGaN/GaN heterojunction field effect transistor according to embodiment 5, wherein the specific method for increasing the total amount of the additional polarization charges includes: by increasing the gate width length.
Example 8,
The method for improving linearity of the AlGaN/GaN heterojunction field effect transistor in embodiment 1 is different from the method for improving linearity of the AlGaN/GaN heterojunction field effect transistor in that a back barrier layer structure is adopted, so that polarization Coulomb field scattering is increased.
Examples 9,
The method of embodiment 8, wherein the difference between the method of improving linearity of the AlGaN/GaN heterojunction field effect transistor is that a thin GaN channel layer is used and an AlGaN back barrier layer is grown under the GaN channel layer.
The thickness of the thin GaN channel layer is 10-20 nm.
Comparative application examples,
The method for improving linearity of the AlGaN/GaN heterojunction field effect transistor device according to embodiment 7, wherein two AlGaN/GaN heterojunction field effect transistors with different gate widths are selected, polarization optical phonon scattering and polarization coulomb field scattering are combined, and R of the AlGaN/GaN heterojunction field effect transistors is analyzedSThe change of the linearity of the device is compared, and finally the feasibility of the method that the linearity of the device can be effectively improved by improving the gate width is verified through actually testing the linearity of the two devices.
Two AlGaN/GaN heterojunction field effect transistor devices with different gate widths (the gate widths are 546 mu m and 780 mu m respectively) are selected, and the material structure and the device structure are consistent except for different gate widths.
In the AlGaN/GaN heterojunction field effect transistor, the linearity of the device represents the relevance of the input and the output of the device, and is closely related to the transconductance of the device. Transconductance is the differential ratio of the output current of the drain terminal of the device to the input voltage of the gate, and directly determines the linearity of the device along with the change of gate bias voltage. Based on gm=1/(1/gm0+RS) This formula, where gmIs the unit gate width intrinsic transconductance of the device, gm0The intrinsic transconductance is unit gate width, and the two devices have the same material structure and device structure except different gate widths, so the intrinsic transconductance g is unitm0The consistency is achieved; rSIs the unit gate width parasitic source on-resistance, which is related to the scattering experienced by electrons in the gate source channel. We have found that R is reducedSG can be effectively reduced along with the change of the grid bias voltagemThe linearity of the device is improved along with the change of the grid bias voltage.
Parasitic source-side on-resistance refers to the resistance in the gate-source channel, which is determined by the scattering experienced by electrons in the gate-source channel region. Wherein the Polarization Optical Phonon (POP) scattering and Polarization Coulomb Field (PCF) scattering suffered by the gate-source channel resistance can change along with the change of the gate bias voltage, thereby affecting RSA change in (c). During device operation, a negative gate bias voltage is generally selected as a quiescent operating point. In the negative bias range, the polarized optical phonon scattering will increase as the gate bias increases from negative bias to zero; and the polarization coulomb field scattering, in contrast, decreases with increasing gate bias. Polarization optical phonon scattering is the strongest scattering mechanism in AlGaN/GaN heterojunction field effect transistors due to the small mass of nitrogen atoms, and it is difficult to change its scattering strength because it is closely related to electron temperature. However, polarization coulomb field scattering, which is a unique scattering mechanism in AlGaN/GaN heterojunction field effect transistors, is closely related to the material and structure of the device.
Polarization coulomb field scattering, arises from the polarization charge that is not uniformly distributed at the AlGaN/GaN heterojunction interface. Due to spontaneous polarization and piezoelectric polarization of the AlGaN barrier layer, uniformly distributed polarization charges are generated at the AlGaN/GaN heterojunction material interface. This uniform distribution of polarization charges can be altered when device processing or gate biasing is applied, thereby introducing additional scattering potential associated with the non-uniform distribution of polarization charges. These non-uniformly distributed polarization charges scatter channel carriers, resulting in the formation of polarized coulomb field scattering. Wherein the difference between the non-uniformly distributed polarization charges and the uniformly distributed polarization charges is referred to as additional polarization charges. With the change of the gate bias voltage, the polarization charge in the region under the gate changes due to the inverse piezoelectric effect, and the additional polarization charge Δ σ can be obtained by the following formula:
Figure BDA0001428553520000091
wherein e33And C33Piezoelectric coefficient and elastic rigidity tensor, V, of AlGaN barrier layerGIs a gate bias voltage, dAlGaNThe thickness of the barrier layer. In the negative bias range, the greater the additional polarization charge, the greater Δ σ, and the stronger the polarization coulomb field scattering. From the above equation, as the gate bias increases (from negative to zero), its V isGThe absolute value of (a) is reduced and the value of the additional polarization charge is smaller, so that the polarization coulomb field scattering is reduced. This reduced polarized coulomb field scattering will offset the increased polarized optical phonon scattering to some extent, causing R toSIs reduced, thereby improving device linearity.
For a device with a large gate width, the total amount of additional polarization charges under the gate is large, and the effect on electrons of a gate-source channel is strong, so that the polarization Coulomb field scattering on the on-resistance of a unit gate width parasitic source end is strong. R of device due to large gate widthSThe scattering of the received polarized coulomb field is strong, and the counteraction effect on the polarized optical phonon scattering is strong, so that R isSThe amount of change of (c) is smaller, resulting in a better linearity of the device.
In order to verify the effectiveness of the method of the invention, experimental tests are respectively carried out on the linearity of two devices: a single-frequency continuous wave signal of 2.7GHz is adopted, and the radio frequency power characteristic of the device is tested under the conditions that the voltage of a drain terminal is 20V and the grid bias voltage is-1V and the input and the output are matched.
Two devices output power (P)OUT) Gain (Gain) and Power Added Efficiency (PAE) with input power (P)OUT) The variation curve of (2) is shown in fig. 1, and it is obvious that the gain of the device with large gate width changes more slowly compared with the device with small gate width, which indicates that the device with large gate width has better linearity. And, comparing 1-dB compression point input power (P)IN_1dB) It can be found that the device (P) has a large gate widthIN_1dB=5.57×10-2W/mm) much larger than the device (P) with small gate widthIN_1dB=2.24×10-2W/mm) and the 1-dB compression point input power for devices with large gate widths is 2.5 times that of devices with small gate widths. Therefore, the linearity of the device with large gate width is improved obviously, and the experimental angle proves that the polarization coulomb field scattering can be increased by increasing the gate width, so that the linearity of the device is improved.

Claims (9)

1. A method for improving linearity of AlGaN/GaN heterojunction field effect transistor is characterized in that the method is as follows formula (1), (2), (3):
Figure FDA0002247617650000011
in the formula (1), VGIs a gate bias voltage, dAlGaNIs the thickness of the barrier layer; e.g. of the type33And C33Respectively, the piezoelectric coefficient and the elastic rigidity tensor of the AlGaN barrier layer, e33And C33In relation to the Al composition of the AlGaN barrier layer, it is obtained according to the following formula:
e33=(0.73x+0.73)C/m2(2)
C33=(-32x+405)GPa (3)
in the formulas (2) and (3), x is the Al composition of the AlGaN barrier layer, and m representsUnit length meter, GPa is elastic constant unit, C/m2Is a piezoelectric coefficient unit;
by increasing the value of the additional polarization charge Δ σ, the polarization coulomb field scattering is increased.
2. The method of claim 1, wherein the specific method for increasing the value of the additional polarization charge Δ σ comprises: by using AlxGa1-xThe N barrier layer is thin, the AlxGa1-xVariation range of Al composition in the N barrier layer: x is more than or equal to 0.15 and less than or equal to 0.35, AlxGa1-xThickness variation range of the N barrier layer: 10nm to 35 nm.
3. The method of claim 1, wherein the specific method for increasing the value of the additional polarization charge Δ σ comprises: the AlGaN barrier layer under the gate is etched through a gate trench digging process.
4. The method of claim 1, wherein the specific method for increasing the value of the additional polarization charge Δ σ comprises: the AlGaN/GaN heterostructure material with high Al component is adopted, and the high Al component range is as follows: 15 to 35 percent.
5. The method of claim 1, wherein the method comprises increasing polarization coulomb field scattering by increasing the amount of additional polarization charge under the gate.
6. The method of claim 5, wherein the specific method for increasing the total amount of under-gate additional polarization charges comprises: by increasing the ratio of gate length to gate-source length, the ratio of gate length to gate-source length is > 0.5.
7. The method of claim 5, wherein the specific method for increasing the total amount of the additional polarization charges comprises: by increasing the gate width length.
8. The method of claim 1, wherein the method of improving linearity of the AlGaN/GaN heterojunction field effect transistor comprises using a back barrier layer structure to increase polarization Coulomb field scattering.
9. The method of claim 8, wherein the back barrier structure is formed by using a thin GaN channel layer and growing an AlGaN back barrier layer under the GaN channel layer;
the thickness of the thin GaN channel layer is 10-20 nm.
CN201710930227.XA 2017-10-09 2017-10-09 Method for improving linearity of AlGaN/GaN heterojunction field effect transistor Active CN107742643B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710930227.XA CN107742643B (en) 2017-10-09 2017-10-09 Method for improving linearity of AlGaN/GaN heterojunction field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710930227.XA CN107742643B (en) 2017-10-09 2017-10-09 Method for improving linearity of AlGaN/GaN heterojunction field effect transistor

Publications (2)

Publication Number Publication Date
CN107742643A CN107742643A (en) 2018-02-27
CN107742643B true CN107742643B (en) 2020-04-17

Family

ID=61236737

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710930227.XA Active CN107742643B (en) 2017-10-09 2017-10-09 Method for improving linearity of AlGaN/GaN heterojunction field effect transistor

Country Status (1)

Country Link
CN (1) CN107742643B (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001284576A (en) * 2000-03-30 2001-10-12 Toshiba Corp High electron mobility transistor and method of manufacturing the same
CN103673866B (en) * 2013-12-13 2016-03-09 山东大学 Determine the method that GaN HFET grid lower barrierlayer strains
CN107017293A (en) * 2017-04-14 2017-08-04 西安电子科技大学 A kind of AlGaN/GaN HFETs with dual recess AlGaN potential barrier

Also Published As

Publication number Publication date
CN107742643A (en) 2018-02-27

Similar Documents

Publication Publication Date Title
US20050133816A1 (en) III-nitride quantum-well field effect transistors
Hamza et al. Highly scaled graded channel GaN HEMT with peak drain current of 2.48 A/mm
Xing et al. Planar-nanostrip-channel InAlN/GaN HEMTs on Si With Improved ${g} _ {{m}} $ and ${f} _ {\textsf {T}} $ linearity
EP3491672B1 (en) High electron mobility transistor with tunable threshold voltage
CN111868931B (en) Highly scaled linear GaN HEMT structure
Hou et al. High linearity and high power performance with barrier layer of sandwich structure and Al0. 05GaN back barrier for X-band application
Fang et al. AlGaN/GaN polarization-doped field-effect transistors with graded heterostructure
Purnachandra Rao et al. Comparative study of III-Nitride Nano-HEMTs on different substrates for emerging high-power nanoelectronics and millimetre wave applications
Mounika et al. Investigation on effect of AlN barrier thickness and lateral scalability of Fe-doped recessed T-gate AlN/GaN/SiC HEMT with polarization-graded back barrier for future RF electronic applications
Singh et al. Design and simulation of T‐gate AlN/β‐Ga2O3 HEMT for DC, RF and high‐power nanoelectronics switching applications
Park et al. Terahertz In 0.8 Ga 0.2 As quantum-well HEMTs toward 6G applications
Lin et al. A $\delta $-Doped InGaP/InGaAs pHEMT With Different Doping Profiles for Device-Linearity Improvement
Lv et al. High‐frequency AlGaN/GaN HFETs with fT/fmax of 149/263 GHz for D‐band PA applications
CN107742643B (en) Method for improving linearity of AlGaN/GaN heterojunction field effect transistor
CN109524462B (en) Fin type field effect transistor
Chiu et al. The improvement of device linearity in AlGaN/GaN HEMTs at millimeter-wave frequencies using dual-gate configuration
Geng et al. Analysis of InGaN back-barrier on linearity and RF performance in a graded-channel HEMT
Aggarwal et al. Improved linearity performance of AlGaN/GaN MISHFET over conventional HFETs: An optimization study for wireless infrastructure applications
Trew et al. The physics of reliability for high voltage AlGaN/GaN HFET's
Peng et al. Effects of the Fe-doped GaN buffer in AlGaN/GaN HEMTs on SiC substrate
Lin et al. Linearity enhancement and noise reduction in a passivated AlGaAs/InGaAs/GaAs high-electron mobility transistor
Li et al. Nonlinear Capacitance Compensation Method for Integrating a Metal–Semiconductor–Metal Varactor with a Gallium Nitride High Electron Mobility Transistor Power Amplifier
Singh et al. TCAD Investigation for Dual-Gate MISHEMT with Improved Linearity and Current Collapse for LNAs
Chauhan et al. Rf/analog and linearity performance of field-plate engineered AlN/β-Ga2O3 MOSHEMT for high power and microwave applications
Li et al. Improved characteristics of metamorphic InAlAs∕ InGaAs high electron mobility transistor with symmetric graded InxGa1− xAs channel

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant