JPS6437852A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6437852A JPS6437852A JP19486287A JP19486287A JPS6437852A JP S6437852 A JPS6437852 A JP S6437852A JP 19486287 A JP19486287 A JP 19486287A JP 19486287 A JP19486287 A JP 19486287A JP S6437852 A JPS6437852 A JP S6437852A
- Authority
- JP
- Japan
- Prior art keywords
- film
- inter
- layer
- films
- deposited
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Local Oxidation Of Silicon (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19486287A JPS6437852A (en) | 1987-08-04 | 1987-08-04 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19486287A JPS6437852A (en) | 1987-08-04 | 1987-08-04 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6437852A true JPS6437852A (en) | 1989-02-08 |
Family
ID=16331529
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19486287A Pending JPS6437852A (en) | 1987-08-04 | 1987-08-04 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6437852A (ja) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4981810A (en) * | 1990-02-16 | 1991-01-01 | Micron Technology, Inc. | Process for creating field effect transistors having reduced-slope, staircase-profile sidewall spacers |
US5019527A (en) * | 1989-08-11 | 1991-05-28 | Kabushiki Kaisha Toshiba | Method of manufacturing non-volatile semiconductor memories, in which selective removal of field oxidation film for forming source region and self-adjusted treatment for forming contact portion are simultaneously performed |
US5202277A (en) * | 1989-12-08 | 1993-04-13 | Matsushita Electric Industrial Co., Ltd. | Method of fabricating a semiconductor device |
US5221635A (en) * | 1991-12-17 | 1993-06-22 | Texas Instruments Incorporated | Method of making a field-effect transistor |
JPH05160272A (ja) * | 1991-12-04 | 1993-06-25 | Nec Corp | 半導体装置の製造方法 |
US5679589A (en) * | 1989-10-17 | 1997-10-21 | Lucent Technologies Inc. | FET with gate spacer |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61100936A (ja) * | 1984-10-23 | 1986-05-19 | Pioneer Electronic Corp | 半導体装置の製造方法 |
-
1987
- 1987-08-04 JP JP19486287A patent/JPS6437852A/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61100936A (ja) * | 1984-10-23 | 1986-05-19 | Pioneer Electronic Corp | 半導体装置の製造方法 |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5019527A (en) * | 1989-08-11 | 1991-05-28 | Kabushiki Kaisha Toshiba | Method of manufacturing non-volatile semiconductor memories, in which selective removal of field oxidation film for forming source region and self-adjusted treatment for forming contact portion are simultaneously performed |
US5679589A (en) * | 1989-10-17 | 1997-10-21 | Lucent Technologies Inc. | FET with gate spacer |
US5202277A (en) * | 1989-12-08 | 1993-04-13 | Matsushita Electric Industrial Co., Ltd. | Method of fabricating a semiconductor device |
US4981810A (en) * | 1990-02-16 | 1991-01-01 | Micron Technology, Inc. | Process for creating field effect transistors having reduced-slope, staircase-profile sidewall spacers |
JPH05160272A (ja) * | 1991-12-04 | 1993-06-25 | Nec Corp | 半導体装置の製造方法 |
US5221635A (en) * | 1991-12-17 | 1993-06-22 | Texas Instruments Incorporated | Method of making a field-effect transistor |
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