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JPS6423554A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS6423554A
JPS6423554A JP62178977A JP17897787A JPS6423554A JP S6423554 A JPS6423554 A JP S6423554A JP 62178977 A JP62178977 A JP 62178977A JP 17897787 A JP17897787 A JP 17897787A JP S6423554 A JPS6423554 A JP S6423554A
Authority
JP
Japan
Prior art keywords
conductive layer
layer
connection hole
tungsten
metallic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62178977A
Other languages
Japanese (ja)
Other versions
JPH0680665B2 (en
Inventor
Chisato Hashimoto
Katsuyuki Machida
Hideo Oikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP62178977A priority Critical patent/JPH0680665B2/en
Priority to EP88111550A priority patent/EP0300414B1/en
Priority to DE3851802T priority patent/DE3851802T2/en
Priority to KR1019880008981A priority patent/KR920002863B1/en
Publication of JPS6423554A publication Critical patent/JPS6423554A/en
Priority to US08/101,780 priority patent/US5320979A/en
Publication of JPH0680665B2 publication Critical patent/JPH0680665B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To retain a fine connection hole and to improve production yield and reliability, by opening the connection hole in an insulation layer formed on a first conductive layer and forming a metallic column on the first conductive layer inside the connection hole and forming a second conductive layer connected with the metallic column and next by tapering sidewalls of the connection hole. CONSTITUTION:An SiO2 layer 12 is formed on an Si substrate (a first conductive layer) 11, and a contact hole 13 is opened. Next, tungsten 14 is made to selectively grow as a metallic column. Sidewalls of the contact hole 13 are tapered 13 with starting points where the side walls contact with an upper plane of the tungsten. Namely, selective sputter etching by oxygen ions is used to form tapered parts 16 on the side. walls of the contact hole 13. Since the tungsten 14 is not etched accordingly, the positions of the points 15 are not varied. Therefore accompanied by slight decrease in film thickness of the SiO2 layer 12 on a flat plane, an angle theta of the tapered part 16 is only changed from 90 deg. into 0 deg.. The angle theta of the tapered part 16 is thus determined. After the sticking of a metallic layer, a wiring layer 17 is formed as a second conductive layer by lithography and etching.
JP62178977A 1987-07-20 1987-07-20 Method for manufacturing semiconductor device Expired - Fee Related JPH0680665B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP62178977A JPH0680665B2 (en) 1987-07-20 1987-07-20 Method for manufacturing semiconductor device
EP88111550A EP0300414B1 (en) 1987-07-20 1988-07-18 Method of connecting wirings through connection hole
DE3851802T DE3851802T2 (en) 1987-07-20 1988-07-18 Method of connecting lines through connection holes.
KR1019880008981A KR920002863B1 (en) 1987-07-20 1988-07-19 Wire contecting method by using through-hole
US08/101,780 US5320979A (en) 1987-07-20 1993-08-03 Method of connecting wirings through connection hole

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62178977A JPH0680665B2 (en) 1987-07-20 1987-07-20 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS6423554A true JPS6423554A (en) 1989-01-26
JPH0680665B2 JPH0680665B2 (en) 1994-10-12

Family

ID=16057959

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62178977A Expired - Fee Related JPH0680665B2 (en) 1987-07-20 1987-07-20 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH0680665B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5529955A (en) * 1993-08-27 1996-06-25 Yamaha Corporation Wiring forming method
US5776827A (en) * 1993-08-27 1998-07-07 Yamaha Corporation Wiring-forming method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5935451A (en) * 1982-08-23 1984-02-27 Fujitsu Ltd Forming method for inter-layer insulating film
JPS59181030A (en) * 1983-03-30 1984-10-15 Toshiba Corp Manufacture of semiconductor device
JPS6092633A (en) * 1983-10-26 1985-05-24 Sony Corp Manufacture of semiconductor device
JPS61113258A (en) * 1984-11-07 1986-05-31 Fujitsu Ltd Manufacture of semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5935451A (en) * 1982-08-23 1984-02-27 Fujitsu Ltd Forming method for inter-layer insulating film
JPS59181030A (en) * 1983-03-30 1984-10-15 Toshiba Corp Manufacture of semiconductor device
JPS6092633A (en) * 1983-10-26 1985-05-24 Sony Corp Manufacture of semiconductor device
JPS61113258A (en) * 1984-11-07 1986-05-31 Fujitsu Ltd Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5529955A (en) * 1993-08-27 1996-06-25 Yamaha Corporation Wiring forming method
US5776827A (en) * 1993-08-27 1998-07-07 Yamaha Corporation Wiring-forming method

Also Published As

Publication number Publication date
JPH0680665B2 (en) 1994-10-12

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees