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JPS57210659A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57210659A
JPS57210659A JP9392581A JP9392581A JPS57210659A JP S57210659 A JPS57210659 A JP S57210659A JP 9392581 A JP9392581 A JP 9392581A JP 9392581 A JP9392581 A JP 9392581A JP S57210659 A JPS57210659 A JP S57210659A
Authority
JP
Japan
Prior art keywords
wiring layer
forming
resistor
layer
patterned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9392581A
Other languages
Japanese (ja)
Inventor
Kazuhiko Kuri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Ltd
Priority to JP9392581A priority Critical patent/JPS57210659A/en
Publication of JPS57210659A publication Critical patent/JPS57210659A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688Integrated circuits having a three-dimensional layout

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the accuracy of a resistor made of polycrystalline semiconductor connected to a second wiring layer by forming the second wiring layer and the resistor through an interlayer insulating film on a first wiring layer. CONSTITUTION:An interlayer insulating film 10 is formed on a first layer wiring layer 9 formed on an Si single crystal substrate 1 formed with a bipolar N-P- N type transistor, a polycrystalline Si of high specific resistance is deposited on the film 10, is then patterned, and an impurity is then doped, thereby forming a resistor 13 having desired resistance value. Then, a through hole 12 reaching the first layer is formed, aluminum is deposited on the overall surface, and is patterned, thereby forming the second wiring layer 11. In this manner, a high resistance of high accuracy can be obtained without necessity of large chip area.
JP9392581A 1981-06-19 1981-06-19 Semiconductor device Pending JPS57210659A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9392581A JPS57210659A (en) 1981-06-19 1981-06-19 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9392581A JPS57210659A (en) 1981-06-19 1981-06-19 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS57210659A true JPS57210659A (en) 1982-12-24

Family

ID=14096012

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9392581A Pending JPS57210659A (en) 1981-06-19 1981-06-19 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57210659A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62158355A (en) * 1985-12-31 1987-07-14 Rohm Co Ltd Manufacture of semiconductor device
JPH02219259A (en) * 1989-02-20 1990-08-31 Toshiba Corp Semiconductor device and its manufacture

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62158355A (en) * 1985-12-31 1987-07-14 Rohm Co Ltd Manufacture of semiconductor device
JPH02219259A (en) * 1989-02-20 1990-08-31 Toshiba Corp Semiconductor device and its manufacture

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