JPS55108772A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS55108772A JPS55108772A JP1664479A JP1664479A JPS55108772A JP S55108772 A JPS55108772 A JP S55108772A JP 1664479 A JP1664479 A JP 1664479A JP 1664479 A JP1664479 A JP 1664479A JP S55108772 A JPS55108772 A JP S55108772A
- Authority
- JP
- Japan
- Prior art keywords
- poly
- crystalline silicon
- gate electrode
- silicon layer
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE: To obtain high speed signal transmission by a method wherein the thickness of the films in a gate electrode and wiring portion made of the same material is made different in an insulating gate type semiconductor integrated circuit.
CONSTITUTION: A field oxidized film 22 and a gate oxidized film 23 are fromed on the surface of a semiconductor substrate 21. Next a poly-crystalline silicon layer is used as a poly-crystalline silicon gate electrode 24. The poly-crystalline silicon layer is etched excepting the gate electrode portion. Next it is heat-oxidized, and a window for making contact with the poly-crystalline layer is made while letting the poly-crystalline silicon layer grow on the whole surface. Then except poly-crystalline silicon 26 in the wiring portion the remaining poly-crystal silicon is etched. After this, impurities are diffused so as to form source and drain regions 27, 28, make a window for the electrode, and add patterning by photo-etching as usual, and the source and drain electrodes 10, 11 are formed.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1664479A JPS55108772A (en) | 1979-02-14 | 1979-02-14 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1664479A JPS55108772A (en) | 1979-02-14 | 1979-02-14 | Semiconductor integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55108772A true JPS55108772A (en) | 1980-08-21 |
Family
ID=11922053
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1664479A Pending JPS55108772A (en) | 1979-02-14 | 1979-02-14 | Semiconductor integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55108772A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60235459A (en) * | 1984-05-08 | 1985-11-22 | Nec Corp | Semiconductor device |
US5280190A (en) * | 1991-03-21 | 1994-01-18 | Industrial Technology Research Institute | Self aligned emitter/runner integrated circuit |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52130580A (en) * | 1976-04-27 | 1977-11-01 | Toshiba Corp | High densityintegrated circuit device |
JPS53109487A (en) * | 1977-03-07 | 1978-09-25 | Matsushita Electric Ind Co Ltd | Manufacture for semiconductor device |
-
1979
- 1979-02-14 JP JP1664479A patent/JPS55108772A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52130580A (en) * | 1976-04-27 | 1977-11-01 | Toshiba Corp | High densityintegrated circuit device |
JPS53109487A (en) * | 1977-03-07 | 1978-09-25 | Matsushita Electric Ind Co Ltd | Manufacture for semiconductor device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60235459A (en) * | 1984-05-08 | 1985-11-22 | Nec Corp | Semiconductor device |
US5280190A (en) * | 1991-03-21 | 1994-01-18 | Industrial Technology Research Institute | Self aligned emitter/runner integrated circuit |
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