EP0793277B1 - Photovoltaic device provided with an opaque substrate having a specific irregular surface structure - Google Patents

Photovoltaic device provided with an opaque substrate having a specific irregular surface structure Download PDF

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Publication number: EP0793277B1
Authority: EP; European Patent Office
Prior art keywords: substrate; photovoltaic device; layer; recesses; irregular surface
Prior art date: 1996-02-27
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

EP97301265A

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German (de)

English (en)

French (fr)

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EP0793277A2 (en

EP0793277A3 (en

Inventor

Jinsho Matsuyama

Koichi Matsuda

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Canon Inc

Original Assignee

Canon Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1996-02-27

Filing date

1997-02-26

Publication date

2001-08-22

1997-02-26 Application filed by Canon Inc filed Critical Canon Inc

1997-09-03 Publication of EP0793277A2 publication Critical patent/EP0793277A2/en

1998-09-09 Publication of EP0793277A3 publication Critical patent/EP0793277A3/en

2001-08-22 Application granted granted Critical

2001-08-22 Publication of EP0793277B1 publication Critical patent/EP0793277B1/en

2017-02-26 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

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- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
- H01L31/0392—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
- H01L31/03926—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate comprising a flexible substrate
- H01L31/03928—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate comprising a flexible substrate including AIBIIICVI compound, e.g. CIS, CIGS deposited on metal or polymer foils
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Definitions

the present invention relates to an improvement in photovoltaic devices for solar cells and for power sources in various electric appliances. More particularly, the present invention relates to a photovoltaic device (or a photoelectric conversion device) provided with an an opaque substrate having a specific irregular surface structure which enhances the utilization efficiency of incident light in the photoelectric conversion region (or the photoactive semiconductor region) and provides improved photoelectric conversion efficiency.
a photovoltaic device comprising a transparent and electrically conductive layer composed of TiO 2 interposed between a photoelectric conversion layer and a metallic back reflection layer (see, Y. Hmakawa et al., Appl. Phys. Lett., 43, p. 644 (1983)).
a photovoltaic device comprising a transparent and electrically conductive layer having a textured surface structure provided with a plurality of minute irregularities contacted with a photoelectric conversion layer in which light is scattered at the interface between the transparent and electrically conductive layer and the photoelectric conversion layer whereby to improve the utilization efficiency of incident light in the photoelectric conversion layer (see, H. Deckman et al., Proc. 16th IEEE Photovoltaic Specialist Conf. p. 1425 (1982)).
the conventional so-called textured surface structure in the case of a photovoltaic device is typically of such a configuration with a plurality of pyramid-like irregularities as described in T. Tiedje et al., Proc. 16th IEEE Photovoltaic Specialist Conf. p. 1423 (1982) and it provides an excellent light-confining effect.
Japanese Unexamined Patent Publication No. 147783/1987 discloses a solar cell (belonging to a photovoltaic device) comprising an amorphous silicon (an a-Si) photoactive semiconductor layer deposited on a metallic substrate whose surface has a specific regular surface capable of causing diffraction of incident light.
an amorphous silicon an a-Si
the formation of said specific regular surface on the metallic substrate is conducted by way of the special etching process in this case and because of this, the solar cell is costly.
United States Patent No. 4,377,723 discloses a tandem type solar cell having a substrate which functions as an opaque electrical contact. The surface of this substrate is textured by chemical etching or by mechanical means such as sand blasting. The texturing angle is preferably 20° to 70°, while the texturing depth is preferably about 0.5 to 1.5 ⁇ m.
European Patent Application 0661761 discloses triple type and tandem type solar cells having a stainless steel substrate that is coated with an Aq metal layer and a textured surface.
the present invention is intended to eliminate the foregoing problems found in the prior art and satisfy the foregoing demand.
the present invention provides a highly reliable photovoltaic device which is free of the foregoing problems relating to workability, reliability and production cost found in the prior art and in which absorption of incident light (or the utilisation efficiency of incident light) by the photoactive semiconductor layer (or the photoelectric conversion layer) is more improved and which excels in workability and reliability.
the present invention is based on a finding obtained through experimental studies by the present inventors in order to attain the above objects, that the use of an opaque substrate having a specific irregular surface structure comprising a plurality of linear irregularities or recesses enables to attain a highly reliable photovoltaic device which is free of the foregoing problems relating to workability, reliability and production cost found in the prior art, in which absorption of incident light (or the utilization efficiency of incident light) by the photoelectric conversion layer is more improved, and which excels in workability and can be efficiently produced at a reasonable production cost.
a photovoltaic device as defined in the appended claims comprises an opaque substrate having a specific irregular surface structure comprising a plurality of linear irregularities or recesses which enables to more efficiently utilize incident light (or to more efficiently absorb incident light) by the photoelectric conversion layer whereby providing an improvement in the photoelectric conversion efficiency.
the linear irregularities or recesses in the irregular structure on the opaque substrate in the present invention may take a linearly shaped pattern in which the linear irregularities or recesses are arranged in a linear form arrangement, a wave-like shaped pattern in which the linear irregularities or recesses are arranged in a wave-like form arrangement, and a spirally shaped pattern in which the linear irregularities or recesses are arranged in a spiral form arrangement.
the present invention provides a pronounced advantage in that in a rolling process for the production of said substrate web, the forgoing irregular surface structure can be efficiently formed on the substrate web and because of this, there can be obtained a desirably processed substrate web having the foregoing irregular surface structure.
the present inventors found that the linear irregularities or recesses should lie in a specific numeric value range. Specifically, when a center line average roughness obtained when scanning is conducted in a direction parallel to the linear irregularities or recesses is made to be Ra(X) and a center line average roughness obtained when scanning is conducted in a direction perpendicular to the linear irregularities or recesses is made to be Ra(Y), Ra(X) is in the range of from 15 nm to 300 nm, Ra(Y) is in the range of from 20 nm to 600 nm, and Ra(X)/Ra(Y) is 0.8 or less.
the present invention is characterised by such centre line average roughness.
the center line average roughness Ra herein is generally defined by the following equation (I).
Ra 1/L ⁇ ⁇ L o
L is a measured length in a given direction
f(x) is corresponding to a height based on the center line of the irregularities at a given position in the surface of the substrate.
the parameter for defining the surface roughness it can be expressed by means of a maximum height Rmax.
the experimental results obtained by the present inventors revealed that the use of the center line average roughness Ra is more suitable because it is highly interrelated to the yield and characteristics of a photovoltaic device. The reason for this is considered such that when even only one large sized irregularity should be present, the Rmax becomes large accordingly and on the other hand, the Ra provides a more average evaluation for the surface of the linear irregularities or linear recesses in the present invention.
the Rmax is about four times the Ra.
the irregular surface comprising the linear irregularities or recesses in the present invention the Rmax was found to be about five times the Ra in most cases as a result of experimental studies by the present inventors.
the adhesion between the substrate and a film deposited thereon is markedly improved. Because of this, the controllability and freedom in the production of a photovoltaic device are widened to make it capable of efficiently produce a desirable photovoltaic device at a high yield.
the photovoltaic device obtained excels in weatherability and durability. And the photovoltaic device excels in photovoltaic characteristics.
the irregular reflection of light in the back area of the photovoltaic device is markedly improved such that long wavelength light remained without being adsorbed by the photoactive semiconductor layer is effectively scattered into the photoactive semiconductor layer to prolong the optical path length in the photoactive semiconductor layer, where the series resistance is greatly diminished and a marked improvement is provided in the short-circuit current (Jsc) and fill factor (F.F.).
Jsc short-circuit current
F.F. fill factor
the used of the substrate having the specific irregular surface structure according to the present invention enables to efficiently produce a desirable photovoltaic device excelling in weatherability and durability and having improved photovoltaic characteristics at a higher yield.
the photovoltaic device has an apparent improvement in the photovoltaic characteristics including open circuit voltage (Voc) and fill factor (F.F.) while maintaining the short-circuit current (Jsc) at a high level. And the photovoltaic device exhibits an improved photoelectric conversion efficiency.
the use of the substrate having the specific irregular surface structure according to the present invention provides such pronounced advantages, it is not clear enough for the time being. But it is considered as follows.
a semiconductor layer formed on such irregular substrate surface has a tendency of having defective portions at the tips of the pyramid-like shaped irregularities.
the specific irregular surface structure according to the present invention does not have such pyramid tips but is shaped to have ridges and because of this, electric field is difficult to be converged to the ridges where such defective semiconductor layer portions are hardly occurred.
a semiconductor layer formed on the pyramid-like shaped irregular surface its effective thickness is thinner than that of a semiconductor layer on a polished (specular) substrate surface.
the semiconductor layer is a doped layer or the like (which is usually designed to have a thin thickness)
its effective thickness is excessively thinned.
a photovoltaic device having such excessively thinned doped layer is liable to be inferior to a photovoltaic device formed on a polished substrate surface in terms of the open circuit voltage (Voc) and fill factor (F.F.).
a semiconductor layer (including a doped layer) formed the specific irregular surface structure is difficult to be undesirably thinned as in the case of using the pyramid-like irregular substrate surface because the surface area of the specific irregular surface structure of the substrate according to the present invention is smaller than that of the pyramid-like shaped substrate surface, where the photovoltaic device obtained is superior to the photovoltaic device formed on the pyramid-like shaped substrate surface particularly in terms of the open circuit voltage (Voc) and fill factor (F.F.) while maintaining the short-circuit current (Jsc) at a high level.
Voc open circuit voltage
F.F. fill factor
FIG. 1 is a schematic view illustrating the layer constitution of an example of a photovoltaic device according to the present invention.
FIG. 2 is a schematic view illustrating the layer constitution of another example of a photovoltaic device according to the present invention.
FIG. 3(a) is a schematic view illustrating an example of an irregular surface structure provided on an opaque substrate according to the present invention, comprising a plurality of linear irregularities or recesses which are arranged in a linear form arrangement.
FIG. 3(b) is a schematic view illustrating another example of an irregular surface structure provided on an opaque substrate according to the present invention, comprising a plurality of linear irregularities or recesses which are arranged in a wave-like form arrangement.
FIG. 3(c) is a schematic view illustrating a further example of an irregular surface structure provided on an opaque substrate according to the present invention, comprising a plurality of linear irregularities or recesses which are arranged in a spiral form arrangement.
FIG. 3(d) is a schematic view illustrating a further example of an irregular surface structure provided on an opaque substrate according to the present invention, comprising a plurality of first linear irregularities or recesses arranged in a linear form arrangement and a plurality of second linear irregularities or recesses arranged in a direction perpendicular to said first linear irregularities or recesses.
FIG. 4 is a schematic plan view illustration an pattern example of a collecting electrode used in a photovoltaic device according to the present invention.
FIG. 5 is a schematic diagram illustrating an example of a sputtering apparatus for preparing a substrate having the foregoing specific irregular surface structure used in a photovoltaic device according to the present invention.
FIG. 6 is a schematic diagram illustrating an example of a fabrication apparatus for producing a photovoltaic device according to the present invention.
FIGs. 7(a) and 7(b) are schematic diagrams illustrating an example of a roll-to-roll type fabrication apparatus for producing a photovoltaic device according to the present invention.
FIG. 8(a) is a graph showing evaluated results with respect to yield for photovoltaic devices according to the present invention and conventional photovoltaic devices in Example 2 which will be later described.
FIG. 8(b) is a graph showing evaluated results with respect to characteristics after durability test for photovoltaic devices according to the present invention and conventional photovoltaic devices in Example 2 which will be later described.
FIG. 9(a) is a graph showing evaluated results with respect to yield for photovoltaic devices according to the present invention and conventional photovoltaic devices in Example 3 which will be later described.
FIG. 9(b) is a graph showing evaluated results with respect to characteristics after durability test for photovoltaic devices according to the present invention and conventional photovoltaic devices in Example 3 which will be later described.
the photovoltaic device according to the present invention may be of a single cell type or a multi-cell type such as tandem cell type, triple cell type, or the like.
FIG. 1 is a schematic view illustrating the constitution of an example of a single cell type photovoltaic device according to the present invention.
FIG. 2 is a schematic view illustrating the constitution of an example of a multi-cell type photovoltaic device according to the present invention.
the single cell type photovoltaic device shown in FIG. 1 comprises a single pin junction cell.
the photovoltaic device shown in FIG. 1 comprises a metallic back reflection layer 102, a transparent and electrically conductive layer 103, an n-type semiconductor layer 104 (that is, a doped semiconductor layer of n-type), an i-type semiconductor layer 105 (that is, an non-doped semiconductor layer of i-type), a p-type semiconductor layer 106 (that is, a doped semiconductor layer of p-type), a transparent electrode layer 107 having an irregular surface provided with a plurality of first linear irregularities 109 provided with a plurality of minute linear irregularities 110 arranged in a direction perpendicular to the first irregularities, and a collecting electrode 108 stacked in the named order on a specific irregular surface structure of an opaque substrate 101.
the n-type semiconductor layer 104, the i-type semiconductor layer 105 and the p-type semiconductor layer 106 establish a pin junction cell.
light is impinged through the transparent electrode layer 107 side.
the photovoltaic device shown in FIG. 1 may further comprise a contact layer (not shown) interposed between the substrate 101 and the metallic back reflection layer 102 in order to improve the adhesion of the metallic back reflection layer 102 with the substrate 101.
the multi-cell type photovoltaic device shown in FIG. 2 is of a triple cell type comprising three pin junction cells being stacked.
the triple cell type photovoltaic device shown in FIG. 2 comprises a metallic back reflection layer 202, a transparent and electrically conductive layer 203, a first pin junction cell 217, a second pin junction cell 216, a third pin junction cell 215, a transparent electrode 213 having an irregular surface provided with a plurality of first linear irregularities 218 provided with a plurality of minute linear irregularities 219 arranged in a direction perpendicular to the first irregularities and a collecting electrode 214 stacked in the named order on a specific irregular surface structure of an opaque substrate 201.
the first pin junction cell 217 comprises an n-type semiconductor layer 204, an i-type semiconductor layer 205 and a p-type semiconductor layer 206 being stacked in the named order from the substrate 201 side
the second pin junction cell 216 comprises an n-type semiconductor layer 207, an i-type semiconductor layer 208 and a p-type semiconductor layer 209 being stacked in the named order from the substrate 201 side
the third pin junction cell 215 comprises an n-type semiconductor layer 210, an i-type semiconductor layer 211 and a p-type semiconductor layer 212 being stacked in the named order from the substrate 201 side.
light is impinged through the side of the third pin junction cell 215.
the photovoltaic device shown in FIG. 2 may further comprise a contact layer (not shown) interposed between the substrate 201 and the metallic back reflection layer 202 in order to improve the adhesion of the metallic back reflection layer 202 with the substrate 201.
a principal feature of the present invention lies in the use of an opaque substrate having a specific irregular surface structure (or pattern) thereon as the substrate (101, 201).
the specific irregular surface structure provided on the substrate comprises:
3(a), 3(b) or 3(c) enables to attain the production of a highly reliable photovoltaic device at a high yield, which is improved in terms of the prevention of the occurrence of a leakage current and in which irregular reflection of light in the back area is improved to elongate the optical path length in the photoactive semiconductor layer (or the photoelectric conversion layer), whereby the light absorption by the photoactive semiconductor layer is increased, resulting in an increase in the short-circuit current (Jsc).
the linear irregularities or recesses are desired to have a pitch (that is, an interval between adjacent irregularities or recesses) preferably in the range 0.5 ⁇ m to 20 ⁇ m, more preferably in the range of from 1 ⁇ m to 15 ⁇ m, most preferably in the range of from 2 ⁇ m to 10 ⁇ m.
the pitches among the linear irregularities or recesses are not necessary to be uniform as long as they are within said range.
the irregular surface pattern shown in FIG. 3(d) is a modification of the irregular surface pattern shown in FIG. 3(a) such that a plurality of second minute linear irregularities or recesses of 20 ⁇ m or less in length are additionally arranged in a direction perpendicular to the linear irregularities or recesses linearly arranged in FIG. 3(a).
a plurality of first linear irregularities or recesses are spacedly arranged in a linear arrangement form as shown in FIG. 3(a) and a plurality of second minute linear irregularities or recesses of 20 ⁇ m or less in length are spacedly arranged in a direction perpendicular the first linear irregularities or recesses.
the irregular surface pattern shown in FIG. 3(d) provides pronounced advantages.
the used of an opaque substrate having the irregular surface pattern shown in FIG. 3(d) enables to attain the production of a highly reliable photovoltaic device at a high yield, which is more improved in terms of the prevention of the occurrence of a leakage current and in which irregular reflection of light in the back area is improved to more elongate the optical path length in the photoactive semiconductor layer (or the photoelectric conversion layer), whereby the light absorption by the photoactive semiconductor layer is more increased, resulting in a more increase in the short-circuit current (Jsc).
the length is desired to be 20 ⁇ m or leass as above described. It is more preferably 15 ⁇ m or less, most preferably 10 ⁇ m or less.
the substrate (101, 201) may be constituted by a single crystal material or a non-single crystal material, which is either electrically conductive or electrically insulative. In any case, it is desired for the substrate to be constituted by an appropriate material which is difficult to be deformed or distorted and has a sufficient physical strength.
the substrate may comprise a metal selected from the group consisting of Fe, Ni, Cr, Al, Mo, Au, Nb, Ta, V, Ti, Pt, and Pb; an alloy selected from the group consisting of alloys of these metals such as brasses and stainless steels; or a member selected from the group consisting of composites of these alloys.
the substrate may comprise a film or sheet of a heat resistant synthetic resin such as polyester, polyethylene, polycarbonate, cellulose acetate, polypropylene, polyvinyl chloride, polyvinylidene chloride, polystyrene, polyamide, polyimide, or epoxy resin; or a member selected from the group consisting of composites of these films or sheets with a glass fiber, carbon fiber, boron fiber or metallic fiber.
a heat resistant synthetic resin such as polyester, polyethylene, polycarbonate, cellulose acetate, polypropylene, polyvinyl chloride, polyvinylidene chloride, polystyrene, polyamide, polyimide, or epoxy resin
the material by which the substrate is constituted can include thin plates made of the foregoing metals having a surface coated by a metal thin film made of a different metal or/and an electrically insulative thin film of SiO 2 , Si 3 N 4 , Al 2 O 3 or AlN by way of sputtering, vacuum deposition, or plating; the foregoing synthetic resin sheets having a surface coated by an appropriate metal thin film or/and an electrically insulative thin film of SiO 2 , Si 3 N 4 , Al 2 O 3 or AlN by way of sputtering, vacuum deposition, or plating; and ceramics.
stainless steels are the most appropriate since they excel in workability, durability and flexibility and in addition, they excel in suitability in forming the foregoing irregular surface patterns thereon.
the substrate is constituted by an electrically conductive material
it may be designed such that it serves also as an electric current outputting electrode.
the substrate is constituted by an electrically insulative material
its surface on which a deposited film is to be formed is desired to have been applied with electrically conductive surface treatment with the use of a metal such as Al, Ag, Pt, Au, Ni, Ti, Mo, W, Fe, V, Cr or Cu; an alloy such as stainless steel, brass or nichrome; or a transparent and electrically conductive oxide material such as SnO 2 , In 2 O 3 , ZnO or ITO by way of plating, vacuum deposition or sputtering so as to establish an electric current outputting terminal.
a metal such as Al, Ag, Pt, Au, Ni, Ti, Mo, W, Fe, V, Cr or Cu
an alloy such as stainless steel, brass or nichrome
a transparent and electrically conductive oxide material such as SnO 2 , In 2 O 3 , ZnO
the substrate is constituted by an electrically conductive material comprising a metallic material
a metal layer composed of a metal different from the constituent metallic material of the substrate is desired to be disposed on a surface of the substrate on which a deposited film is to be formed for the purposes of improving the reflection of long wavelength light on the surface of the substrate and preventing the constituent elements of the substrate and those of a film deposited from being mutually diffused.
the substrate may be of any configuration such as plate-like, belt-like or cylindrical shape, which can be properly determined depending on the application use.
the substrate is used in the roll-to-roll film-forming process comprising a rolling step for preparing a substrate having the foregoing irregular surface pattern and a film-forming step for forming a deposited film on the substrate
a rolling step for preparing a substrate having the foregoing irregular surface pattern and a film-forming step for forming a deposited film on the substrate it is desired to be in a belt-like shape comprising a long web substrate.
the irregular surface pattern can be continuously formed on the surface of the long web substrate which is moving toward the film-forming step.
the thickness of the substrate it should be properly determined so that a photovoltaic device as desired can be obtained.
flexibility it can be made as thin as possible within a range capable of sufficiently providing the function as the substrate.
the thickness is usually greater than 10 ⁇ m in view of the fabrication and handling or mechanical strength of the substrate.
the formation of the irregular surface pattern on the substrate is conducted by an appropriate manner depending upon the kind of the constituent material of the substrate.
an irregular surface pattern comprising a plurality of linear irregularities or recesses spacedly arranged in a given direction on a surface of the substrate
a manner by way of rolling a manner by way of polishing, a manner by way of molding or a manner by way of etching.
annealing can be supplementarily used.
the manner by way of rolling is suitable in the case where the substrate is made of a metallic material. This is suitable particularly in the cause of forming the irregular surface pattern shown in FIG. 3(a).
the rolling can include hot rolling and cold rolling.
the cold rolling may be conducted by means of a reversing type four rolls rolling mill, a senizimir twenty rolls rolling mill, and a skinpass rolling mill.
a desirable irregular surface patten comprising a plurality of linear irregularities or recesses respectively arranged in a given direction on a surface of the substrate by way of 2D finishing, 2B finishing or BA finishing.
the process for the production of a stainless steel plate generally comprises a steel-making process, a hot rolling process, a cold rolling process, and a final process.
the final process is the most important for the formation of the irregular surface pattern according to the present invention.
the irregular surface pattern according to the present invention can be formed on the surface of the stainless steel in a desirable state.
a raw material is melted and refined by an electric arc furnace, followed subjected to decarburization by a L.D. converter. Then for the resultant, the stainless component and the temperature are appropriately adjusted by means a vacuum degassing vessel, followed by forming slabs by means of a continuous casting machine.
the slabs are ground by means of a surface grinding machine, then re-heated by means of a furnace into a so-called hot coil state, followed by subjecting to the treatment by a roughing-ill mill then the treatment by a hot strip mill whereby the slab of more than 100 mm in thickness is hot-rolled into a slab having a thickness of 2 to 3 mm.
annealing treatment and acid-washing are conducted using a continuous annealing and pickling line to remove an oxide (which is called "a scale") present on the stainless steel surface into a state capable of being readily cold-rolled.
the cold rolling treatment for the resultant is conducted by means of the sendzimir twenty rolls rolling mill or a tandem sendzimir rolling mill whereby it is processed and hardened into a plate of less than 1 mm in thickness.
finish rolling using a finish rolling mill with a work roll or finish polishing using a finish polishing mill with a contact roll is conducted to obtain a stainless steel plate having a desired thickness and having a surface with the foregoing irregular surface pattern comprising a plurality of linear irregularities or recesses according to the present invention which is quite suitable for use in producing a photovoltaic device according to the present invention.
the thickness of the stainless steel plate it is preferably in the range of from 0.05 mm to 1 mm, more preferably in the range of from 0.1 mm to 0.5 mm.
finish rolling mill there can be used a four rools cold rolling mill, a twelve rolls cold rolling mill, or a skinpass rolling mill.
a center line average roughness obtained when scanning is conducted in a circumference direction of the roll (shaped in a cylindrical form) is made to be Ra(L)
a center line average roughness obtained when scanning is conducted in a generatrix direction of the roll is made to be Ra(H)
a Ra(H) value preferably in the range of from 10 nm to 1000 nm or more preferably in the range of from 20 nm to 600 nm.
the resultant irregular surface pattern can be adjusted into a desired state by additionally conducting appropriate polishing treatment or etching treatment.
appropriate polishing treatment or etching treatment For instance, in the case of a stainless steel obtained by conducting the BA finishing and having an irregular surface pattern which is insufficient in the foregoing Ra(X) and Ra(Y) values, by softly etching the surface of the stainless steel plate by the etching manner which will be layer described, there can be attained the formation of a desired irregular surface pattern which is sufficient in the foregoing Ra(X) and Ra(Y) values.
finish heat treatment or treatment for correcting the warp of the stainless steel plate such as roller reveling or tension revealing.
the irregular surface patterns shown in FIGs. 3(a), 3(b) and 3(c) according to the present invention can be formed by an appropriate polishing manner without conducting rolling treatment.
the polishing manner may be employed in the case of a non-metallic substrate.
the polishing manner therein may be conducted by means of belt polishing, buff polishing, brush polishing, or lap-polishing.
the polishing manner may be a polishing manner using abrasive grains. It is desired for the abrasive grains used to have a mean particle size preferably in the range of from 0.1 ⁇ m to 100 ⁇ m, more preferably in the range of from 0.2 ⁇ m to 50 ⁇ m.
any of the irregular surface patterns shown in FIGs. 3(a), 3(b) and 3(c) may be conducted by the manner by way of molding wherein a mold having a surface provided with a pattern corresponding to any of the irregular surface patterns shown in FIGs. 3(a), 3(b) and 3(c) is press-contacted to the surface of the substrate.
the mold having such surface pattern on the surface thereof may be prepared by an appropriate manner such as polishing, etching, or patterning.
etching treatment in this case can include vapor phase etching treatment and liquid phase etching treatment.
the vapor phase etching treatment can include gas etching treatment, plasma etching treatment and ion etching treatment.
the gas etching treatment may be conducted using an appropriate etching gas of CF 4 , C 2 F 6 , C 3 F 8 , C 4 F 10 , CHF 3 , CH 2 F 2 , Cl 2 , ClF 3 , CCl 4 , CCl 2 F 2 , CClF 3 , CHClF 2 , C 2 Cl 2 F 4 , BCl 3 , PCl 3 , CBrF 3 , SF 6 , SiF 4 , SiCl 4 , HF, O 2 , N 2 , H 2 , He, Ne, Ar, or Xe. Mixtures of two or more these gases may be also usable as the etching gas.
the plasma etching treatment may be conducted using a plasma generated from one or more gases selected from those above mentioned at a gas pressure of 1 x 10 -3 to 1 Torr by applying a D.C. or A.C. power, a RF power with an oscillation frequency of 1 to 100 MHz, or other high frequency power such as microwave power with an oscillation frequency of 0.1 to 10 GHz.
a preferable range of the energy to produce the plasma it is in the range of from 100 to 2000 V in the case of using the D.C. power.
the A.C. or RF power it is in the range of 0.001 to 5 W/cm 3 .
the microwave power it is in the range of from 0.01 to 1 W/cm 3 .
the substrate temperature upon conducting the etching treatment it is preferably in the range of from 10 to 400 °C, more preferably in the range of from 20 to 300 °C.
the period of time during which the etching treatment is conducted it is preferably in the range of from 0.5 to 100 minutes, more preferably in the range of from 2 to 60 minutes.
the liquid phase etching treatment may be conducted using an appropriate etching liquid.
the etching liquid in this case can include acid series etching liquids and alkali series etching liquids.
the acid series etching liquid are etching liquids comprising sulfuric acid, hydrochloric acid, nitric acid, phosphoric acid, hydrofluoric acid, chromic acid, sulfamic acid, oxalic acid, tartaric acid, citric acid, formic acid, lactic acid, glycollic acid, acetic acid, gluconic acid, succinic acid, malic acid, water dilutions of these compounds, or mixtures of these.
alkali series etching liquid examples include etching liquids comprising caustic soda, ammonium hydroxide, potassium hydroxide, sodium carbonate, sodium bicarbonate, sodium sesquicarbonate, sodium primary phosphate, sodium secondary phosphate, sodium tertiary phosphate, sodium pyrophosphate, sodium tripolyphosphate, sodium tetrapolyphosphate, sodium trimetaphosphate, sodium tetrametaphosphate, sodium hexametaphosphate, sodium orthosilicate, sodium metasilicate, water dilutions of these compounds, or mixtures of these.
etching liquids comprising caustic soda, ammonium hydroxide, potassium hydroxide, sodium carbonate, sodium bicarbonate, sodium sesquicarbonate, sodium primary phosphate, sodium secondary phosphate, sodium tertiary phosphate, sodium pyrophosphate, sodium tripolyphosphate, sodium tetrapolyphosphate, sodium trimetaphosphate, sodium tetrametaphosphat
liquid phase etching treatment it is possible to heat the etching liquid or to apply an energy of a supersonic wave to the etching liquid.
the acid or alkali concentration is desired to be preferably in the range of from 1 to 80 volume%, more preferably in the range of from 5 to 50 volume%.
the temperature of the acid series or alkali series etching liquid upon conducting the etching it is preferably in the range of from 10 to 80 °C, more preferably in the range of from 20 to 60 °C.
the period of time during which the etching treatment is conducted it is preferably in the range of from 5 seconds to 30 minutes, more preferably in the range of from 10 seconds to 10 minutes.
the annealing treatment may be conducted in a gaseous atmosphere composed of air, steam, nitrogen gas, hydrogen gas, oxygen gas, inert gas, or other appropriate gas at an appropriate annealing temperature and for an appropriate annealing treatment period of time selected depending upon the kind of the constituent of the substrate.
the annealing temperature in general, it is desired to be preferably in the range of from 200 to 800 °C, more preferably in the range of from 400 to 700 °C.
the annealing period of time in general, it is desired to be preferably in the range of from 1 to 100 minutes, more preferably in the range of from 2 to 60 minutes.
first irregular pattern a plurality of first linear irregularities or recesses are arranged in a linear arrangement form
second minute linear irregularities or recesses 20 ⁇ m or less in length
first irregular pattern a plurality of first linear irregularities or recesses
second irregular pattern a plurality of second minute linear irregularities or recesses of 20 ⁇ m or less in length
first irregular pattern a plurality of second minute linear irregularities or recesses of 20 ⁇ m or less in length
second irregular pattern may be formed by conducting the foregoing final process while using either a finish rolling mill with a work roll having an irregular surface pattern comprising a plurality of linear irregularities or recesses having a length of 20 ⁇ m or less, an elevation of 0.5 ⁇ m or less and a depth of 0.5 ⁇ m or less respectively in a generatrix direction of the work roll or a finish polishing roller with a contact roll having an irregular surface pattern comprising a plurality of linear irregularities or recesses having a length of 20 ⁇ m or less
the irregular surface pattern shown in FIG. 3(d) may be formed by conducting the foregoing final process while using either a finish rolling mill with a work roll having the above irregular surface pattern which has an average pitch of 20 ⁇ m or less for the irregularities in a generatrix line of the work roll and additionally deposited with liquid or a finish polishing mill with a contact roll having the above irregular surface pattern which has an average pitch of 20 ⁇ m or less for the irregularities in a generatrix line of the contact roll and additionally deposited with liquid.
the irregular surface pattern shown in FIG. 3(d) in which a plurality of first linear irregularities or recesses are arranged in a linear arrangement form (this will be hereinafter referred to as first irregular pattern) and a plurality of second minute linear irregularities or recesses of 20 ⁇ m or less in length are arranged in a direction perpendicular to the first linear irregularities or recesses (this will be hereinafter referred to as second irregular pattern) may be formed by a manner of forming the former irregular pattern by means of an appropriate polishing manner and forming the latter irregular pattern in a direction perpendicular to the former one by means of an appropriate rolling or polishing manner.
the lately formed irregular pattern by the lately formed irregular pattern, the previously formed irregular pattern is partially broken to cause partial residues as the second irregular pattern, and wherein the lately formed irregular pattern becomes the first irregular pattern. Further, by making the lately formed pattern such that it has an average pitch (d) of 20 ⁇ m or less for the linear irregularities or recesses, the second irregular pattern can be formed as desired.
it may be formed by a manner of forming the first irregular pattern by means of an appropriate rolling or polishing manner and forming the second irregular pattern by subjecting the surface of the first irregular pattern to etching treatment using a mask having a plurality of long thin openings in a direction perpendicular to the linear irregularities or recesses of the first irregular pattern.
the back reflection layer (102, 202) is formed on the surface of the foregoing specific uneven surface structure provided on the substrate (101, 201).
the back reflection layer serves to reflect light not having absorbed by the photoelectric conversion layer and reached the substrate into the photoelectric conversion layer so that it is recycled in the photoelectric conversion layer.
the back reflection layer also serves as a back electrode (or a lower electrode).
the back reflection layer comprises a metallic layer constituted by an appropriate metallic material such as a metal or alloy.
said metal are Au, Ag, Cu, Al, Mg, Ni, Fe, Mo, W, Ti, Co, Ta, Nb and Zr.
Specific examples of said alloy are alloys of said metals such as stainless steel and alloys composed of said metals and containing silicon (Si) as an additive.
Si silicon
Al, Mg, Cu, Ag and Au which have a high light reflectance against visible light to infrared light and alloys principally composed of two or more these metals and added with silicon (Si) are the most appropriate.
the back reflection layer constituted by any of the above metallic materials may be formed by means of a conventional manner such as electron beam evaporation, sputtering, CVD, plating, or screen printing.
the back reflection layer may be of a single-layered structure or a multi-layered structure. In the case where the substrate is constituted by an electrically conductive material, the back reflection layer is not always necessary to be disposed.
the back reflection layer may be designed to have an even surface or an uneven surface. In the case where the back reflection layer has an uneven surface, there is provided an advantage in that the optical path length of light reflected into the photoactive semiconductor layer is prolonged to afford an increase in the short-circuit current.
the back reflection layer is formed on the surface of the foregoing specific uneven surface structure provided on the substrate. Therefore, the back reflection layer is formed in a state of following the uneven surface structure of the substrate. Because of this, the back reflection layer has an improved adhesion with the substrate. This situation provides pronounced advantages in that the freedom and controllability in the production of a photovoltaic device are widened, the yield of a photovoltaic device is improved, and a photovoltaic device obtained is sufficient enough in weatherabillity and durability.
the back reflection layer is constituted principally by a metallic material having a high light reflectance against visible light to infrared light such as Au, Ag, Cu, Al or Mg
a desirable photovoltaic device in which the light reflectance of the back area is markedly improved to afford a marked increase in the quantity of light absorbed by the photoactive semiconductor layer whereby providing a markedly improved short-circuit current (Jsc).
the constituent metallic material of the back reflection layer tends to diffuse or migrate into the photoactive semiconductor layer to a shunt.
a back reflection layer composed of the above described metallic material having a high light reflectance on a textured structure surface (with a plurality of pyramid-like shaped irregularities) of a substrate or a back reflection layer (composed of the above described metallic material having a high light reflectance) having a textured structure surface (with a plurality of pyramid-like shaped irregularities
a photovoltaic device which is provided with the back reflection layer composed of the above described metallic material having a high light reflectance formed on the specific irregular surface pattern of the substrate, the constituent metallic material of the back reflection layer is scarcely diffused or migrated into the photoactive semiconductor layer and a high irregular light reflection and a high short-circuit current (Jsc) are attained.
the leakage current is markedly diminished and an marked improvement is provided in the open circuit voltage (Voc) and also in the fill factor (F.F.).
the photovoltaic device having these pronounced advantages can be efficiently produced at a high yield.
Al As the principal constituent of the back reflection layer is the most appropriate for the reasons that it is relatively inexpensive and it is more difficult to be migrated in comparison with Ag or Cu.
a photovoltaic device provided with a back reflection layer composed of Al formed on a textured structure surface (with a plurality of pyramid-like shaped irregularities) of a substrate or a back reflection layer (composed of Al) having a textured structure surface (with a plurality of pyramid-like shaped irregularities)
the total light reflectance of the surface of the back reflection layer is usually undesirably low.
the total light reflectance of the surface of the back reflection layer is liable to further decrease.
a photovoltaic device which is provided with the back reflection layer composed of Al formed on the specific irregular surface pattern of the substrate, light is efficiently scattered in the back area of the photovoltaic device without a decrease in the total light reflectance of the surface of the Al back reflection layer, where the quantity of light absorbed by the photoactive semiconductor layer is increased to provide an improved short-circuit current (Jsc).
the adhesion between the substrate and the Al back reflection layer is desirably improved.
the photovoltaic device excels in weatherability and durability. Further in addition, the freedom and controllability in the production of a photovoltaic device are widened to efficiently produce a desirable photovoltaic device having the above advantages at a high yield.
the transparent and electrically conductive layer becomes to have an improved orientation
the transparent and electrically conductive layer is constituted by a polycrystalline material
the polycrystalline material as the constituent of the transparent and electrically conductive layer becomes to have a large mean grain size and a slight grain size variation.
the back reflection layer formed on the uneven surface structure of the substrate it is different depending upon the magnitude of the thickness of the back reflection layer.
the back reflection layer is designed to have a relatively thin thickness of, for instance, 0.1 ⁇ m or less, the back reflection layer has an uneven surface which follows the uneven surface structure of the substrate.
the back reflection layer is designed to have a relatively thin thickness of, for instance, beyond 1 ⁇ m, the back reflection layer tends to have a substantially even surface.
the surface of the back reflection layer is even, it is possible to subject the surface to polishing or etching treatment whereby the surface is made to have an irregular surface provided with a plurality of linear irregularities or recesses.
the transparent and electrically conductive layer (103, 203) serves to increase irregular reflection of not only incident light but also reflected light whereby elongating the optical path length in the photoactive semiconductor layer, resulting an increase in the short-circuit current (Jsc) provided by the photovoltaic device.
the transparent and electrically conductive layer serves to prevent the constituent of the metallic layer as the back reflection layer from diffusing or migrating into the photoactive semiconductor layer whereby the photovoltaic device is shunted.
the transparent and electrically conductive layer have an adequate electric resistance, the back reflection layer (102, 202) and the transparent electrode layer (107, 213) can be effectively prevented from being short-circuited due to a defect such as a pinhole present in the photoactive semiconductor layer.
the transparent and electrically conductive layer is required to have a sufficient transmittance for light having a wavelength which is capable of being absorbed by the photoactive semiconductor layer and it is desired to have such an adequate electric resistance.
the transmittance it is preferably 80% or more, more preferably 85% or more, most preferably 90% or more, for light having a wavelength of 650 nm or more.
the electric resistance it is preferably in the range of from 1 x 10 -4 to 1 x 10 6 ⁇ cm, more preferably in the range of from 1 x 10 -2 to 5 x 10 4 ⁇ cm.
the transparent and electrically conductive layer is constituted by an electrically conductive material selected from the group consisting of inorganic oxides such as In 2 O 3 , SnO 2 , ITO (In 2 O 3 -SnO 2 ), ZnO, CdO, Cd 2 SnO 4 , TiO 2 , Ta 2 O 5 , Bi 2 O 3 , MoO 3 and Na x WO 3 and mixtures of these inorganic oxides. Any of these electrically conductive materials may contain a conductivity-controlling dopant.
inorganic oxides such as In 2 O 3 , SnO 2 , ITO (In 2 O 3 -SnO 2 ), ZnO, CdO, Cd 2 SnO 4 , TiO 2 , Ta 2 O 5 , Bi 2 O 3 , MoO 3 and Na x WO 3 and mixtures of these inorganic oxides.
Any of these electrically conductive materials may contain a conductivity-controlling dopant.
the transparent and electrically conductive layer is comprised of ZnO.
the transparent and electrically conductive layer is comprised of In 2 O 3
Sn, F, Te, Ti, Sb and Pb there can mentioned F, Sb, P, As, In, Tl, Te, W, Cl, Br and I.
the transparent and electrically conductive layer constituted by any of the above mentioned materials may be formed by means of a conventional manner such as electron beam evaporation, sputtering, CVD, spray coating, spin coating, or dip coating.
the transparent and electrically conductive layer may be designed to have an even surface or an uneven surface.
the uneven surface may be an irregular surface provided with a plurality of linear irregularities or recesses based on the uneven surface structure of the substrate.
the constituent of the transparent and electrically conductive layer may be polycrystalline.
the polycrystalline constituent is grown to provide an uneven surface provided with a plurality of irregularities based on the grown polycrystalline constituent.
the constituent of the transparent and electrically conductive layer is polycrystalline, the polycrystalline constituent becomes to be in a state with a large mean grain size and a slight grain size variation due to the uneven surface structure of the substrate. This situation enables to produce a desirable photovoltaic device in which light is efficiently scattered at the interface between the transparent and electrically conductive layer and the photoelectric conversion layer to provide an improved short-circuit current (Jsc).
the photoelectric conversion layer means a semiconductor layer which functions to conduct photoelectric conversion.
the pin junction cell in FIGs. 1 and 2 corresponds the photoelectric conversion layer.
the photoelectric conversion layer may comprises a non-single crystalline semiconductor material such as an amorphous semiconductor material, a microcrystalline semiconductor material or polycrystalline silicon semiconductor material. Alternatively, it may comprise a non-single crystalline compound semiconductor material.
non-single crystalline semiconductor material can include, for example, non-single crystalline semiconductor material materials of an element belonging to group IV of the periodic table (this element will be hereinafter referred to as group IV element) such as Si, C, Ge, or the like and non-single crystalline semiconductor materials of group IV alloying elements such as SiGe, SiC, SiSn, or the like.
group IV element such as Si, C, Ge, or the like
group IV alloying elements such as SiGe, SiC, SiSn, or the like.
Any of these non-single crystalline semiconductor materials may contain hydrogen atoms (H, D) or/and halogen atoms (X) in an amount of, for instance, 0.1 to 40 atomic%.
any of these non-single crystalline semiconductor materials may contain oxygen atoms (O) or/and nitrogen atoms (N).
nonsingle crystalline semiconductor materials there can be mentioned amorphous, polycrystalline or microcrystalline Si:H, Si:F, Si:H:F, SiGe:H, SiGe:F, SiGe:H:F, SiC:H, SiC:F and SiC:H:F.
the non-single crystalline compound semiconductor material can include, for example, group II-VI elements-containing compound semiconductor materials such as CdS, CdTe, ZnO, ZnSe, and the like and group I-III-VI elements-containing compound semiconductor materials such as CuInSe 2 , Cu(InGa)Se 2 , CuInS 2 , CuIn(Se, S) 2 , CuInGaSeTe, and the like.
group II-VI elements-containing compound semiconductor materials such as CdS, CdTe, ZnO, ZnSe, and the like
group I-III-VI elements-containing compound semiconductor materials such as CuInSe 2 , Cu(InGa)Se 2 , CuInS 2 , CuIn(Se, S) 2 , CuInGaSeTe, and the like.
the photoelectric conversion layer comprised of any of the above described non-single crystalline semiconductor materials may be of a stacked structure with a pin junction (which corresponds the pin junction cell in FIGs. 1 and 2) which comprises an n-type semiconductor layer, an i-type semiconductor layer and a p-type semiconductor layer, or of a stacked structure with a pn junction which comprises an n-type semiconductor layer and a p-type semiconductor layer.
the i-type semiconductor layer (or the intrinsic layer) comprises any of the foregoing non-single crystalline semiconductor materials and it pays an important role of generating a carrier against light irradiated and transporting said carrier.
the i-type semiconductor layer may of a slightly p-type or n-type nature.
the i-type semiconductor layer may be of a single-layered structure or a multi-layered structure which may include a so-called buffer layer.
the i-type semiconductor layer is desired to be constituted by any of the foregoing non-single crystalline semiconductor material containing hydrogen atoms (H, D) or/and halogen atoms (X) in an amount of 1 to 40 atomic%, for example, an amorphous silicon (a-Si) semiconductor material or an amorphous silicon germanium (a-SiGe) semiconductor material such as a-Si:H, a-Si:F, a-Si:H:F, a-SiGe:H, a-SiGe:F, a-SiGe:H:F or the like.
a-Si amorphous silicon
a-SiGe amorphous silicon germanium
the hydrogen atoms (H, D) or/and the halogen atoms are desired to be contained in the i-type semiconductor layer such that their concentration distribution is enhanced not only on the side of the interface between the i-type semiconductor layer and the n-type semiconductor layer but also on the side of the interface between the i-type semiconductor layer and the p-type semiconductor layer.
the i-type semiconductor layer positioned in the pin junction cell situated at a position near the side through which light is impinged it is desired to be constituted by a non-single crystalline semiconductor material having a wide band gap.
the i-type semiconductor layer positioned in the pin junction cell situated at a position remote from the side through which light is impinged it is desired to be constituted by a non-single crystalline semiconductor material having a narrow band gap.
Each of the n-type and p-type semiconductor layers is constituted by any of the foregoing non-single crystalline semiconductor materials containing hydrogen atoms (H, D) or/and halogen atoms (X) in an amount of 0.1 to 40 atomic% as an optimum amount and which are added with a valence electron controlling agent of n-type or p-type at a high concentration.
the n-type valence electron controlling agent can include, for example, group V elements such as P, As, Sb, and Bi.
the p-type valence electron controlling agent can include, for example, group III elements such as B, Al, Ga, In and T1.
non-single crystalline semiconductor added with the n-type or p-type valence electron controlling agent are amorphous (a-) silicon-containing semiconductor materials such as a-Si:H, a-Si:HX, a-SiC:H, a-SiC:HX, a-SiGe:H, a-SiGe:HX, a-SiGeC:H, a-SiGeC:HX, a-SiO:H, a-SiO:HX, a-SiN:H, a-SiN:HX, a-SiON:H, a-SiON:HX, a-SiOCN:H, and a-SiOCN:HX which are added with the above n-type or p-type valence electron controlling agent at a high concentration; microcrystalline (uc-) silicon-containing semiconductor materials such as uc-Si:H
the hydrogen atoms (H, D) or/and the halogen atoms contained in each of the n-type and p-type semiconductor layers are desired to be contained such that their concentration distribution is enhanced not only on the side of the interface with the i-type semiconductor layer.
the n-type or p-type semiconductor layer situated on the side through which light is impinged it is desired to be constituted by a crystalline semiconductor material which is difficult to absorb light and has a wide band gap.
Each of the n-type and p-type semiconductor layers is desired to have an activation energy preferably of 0.2 eV or less, most preferably 0.1 eV or less and a resistivity of preferably 100 ⁇ cm or less, most preferably 1 ⁇ cm or less.
the photoelectric conversion layer may be designed to have an even surface or an uneven surface.
the uneven surface may be an irregular surface provided with a plurality of linear irregularities or recesses based on the uneven surface structure of the substrate.
the photoelectric conversion layer may be desirably formed by means of a conventional microwave (uW) plasma CVD process or a conventional high frequency (RF) plasma CVD process.
uW microwave
RF high frequency
the formation of the photoelectric conversion layer by the microwave plasma CVD process may be conducted using a microwave plasma CVD apparatus comprising a deposition chamber capable of being vacuumed and provided with an microwave power introduction means (comprising a microwave transmissive window (made of a alumina ceramic or the like) and a waveguide extending a microwave power source), an exhaust system having a vacuum pump, and a raw material gas introduction means, for example, in the following manner.
an microwave power introduction means comprising a microwave transmissive window (made of a alumina ceramic or the like) and a waveguide extending a microwave power source
an exhaust system having a vacuum pump
a raw material gas introduction means for example, in the following manner.
a substrate on which a deposited film is to be formed is arranged in the deposition chamber.
the inside of the deposition chamber is provisionally evacuated to a desired vacuum degree by means of the vacuum pump.
the substrate is maintained at a desired temperature (for instance, 100 to 450 °C).
a given film-forming raw material gas (together with a given doping gas in the case of forming a doped deposited film of n-type or p-type), if necessary together with a dilution gas, is introduced into the deposition chamber through the raw material gas introduction means.
the gas pressure in the deposition chamber is controlled to a desired value (for instance, 0.5 to 30 mTorr) by means of the vacuum pump.
the microwave power source is switched on to apply a microwave power with a desired oscillation frequency (for instance, 0.1 to 10 GHz) and of a desired wattage (for instance, 0.01 to 1 W/cm 3 ) into the deposition chamber, where plasma glow discharge is caused to decompose the raw material gas whereby producing a plasma, resulting in causing the formation of a deposited film as a semiconductor layer on the substrate at a desired deposition rate (for instance, 0.05 to 20 nm/sec.).
a desired oscillation frequency for instance, 0.1 to 10 GHz
a desired wattage for instance, 0.01 to 1 W/cm 3
the formation of the photoelectric conversion layer by the RF plasma CVD process may be conducted using a RF plasma CVD apparatus comprising a deposition chamber capable of being vacuumed and provided with an RF power introduction means having a RF power source, an exhaust system having a vacuum pump, and a raw material gas introduction means, for example, in the following manner.
a substrate on which a deposited film is to be formed is arranged in the deposition chamber.
the inside of the deposition chamber is provisionally evacuated to a desired vacuum degree by means of the vacuum pump.
the substrate is maintained at a desired temperature (for instance, 100 to 350 °C).
a given film-forming raw material gas (together with a given doping gas in the case of forming a doped deposited film of n-type or p-type), if necessary together with a dilution gas, is introduced into the deposition chamber through the raw material gas introduction means.
the gas pressure in the deposition chamber is controlled to a desired value (for instance, 0.1 to 10 Torr) by means of the vacuum pump.
the RF power source is switched on to apply a RF power with a desired oscillation frequency (for instance, 0.1 to 100 MHz) and of a desired wattage (for instance, 0.001 to 5.0 W/cm 3 ) into the deposition chamber, where plasma glow discharge is caused to decompose the raw material gas whereby producing a plasma, resulting in causing the formation of a deposited film as a semiconductor layer on the substrate at a deposition rate (for instance, 0.01 to 3 nm/sec.).
a desired oscillation frequency for instance, 0.1 to 100 MHz
a desired wattage for instance, 0.001 to 5.0 W/cm 3
the transparent electrode layer (107, 213) serves as a electrode having a property of transmitting light on the light incident side. When the thickness of the transparent electrode is adequately adjusted, it also functions as a reflection preventive layer.
the transparent electrode layer is required to have a sufficient transmittance for light having a wavelength which is capable of being absorbed by the photoactive semiconductor layer and a sufficiently low electric resistance.
the transmittance it is preferably 80% or more, more preferably 85% or more, most preferably 90% or more, for light having a wavelength of 550 nm or more.
the electric resistance it is preferably 5 x 10 -3 ⁇ cm or less, more preferably 1 x 10 -3 ⁇ cm or less.
the transparent electrode layer is constituted by an electrically conductive material selected from the group consisting of inorganic oxides such as In 2 O 3 , SnO 2 , ITO (In 2 O 3 -SnO 2 ), ZnO, CdO, Cd 2 SnO 4 , TiO 2 , Ta 2 O 5 , Bi 2 O 3 , MoO 3 and Na x WO 3 and mixtures of these inorganic oxides. Any of these electrically conductive materials may contain a conductivity-controlling dopant.
inorganic oxides such as In 2 O 3 , SnO 2 , ITO (In 2 O 3 -SnO 2 ), ZnO, CdO, Cd 2 SnO 4 , TiO 2 , Ta 2 O 5 , Bi 2 O 3 , MoO 3 and Na x WO 3 and mixtures of these inorganic oxides.
Any of these electrically conductive materials may contain a conductivity-controlling dopant.
the transparent electrode layer is comprised of ZnO.
Sn, F, Te, Ti, Sb and Pb there can mentioned F, Sb, P, As, In, Tl, Te, W, Cl, Br and I.
the transparent electrode layer constituted by any of the above mentioned materials may be formed by means of a conventional manner such as electron beam evaporation, sputtering, CVD, spray coating, spin coating, or dip coating.
the transparent electrode layer may be designed to have an even surface or an uneven surface.
the uneven surface may be an irregular surface provided with a plurality of linear irregularities or recesses based on the uneven surface structure of the substrate.
the collecting electrode (108, 214) serves to effectively collect an electric current generated.
the collecting electrode is not always necessary to be used. It is disposed on a part of the surface of the transparent electrode (107, 213) if required when the electric resistance of the transparent electrode is difficult to be sufficiently lowered. In this case, the collecting electrode functions to lower the electric resistance of the transparent electrode.
the collecting electrode may be constituted by a metal selected from the group consisting of Au, Ag, Cu, Al, Ni, Fe, Cr, Mo, W, Ti, Co, Ta, Nb and Zr or an alloy selected from the group consisting of alloys such as Ti, Cr, Mo, W, Al, Ag, Ni, Cu, Sn, or an alloy of these metals.
the collecting electrode may be formed of an electrically conductive paste.
the electroconductive paste can include electrically conductive pastes comprising powdery Ag, Au, Cu, Ni, or carbon dispersed in an appropriate binder resin.
the collecting electrode may be formed by means of evaporation, sputtering or plating, using a mask pattern.
the formation of the collecting electrode using the above described electroconductive paste can be conducted by subjecting the electroconductive paste to screen printing.
the production thereof may be conducted, for example, in the following manner.
photovoltaic device having the above constitution, and they are integrated in series connection or in parallel connection depending upon a desired outputting voltage or outputting electric current.
a protective member is disposed on each of the surface and the back face of the integrated body obtained and a pair of power outputting terminals are fixed to the resultant. It is possible to dispose the integrated body on an insulating member.
an appropriate reversecurrent preventive diode may be installed therein.
a stainless steel slab obtained by way of the previously described steel making, hot rolling, cold rolling, and final processes.
the slab was subjected to bright-annealing, followed by subjecting to surface finishing by means of a skinpass rolling mill, to thereby obtain a 0.15 ⁇ m thick stainless steel plate (corresponding to a SUS430BA plate prescribed in the JIS Standard) of 50 mm x 50 mm in size.
the stainless steel plate was then subjected to surface etching treatment using a fluorine-nitric acid composition (comprising HF, HNO 3 and H 2 O at a mole ratio of 1 : 3 : 15) for 30 seconds under condition of applying ultrasonic vibration as shown in Table 1-1.
a fluorine-nitric acid composition comprising HF, HNO 3 and H 2 O at a mole ratio of 1 : 3 : 15
the remaining stainless steel substrates were subjected to film formation.
a 0.05 ⁇ m thick Al film as the back reflection layer 102 and a 1.0 ⁇ m thick ZnO film as the transparent and electrically conductive layer 103 were sequentially formed.
the formation of the Al back reflection layer was conducted using a DC magnetron sputtering apparatus shown in FIG. 5 in the following manner under conditions shown in Table 1-1.
the stainless steel substrate was introduced into a deposition chamber 501 of the DC magnetron sputtering apparatus, and the stainless steel substrate (502 in FIG. 5) was positioned on a mounting table 503 having an electric heater installed therein.
the inside of the deposition chamber 501 was evacuated to a vacuum degree of 1 x 10 -6 Torr through a exhaust port connected through a conductance valve 513 to an oil diffusion pump (not shown).
a valve 514 was opened to introduce Ar gas from a gas reservoir (not shown) into the deposition chamber 501 at a flow rate of 50 sccm while adjusting a mass flow controller 516.
the conductance valve 513 was regulated to adjust the inner pressure of the deposition chamber 501 at 7 mTorr.
a target shutter 507 was opened.
a D.C. power of -380 V from a toroidal coil 506 was applied to an Al-target 504 to cause Ar plasma.
the target shutter 507 was closed, and the application of the D.C. power and the introduction of the Ar gas were terminated.
a ZnO film as the transparent and electrically conductive layer 103 was formed by repeating the above film-forming procedures using the magnetron sputtering apparatus shown in FIg. 5 under conditions shown in Table 1-1.
Ar gas was introduced into the deposition chamber 501 at a flow rate 40 sccm, the substrate temperature upon the film formation was made to be 200 °C, and the inner pressure upon the film formation was made to be 5 mTorr.
a D.C. power of -500 V from a D.C. power source 510 was applied to an ZnO-target 508 to cause Ar plasma, and a target shutter 511 was opened.
a target shutter 511 was opened.
the target shutter 511 was closed, and the application of the D.C. power and the introduction of the Ar gas were terminated.
the remaining substrate products were subjected to semiconductor layer formation.
a three-layerd semiconductor layer (comprising an n-type layer 104 composed of an a-Si material, an i-type layer 105 composed of an a-Si material and a p-type layer 106 composed of a microcrystalline Si material (a uc-Si material) stacked in the named order from the substrate side) under conditions shown in Table 1-1, using a multi-chambered film-forming apparatus shown in FIG. 6.
the n-type and p-type layers were formed by means of a RF plasma CVD process.
the i-type layer was formed by means of the RF plasma CVD process and a microwave plasma CVD process.
the i-type layer herein has a three-layerd structure comprising an i-type layer formed by the RF plasma CVD process (this i-type layer will be hereinafter referred to as first RF i-type layer), an i-type layer formed by the microwave plasma CVD process (this i-type layer will be hereinafter referred to as MW i-type layer) and a second RF i-type layer formed by the RF plasma CVD process.
the formation of the three-layered semiconductor layer with a pin junction was formed in the following manner.
a gate valve 606 was opened, and the substrate holder 690 was moved into an n-type layer transportation chamber 602 including a deposition chamber 617 for the formation of an n-type layer.
the gate valve 606 was closed.
the substrate holder 690 was moved to position under a substrate temperature controlling means 610 of the deposition chamber 617, where hydrogen gas was flown to make the inner pressure of the n-type layer transportation chamber 602 such that it was substantially the same as that upon conducting the film formation of the n-type layer.
the substrate temperature controlling means 610 was descended to heat the substrate product to and maintain it at 330 °C (see, Table 1-1) by means of the substrate temperature controlling means.
raw material gases shown in Table 1-1 for the formation of the n-type layer were introduced into the deposition chamber 617.
the inner pressure of the deposition chamber 617 was controlled to and maintained at 1.2 Torr by means of a vacuuming pump (not shown).
a RF power source 622 was switched on to apply a RF power of 2 W was applied into the deposition chamber 617 through a RF power introduction cup 620, where glow discharge was generated to cause the formation of a 20 nm thick n-type a-Si semiconductor film as the n-type layer on the ZnO film as the transparent and electrically conductive layer.
the application of the RF power and the introduction of the raw material gases were terminated.
the inside of the transportation chamber 602 was evacuated to a vacuum degree of about 10 -6 Torr by means of a turbo-molecular pump (not shown).
the substrate controlling means 610 was lifted, a gate valve 607 was opened, and the substrate holder 690 was moved into an i-type layer transportation chamber 603 including a deposition chamber 618 for the formation of an i-type layer.
the gate valve 607 was closed.
the substrate holder 690 was then moved to position under a substrate temperature controlling means 611 of the deposition chamber 618, where hydrogen gas was flown to make the inner pressure of the transportation chamber 603 such that it was substantially the same as that upon conducting the film formation of the first RF i-type layer. Then, the substrate temperature controlling means 611 was descended to control the substrate temperatue to and maintain it at 300 °C (see, Table 1-1) by means of the substrate temperature controlling means.
a raw material gas supply system comprising a gas introduction pipe 649, stop valves 650-655 and 661-665 and mass flow controllers 656-660, raw material gases shown in Table 1-1 for the formation of the first RF i-type layer were introduced into the deposition chamber 618 under conditions shown in Table 1-1.
the inner pressure of the deposition chamber 618 was controlled to and maintained at 0.5 Torr by means of a vacuuming pump (not shown).
a RF power source 624 was switched on to apply a RF power of 1.7 W into the deposition chamber 618 through a RF bias power introduction electrode 628 to generate glow discharge whereby producing a plasma in the deposition chamber 618.
the shutter 650 was opened to cause the formation of a 10 nm thick i-type a-Si semiconductor film as the first RF i-type layer on the n-type layer.
the shutter 695 was closed, and the application of the RF power and the introduction of the raw material gases were terminated. Then, the inside of the deposition chamber 603 was evacuated to a vacuum degree of about 10 -6 Torr by means of a turbo-molecular pump (not shown).
a microwave power source (not shown) was switched on to apply a microwave power of 200 W was applied into the deposition chamber 618 through a waveguide 626 and a microwave introduction window 625, and simultaneously with this, a RF bias power of 700 W from a RF bias power source (not shown) was applied into the deposition chamber 618 through the electrode 628, where glow discharge was generated to produce a plasma in the deposition chamber 618.
the shutter 695 was opened to cause the formation of a 70 nm thick i-type a-Si semiconductor film as the MW i-type layer on the first RF i-type layer.
the shutter 695 was closed, and the application of the MW power and the RF bias power and the introduction of the raw material gases were terminated. Then, the inside of the deposition chamber 602 was evacuated to a vacuum degree of about 10 -6 Torr by means of a turbo-molecular pump (not shown).
the above procedures for the formation of the first RF i-type layer were repeated to form a 20 nm thick i-type a-Si semiconductor film as the second RF i-type layer on the MW i-type layer.
the application of the RF power and the introduction of the raw material gases were terminated.
the inside of the transportation chamber 603 was evacuated to a vacuum degree of about 10 -6 Torr by means of a turbo-molecular pump (not shown).
the substrate temperature controlling means 611 was lifted, a gate valve 608 was opened, and the substrate holder 690 was moved into an p-type layer transportation chamber 604 including a deposition chamber 619 for the formation of an p-type layer.
the gate valve 608 was closed.
the substrate holder 690 was moved to position under a substrate temperature controlling means 612 of the deposition chamber 619, where through a raw material gas supply system comprising stop valves 670-674 and 681-684 and mass flow controllers 676-679, hydrogen gas (H 2 gas) was introduced into the deposition chamber 619 to make the inner pressure of the transportation chamber 604 such that it was substantially the same as that (2.0 Torr) upon conducting hydrogen plasma treatment for the surface of the second RF i-type layer. Then, the substrate temperature controlling means 612 was descended to control the substrate temperature to and maintain it at 200 °C (see, Table 1-1) by means of the substrate temperature controlling means.
H 2 gas hydrogen gas
a RF power source 623 was switched on to apply a RF power of 30 W into the deposition chamber 619 through a RF power introduction cup 621, whereby glow discharge was generated in the hydrogen gas to produce hydrogen plasma, by which the surface of the second RF i-type layer was treated for 30 seconds.
the conditions for this hydrogen plasma treatment are shown in Table 1-1.
the substrate temperature controlling means 612 was lifted. Then, hydrogen gas was flown into the p-type layer transportation chamber for 5 minutes. Thereafter, the introduction of the hydrogen gas was terminated. Then, the inside of the transportation chamber 604 was evacuated to a vacuum degree of about 10 -6 Torr by means of a turbo-molecular pump (not shown). A gate valve 609 was opened, and the substrate holder 690 was moved into an unload chamber 605, where the resultant was cooled. And it was taken out from the film-forming apparatus.
a comb-shaped collecting electrode (having the configuration shown in FIG. 4) comprising Cr(100 nm)/Ag(1 ⁇ m)/Cr(100 nm) by means of a vacuum evaporation process.
Example 1 The procedures of Example 1 were repeated, except that abrasive polishing and buff polishing were additionally conducted in the surface treatment of the SUS plate in Example 1, to thereby obtain a substrate specimen as Substrate Sample Comp. 1-1 for evaluation, a substrate product as Substrate Product Sample Comp. 1-4 for evaluation, and five photovoltaic device samples as Element Sample Comp. 1-1 for evaluation.
Example 1 The procedures of Example 1 were repeated, except that abrasive polishing, buff polishing and electrolytic polishing were additionally conducted in the surface treatment of the SUS plate in Example 1, to thereby obtain a substrate specimen as Substrate Sample Comp. 1-2 for evaluation, a substrate product as Substrate Product Sample Comp. 1-5 for evaluation, and five photovoltaic device samples as Element Sample Comp. 1-2 for evaluation.
Example 1 The procedures of Example 1 were repeated, except that surface texturing treatment by way of beads-blasting treatment at an air pressure of 0.5 Kgf/cm 2 was conducted after the bright annealing in the surface treatment of the SUS plate in Example 1, to thereby obtain a substrate specimen as Substrate Sample Comp. 1-3 for evaluation, a substrate product as Substrate Product Sample Comp. 1-6 for evaluation, and five photovoltaic device samples as Element Sample Comp. 1-3 for evaluation.
the sample Ex. 1-1 has an irregular surface pattern provided with linear irregularities arranged in a given direction
the sample Comp. 1-1 has a substantially flat surface pattern with no linear irregularities
the sample Comp. 1-2 has a flatter surface pattern than the Comp. 1-1 and having no linear irregularities
the sample Comp. 1-3 has a surface pattern having an irregular texture structure distributed on the entire surface area and having no linear irregularities.
the total reflectance (the sum of the regular reflectance and diffuse reflectance) and the diffuse reflectance were examined using a spectrophotometer provided with an integrating sphere.
Table 1-3 The examined results obtained are collectively shown in Table 1-3.
the values shown in Table 1-3 are normalized based on the values obtained for the substrate product sample of Ex. 1-2.
the substrate product sample Ex. 1-2 has a apparently large mean particle size ratio for the ZnO film and excels in the total reflectance and diffuse reflectance.
Each of the substrate product samples Comp. 1-4 and Comp. 1-5 has a relatively small mean particle ratio for the ZnO film and is inferior in the diffuse reflectance.
the substrate product sample Comp. 1-6 is inferior in the total reflectance, though it is relatively high in the diffuse reflectance.
each of the five photovoltaic device samples of each Element Sample was cut into 25 elements having an equal area. By this, there were obtained 125 elements in total for each Element Sample.
Table 1-4 are values relative to the numerical value of the Element Sample Ex. 1-1 with respect to the yield, which is set at 1.0.
This evaluation was conducted by way of a conventional adhesion strength test in the following manner. For one randomly selected from the 125 elements of each Element Sample, 10 incisions were made crosswise at an interval of lmm at the surface thereof to form a lattice pattern comprising 100 measures. Then, a cellophane adhesive tape was sufficiently laminated on the lattice pattern, followed by instaneously peeling off the cellophane adhesive tape. And the area of the element which was peeled was examined. The peeled area thus examined was made to be the adhesion strength.
Table 1-4 The evaluated results obtained are collectively shown in Table 1-4.
the values shown in Table 1-4 are values relative to the peeled area of the Element Sample Ex. 1-1, which is set at 1.0.
Table 1-4 The evaluated results obtained are collectively shown in Table 1-4.
the values shown in Table 1-4 are values relative to the initial photoelectric conversion efficiency of the Element Sample Ex. 1-1, which is set at 1.0.
Table 1-4 The evaluated results obtained are collectively shown in Table 1-4.
the values shown in Table 1-4 are values relative to the change of rate of the Element Sample Ex. 1-1, which is set at 1.0.
Table 1-4 The evaluated results obtained are collectively shown in Table 1-4.
the values shown in Table 1-4 are values relative to the change of rate of the Element Sample Ex. 1-1, which is set at 1.0.
Table 1-4 The evaluated results obtained are collectively shown in Table 1-4.
the values shown in Table 1-4 are values relative to the change of rate of the Element Sample Ex. 1-1, which is set at 1.0.
Element Samples Comp. 1-1 and Comp. 1-2 are inferior to the Element Sample Ex. 1-1 also in therms of other evaluation items.
the Element Samples Comp. 1-1 and Comp. 1-2 are thus inferior to the Element Sample Ex. 1-1, it is considered mainly due to a decrease in the fill factor (F.F.) caused by an increase in the series resistance because of the insufficiency in the adhesion strength.
F.F. fill factor
the Element Sample Com. 1-3 is apparently inferior to the Element Sample Ex. 1-1 in terms of the initial photoelectric conversion efficiency and the photoelectric conversion efficiency after endurance. For the reason why the Element Sample Com. 1-3 is inferior to the Element Sample Ex. 1-1 in terms of the initial photoelectric conversion efficiency, it is considered such that in the Element Sample Com. 1-3, the magnitude of the irregularities is excessively large and because of this, certain defects are occurred in the semiconductor layer portion to cause an decrease in the shunt resistance, resulting a decrease in the fill factor (F.F) and also in the open circuit voltage (Voc).
the photovoltaic device (the Element Sample Ex. 1-1) is apparently superior to any of the conventional photovoltaic devices (the Element Samples Comp. 1-1, Comp. 1-2 and Comp. 1-3) in terms of the photovoltaic characteristics.
Each stainless steel slab was subjected to surface roughing treatment by a different manner as shown in Table 2-1, particularly a manner of conducting bright-annealing or/and conducting a combination of annealing and acid-washing or/and conducting or not conducting surface finishing by means of a skinpass rolling mill, and conducting mechanical polishing (belt polishing, buff polishing, or barrel polishing) or electrolytic polishing.
the stainless steel plate was introduced into the deposition chamber 501 of the DC magnetron sputtering apparatus shown in FIG. 5, and the stainless steel plate (502 in FIG. 5) was positioned on the mounting table 503 having the electric heater installed therein.
the temperature of the stainless steel plate was controlled to and maintained at a temperature of RT to 200 °C by means of the heater.
the inside of the deposition chamber 501 was evacuated to a vacuum degree of 1 x 10 -6 Torr through the exhaust port connected through the conductance valve 513 to the oil diffusion pump (not shown).
the valve 514 was opened to introduce Ar gas from the gas reservoir (not shown) into the deposition chamber 501 at a flow rate of 50 sccm while adjusting the mass flow controller 516.
the conductance valve 513 was regulated to adjust the inner pressure of the deposition chamber 501 at 6 mTorr.
a RF power of a wattage in the range of 100 to 600 W from the sputtering power source 506 was applied to the stainless steel plate to generate glow discharge whereby producing Ar plasma in the deposition chamber 501, where the generation of the glow discharge producing the Ar plasma was continued for 2 to 10 minutes, whereby the surface of the stainless steel plate was etched by the Ar plasma.
a photoelectric conversion layer having a stacked structure with a pin junction was formed in the same manner as in Example 1 under conditions shown in Table 2-1, and a transparent electrode composed of In 2 O 3 and a collecting electrode were formed on the photoelectric conversion layer in the same manner as in Example 1 under conditions shown in Table 2-1.
a photovoltaic device there was obtained a photovoltaic device.
the irregular surface pattern was examined by measuring a center line average roughness Ra(X) in a direction parallel to the linear irregularities and a center line average roughness Ra(Y) in a direction perpendicular to the linear irregularities, wherein canning was conducted for a length L of 400 um and the measurement was conducted at five points for every length of 1 um.
each substrate sample was found to be in the range of 5 to 350 nm for the Ra(X) and in the range of 8 to 650 nm for the Ra(Y).
the photovoltaic device sample in which the substrate product sample of 30 nm in Ra(X), 50 nm in Ra(Y) and 0.6 in Ra(X)/Ra(Y) was used and which was found to be satisfactory in the yield (a) is indicated by a mark O as a standard.
a mark O For the photovoltaic device sample which is superior to the standard in terms of the yield, it is indicated by a mark o ⁇ .
the photovoltaic device sample which is inferior to the standard in terms of the yield it is indicated by a mark ⁇ .
the photovoltaic device sample which is distinguishably inferior to the standard in terms of the yield it is indicated by a mark ⁇ .
the yield of a practically usable photovoltaic device is apparently inferior.
the reason for this was found to be due to an decrease in the shunt resistance because an excessively large magnitude of the linear irregularities.
the yield of a practically usable photovoltaic device is apparently inferior. The reason for this was found to be mainly due to layer peeling.
the photovoltaic device sample in which the substrate sample of 30 nm in Ra(X), 50 nm in Ra(Y) and 0.6 in Ra(X)/Ra(Y) was used and which was found to be satisfactory in the evaluation items (c) and (d) is indicated by a mark O as a standard.
a mark O For the photovoltaic device sample which is superior to the standard in terms of the evaluation items (c) and (d), it is indicated by a mark o ⁇ .
the photovoltaic device sample which is inferior to the standard in terms of the evaluation items (c) and (d) it is indicated by a mark ⁇ .
the photovoltaic device sample which is distinguishably inferior to the standard in terms of the evaluation items (c) and (d) it is indicated by a mark ⁇ .
any of the resultant photovoltaic device samples is quite satisfactory in the evaluation items (c) and (d).
any of the resultant desirable photovoltaic device samples is markedly excellent in the evaluation items (c) and (d).
any of them was found to have an apparent decrease particularly in the open ciurcuit voltage (Voc) after the endurance in the evaluation of the evaluation item (c) or (d). Hence, any of them is understood to be inferior in photovoltaic characteristics.
any of them was found to suffer from an apparent increase in the series resistance mainly due to layer peeling during the evaluation of the evaluation item (c) or (d). Hence, any of them is understood to be apparently inferior in photovoltaic characteristics.
Each stainless steel slab was subjected to surface roughing treatment by a different manner as shown in Table 3-1, particularly a manner of conducting bright-annealing or/and conducting a combination of annealing and acid-washing or/and conducting or not conducting surface finishing by means of a skinpass rolling mill, and conducting mechanical polishing (belt polishing, buff polishing, or barrel polishing) or electrolytic polishing.
Each of the resultant stainless steel plates was subjected to surface etching treatment in the same manner using the sputtering apparatus as in Example 2 and under conditions shown in Table 3-1.
each substrate sample was found to be in the range of 5 to 350 nm for the Ra(X) and in the range of 8 to 650 nm for the Ra(Y).
the constituent crystalline material of the ZnO film is grown to have a desirably large mean grain size.
the total reflectance is decreased while the diffuse reflectance being decreased.
the diffuse reflectance is decreased though the total reflectance is saistactory.
both the total reflectance and the diffuse reflectance are excellent.
the Ra(X) is in the range of 15 to 300 nm
the Ra(Y) is in the range of 20 to 600 nm
the Ra(X)/Ra(Y) is 0.8 or less
both the total reflectance and the diffuse reflectance are markedly excellent.
the photovoltaic device sample in which the substrate product sample of 30 nm in Ra(X), 50 nm in Ra(Y) and 0.6 in Ra(X)/Ra(Y) was used and which was found to be satisfactory in the yield (a) is indicated by a mark ⁇ as a standard.
a mark ⁇ For the photovoltaic device sample which is superior to the standard in terms of the yield, it is indicated by a mark o ⁇ .
the photovoltaic device sample which is inferior to the standard in terms of the yield it is indicated by a mark ⁇ .
the photovoltaic device sample which is distinguishably inferior to the standard in terms of the yield it is indicated by a mark ⁇ .
the yield of a practically usable photovoltaic device is apparently inferior.
the reason for this was found to be due to an decrease in the shunt resistance because an excessively large magnitude of the linear irregularities.
the yield of a practically usable photovoltaic device is apparently inferior. The reason for this was found to be mainly due to layer peeling.
the photovoltaic device sample in which the substrate product sample of 30 nm in Ra(X), 50 nm in Ra(Y) and 0.6 in Ra(X)/Ra(Y) was used and which was found to be satisfactory in the evaluation items (c) and (d) is indicated by a mark O as a standard.
a mark O For the photovoltaic device sample which is superior to the standard in terms of the evaluation items (c) and (d), it is indicated by a mark o ⁇ .
the photovoltaic device sample which is inferior to the standard in terms of the evaluation items (c) and (d) it is indicated by a mark ⁇ .
the photovoltaic device sample which is distinguishably inferior to the standard in terms of the evaluation items (c) and (d) it is indicated by a mark ⁇ .
any of them was found to have an apparent decrease particularly in the open ciurcuit voltage (Voc) after the endurance in the evaluation of the evaluation item (c) or (d). Hence, any of them is understood to be inferior in photovoltaic characteristics.
any of them was found to suffer from an apparent increase in the series resistance mainly due to layer peeling during the evaluation of the evaluation item (c) or (d). Hence, any of them is understood to be apparently inferior in photovoltaic characteristics.
Each of the resultant stainless steel plates was introduced into an annealing apparatus (not shown), wherein the surface thereof was subjected to annealing treatment at a temperature of 600 °C, followed by gradually cooling to room temperature (see, Table 4-1).
each substrate sample was found to be in the range of 5 to 350 nm for the Ra(X) and in the range of 8 to 650 nm for the Ra(Y).
Table 4-3 The evaluated results with respect to the yield (a) are collectively shown in Table 4-3.
the values shown in Table 4-3 are values relative to the yield in the case of 5.0 ⁇ m in the pitch d, which is set at 1.0.
the yield of a practically usable photovoltaic device is inferior.
the reason for this was found to be mainly due to layer peeling.
any of the resultant photovoltaic device samples was found to have an apparent decrease particularly in not only the open ciurcuit voltage (Voc) but also in the fill factor (F.F.) after the endurance in the evaluation of the evaluation item (c) or (d). Hence, any of them is understood to be inferior in photovoltaic characteristics.
any of the resultant photovoltaic device samples was found to suffer from an apparent increase in the series resistance mainly due to layer peeling during the evaluation of the evaluation item (c) or (d). Hence, any of them is understood to be apparently inferior in photovoltaic characteristics.
Each of the resultant stainless steel plates was introduced into an annealing apparatus (not shown), wherein the surface thereof was subjected to annealing treatment at a temperature of 650 °C, followed by gradually cooling to room temperature (see, Table 5-1).
Each of the substrate samples reserved for evaluation was found to have an irregular surface pattern as shown in FIG. 3(d) in which a plurality of first linear irregularities are arranged in a linear arrangement form and a plurality of second linear irregularities are arranged in a direction to the first linear irregularities.
each substrate sample was found to be in the range of 4 to 400 nm for the Ra(X) and in the range of 7 to 700 nm for the Ra(Y).
the substrate samples having a value of the d in the range of 0.5 to 20 ⁇ m were selected.
an average length l of the second linear irregularities arranged in a direction perpendicular to first irregularities in the irregular surface pattern were found to be in the range of from measurement limit to 25 ⁇ m for the average length l.
Table 5-3 The evaluated results with respect to the yield (a) are collectively shown in Table 5-3.
the values shown in Table 5-3 are values relative to the yield in the case of 5.0 ⁇ m in the length l, which is set at 1.0.
any of the resultant photovoltaic device samples was found to have an apparent decrease particularly in not only the open ciurcuit voltage (Voc) but also in the fill factor (F.F.) after the endurance in the evaluation of the evaluation item (c) or (d). Hence, any of them is understood to be inferior in photovoltaic characteristics.
a substrate having an irregular surface with a specific irregular surface structure which is 15 to 300 nm for the Ra(X), 20 to 600 nm for the Ra(Y) and 0.8 or less for the Ra(X)/Ra(Y), and 0.5 to 20 ⁇ m for the pitch d, and 20 ⁇ m or less for the length l enables to efficiently produce a high quality photovoltaic device excelling photovoltaic characteristics at a high yield.
Each stainless steel slab was subjected to surface roughing treatment by a different manner as shown in Table 6-1, particularly a manner of conducting annealing, conducting acid-washing and conducting or not conducting surface finishing by means of a skinpass rolling mill.
Each of the resultant stainless steel sheets was wound on a rotary pay-out reel (not shown).
the pay-out reel having the stainless steel sheet wound thereon was set to an annealing apparatus having a reaction chamber and a cooling chamber (not shown).
a rotary take-up reel (not shown) for taking up the stainless steel sheet released from the pay-out reel was also set to the annealing apparatus.
the pay-out reel and the take-up reel were positioned such that they were opposed to each other through the annealing apparatus.
a part of the stainless steel sheet on the pay-out reel was released to fix to the take-up reel while extending the stainless steel sheet in the raction chamber and cooling chamber of the annealing apparatus.
the irregular surface of the stainless steel sheet was subjected to annealing treatment at a temperature in the range of 550 to 650 °C in the reaction chamber, followed by cooling to room temperature in the cooling chamber, while continuously moving the stainless steel sheet to pass through the reaction chamber and the cooling chamber by rotating the pay-out and take-up reels.
substrate specimen For each of the substrate web samples thus obtained, a part of which was cut to obtain a specimen for evaluation (this will be hereinafter referred to as substrate specimen).
substrate product specimen For each of the substrate web product samples thus obtained, a part of which was cut to obtain a specimen for evaluation (this will be hereinafter referred to as substrate product specimen).
a multi-layerd photoelectric conversion layer comprising a pin junction bottom cell (comprising an n-type layer, a three-layered i-type layer (comprising a RF i-type layer, MW i-type layer and a RF i-type layer) and a p-type layer), a pin junction middle cell (comprising an n-type layer, a three-layered i-type layer (comprising a RF i-type layer, MW i-type layer and a RF i-type layer) and a p-type layer) and a pin junction top cell (comprising an n-type layer, a single-layered i-type layer (comprising a RF i-type layer) and a p-type layer) stacked in the named order from the substrate side in accordance with a conventional roll-to
FIG. 7(a) is a schematic diagram illustrating the constitution of the plasma CVD apparatus.
FIG. 7(b) is a schematic view illustrating the multi-chambered arrangement in the plasma CVD apparatus shown in FIG. 7(a), viewed from above the multi-chambered arrangement.
the plasma CVD apparatus shown in FIGs. 7(a) and 7(b) comprises a substrate pay-out chamber 729 containing a pay-out reel 721 having a substrate web 740 wound thereon (this substrate web corresponding to the foregoing substrate web product sample), a plurality of deposition chambers 701-713, and a substrate take-up chamber 730 containing a take-up reel 723 for taking up the substrate web 740 transported.
Each adjacent chambers are isolated by an isolation passage 714.
Each chamber is provided with an exhaust port extending from a vacuuming means so that the inside of the chamber can be vacuumed.
the substrate web 740 paid out from the pay-out reel 721 is transported through the isolation passage into the deposition chamber 701. In this way, the substrate web 740 is transported into the successive chambers 702-713, and it is finally taken up and wound on the take-up reel 724 in the take-up chamber 730.
the plasma CVD apparatus is structured such that a desired raw material gas is introduced into the respective deposition chambers while flowing a scavenging gas into the respective isolation passage 714, where film-formation in each deposition chamber can be independently conducted without influencing to adjacent deposition chambers.
Each deposition chamber is provided with a substrate temperature controlling means (not shown) in order to maintain the substrate web 740 at a desired temperature suitable for the formation of a film therein.
each of the deposition chambers 701-713 is provided with a raw material gas introduction port 715 extending from a raw material gas supply system (not shown) and an exhaust port 716 connected to a vacuuming pump such as oil diffusion pump, mechanical booster pump or the like.
Each of the deposition chambers 701, 702, 704-707, and 709-713 is provided with a RF power introduction electrode 717 electrically connected to a RF power source (not shown).
Each of the deposition chambers 703 and 708 is provided with a microwave applicator 718 extending from a microwave power source (not shown) and a bias electrode 720 electrically connected toa RF power source (not shown).
Each isolation passage 714 is provided with an inlet port 719 for flowing a scavenging gas thereinto. The scavenging gas is flown in a direction as shown in FIG. 7(b).
the pay-out chamber 729 provided with a delivery roll 722 for delivering the substrate web paid out from the pay-out reel 721 toward the take-up chamber 730 while passing through the respective deposition chambers.
the take-up chamber 730 is provided with a guide roller 724 for maintaining the substrate web 740 in a horizontal state with an adequate tensile force.
the formation of the photoelectric conversion layer in the above described plasma CVD apparatus was conducted as follows.
Each of the substrate web products obtained in the above step 2 was wound on the take-up reel 721 (having an average radius of curvature of 30 cm).
the take-up reel 721 was set in the pay-out chamber 729, the substrate web product 714 was delivered to pass through the respective deposition chambers and its tip was fixed to the take-up reel in the take-up chamber 730.
a scavenging gas was flown into the plasma CVD apparatus through the respective inlet ports 719 as shown in FIG. 7(b), where while moving the substrate web product 714 in a direction indicated by an arrow mark in FIG. 7(a) toward the take-up chamber 730, the substrate web product was successively taken up by and wound on the take-up reel 723. Desired raw material gas was introduced into each deposition chamber, where the raw material gas was prevented from diffusing into adjacent deposition chambers by properly adjusting the flow rate of the scavenging gas introduced into the respective isolation passages or the inner pressures of the respective deposition chambers.
a bottom pin junction cell in a first zone comprising the deposition chambers 701-705 where there were formed an n-type a-Si layer was formed in the deposition chamber 701, a RF i-type a-Si layer in the deposition chamber 702, a MW i-type a-Si layer in the deposition chamber 703, a RF i-type a-Si layer in the deposition chamber 704, and a p-type microcrystalline Si layer in the deposition chamber 705; a middle pin junction cell in a second zone comprising the deposition chambers 706-710 where there were formed an n-type a-Si layer was formed in the deposition chamber 706, a RF i-type a-Si layer in the deposition chamber 707, a MW i-type a-Si layer in the deposition chamber
the introduction of the RF power sources, the microwave power sources and the RF bias power sources were terminated.
the introduction of the raw material gases and the scavenging gas were terminated.
the entire inside pressure of the plasma CVD apparatus was returned to atmospheric pressure, and the take-up reel 723 was taken out from the plasma CVD apparatus.
Each long photovoltaic device was cut to obtain a photovoltaic device sample of 250 mm x 100 mm in size.
Each of the substrate specimens reserved for evaluation was found to have an irregular surface pattern as shown in FIG. 3(d) in which a plurality of first linear irregularities are arranged in a linear arrangement form and a plurality of second linear irregularities are arranged in a direction to the first linear irregularities.
each substrate specimen was found to be in the range of 3 to 350 nm for the Ra(X) and in the range of 5 to 650 nm for the Ra(Y).
the substrate specimens having a value of the d in the range of 0.5 to 20 ⁇ m were selected.
an average length l of the second linear irregularities arranged in a direction perpendicular to first irregularities in the irregular surface pattern were found to be 25 ⁇ m or less for the average length l.
Table 6-3 The evaluated results with respect to the yield (a) are collectively shown in Table 6-3.
the values shown in Table 6-3 are values relative to the yield in the case of 5.0 ⁇ m in the length l, which is set at 1.0.
Table 6-4 The evaluated results with respect to the degradation in HHRB test (c) and the degradation in temperature and humidity cycle test (d) are collectively shown in Table 6-4.
the values shown in Table 6-4 are values relative to the corresponding values in the case of 5.0 ⁇ m in length l, which are set at 1.0.
any of the resultant photovoltaic device samples was found to have an apparent decrease particularly in not only the open ciurcuit voltage (Voc) but also in the fill factor (F.F.) after the endurance in the evaluation of the evaluation item (c) or (d). Hence, any of them is understood to be inferior in photovoltaic characteristics.
a substrate having an irregular surface with a specific irregular surface structure which is 15 to 300 nm for the Ra(X), 20 to 600 nm for the Ra(Y) and 0.8 or less for the Ra(X)/Ra(Y), and 0.5 to 20 ⁇ m for the pitch d, and 20 ⁇ m or less for the length l enables to efficiently produce a high quality photovoltaic device excelling photovoltaic characteristics at a high yield.
the stainless steel slab obtained by using the previously described steel making, hot rolling, cold rolling and final processes.
the stainless steel slab was subjected to surface roughing treatment by a manner of conducting annealing and conducting surface finishing by means of a skinpass rolling mill.
the resultant stainless steel plate was introduced into a dry etching pparatus (not shown), wherein the surface thereof was subjected to etching treatment in a gaseous atmosphere composed of CCl 4 or Cl 2 gas at a temperature of RT for 5 minutes while applying a RF power of 200 W, followed by cooling to room temperature (see, Table 7-1).
substrate specimen Ex. 7-1 A part of the resultant substrate was cut to obtain a specimen for evaluation (this specimen will be hereinafter referred to as substrate specimen Ex. 7-1).
substrate product specimen Ex. 7-2 A part of the resultant substrate product was cut to obtain a specimen for evaluation (this specimen will be hereinafter referred to as substrate product specimen Ex. 7-2).
Example 7 The procedures of Example 7 were repeated, except that the formation of the ZnO transparent electrode layer was conducted under conditions of 10 um for the thickness and 450 °C for the substrate temperature, to thereby obtain a substrate specimen (Comp. 7-1), a substrate product specimen (Comp. 7-2) and a photovoltaic device (Element Comp. 7-1).
the surface state was examined by means of a electron microscope (SEM).
each of the specimens Ex. 7-1 and Ex. 7-2 was found to have a irregular surface pattern comprising a plurality of linear irregularities arranged in a linear arrangement form as shown in FIG. 3(a). And this irregular surface patten was found to have been influenced to the surface of the photovoltaic device.
Each of the substrate specimen Comp. 7-1 and the substrate product specimen Comp. 7-2 was found to have an irregular surface pattern similar to that in the case of each of the substrate specimen Ex. 7-1 and the substrate product specimen Ex. 7-2.
the surface of the Element Comp. 7-1 was found to have no such linear irregularities as in the case of the Element Ex. 7-1 but have other irregularities seemingly based on ZnO grain boundaries.
the values of the Element Comp. 7-1 shown in Table 7-3 are values relative to the corresponding values of the Element Ex. 7-1, which are set at 1.0.
the Element Ex. 7-1 is superior to the Element Comp. 7-1 in all the evaluation items.
the reason why the former is superior to the latter is considered due to an decrease in the fill factor (F.F.) mainly based on an increase in the series resistance caused because of insufficient adhesion strength.
Each stainless steel slab was subjected to surface roughing treatment by a different manner as shown in Table 8-1, particularly a manner of conducting annealing, conducting acid-washing and conducting or not conducting surface finishing by means of a skinpass rolling mill.
Each of the resultant stainless steel plates was introduced into an annealing apparatus (not shown), wherein the surface thereof was subjected to annealing treatment at a temperature of 650 °C, followed by gradually cooling to room temperature (see, Table 8-1).
a multi-chambered plasma plasma CVD apparatus having a hydrogen-assisted plasma CVD deposition chamber for forming a polycrystalline deposited film (not shown) and under conditions shown in Table 8-1, on the ZnO film of each substrate product sample, there were sequentially formed an n + -type layer composed of an a-Si material in the same manner, an i-type layer composed of a polycrystalline Si material in the hydrogen-assisted plasma CVD chamber, and a p-type layer composed of a microcrystalline Si material in the same manner as in Example 5.
Each of the substrate samples reserved for evaluation was found to have an irregular surface pattern as shown in FIG. 3(d) in which a plurality of first linear irregularities are arranged in a linear arrangement form and a plurality of second linear irregularities are arranged in a direction to the first linear irregularities.
each substrate sample was found to be in the range of 3 to 350 nm for the Ra(X) and in the range of 12 to 630 nm for the Ra(Y).
the substrate samples having a value of the d in the range of 0.5 to 20 ⁇ m were selected.
an average length l of the second linear irregularities arranged in a direction perpendicular to first irregularities in the irregular surface pattern were found to be in the range of measurement limit to 25 ⁇ m for the average length l.
Table 8-3 The evaluated results with respect to the yield (a) are collectively shown in Table 8-3.
the values shown in Table 8-3 are values relative to the yield in the case of 7.5 ⁇ m in the length l, which is set at 1.0.
any of the resultant photovoltaic device samples was found to have an apparent decrease particularly in not only the open ciurcuit voltage (Voc) but also in the fill factor (F.F.) after the endurance in the evaluation of the evaluation item (c) or (d). Hence, any of them is understood to be inferior in photovoltaic characteristics.
back reflection layer Al 50nm, substrate temperature: RT transparent and electronically conductive layer ZnO: 1 ⁇ m, substrate temperature: 200 °C n-type layer SiH 4 : 1sccm, H 2 : 45sccm, PH 3 (diluted to 1% by H 2 ): 0.5sccm, inner pressure: 1.2Torr, RF power: 2W, substrate temperature: 330 °C, layer thickness: 20nm RFi-type layer Si 2 H 6 : 4sccm, H 2 : 90sccm, inner pressure: 0.5Torr, RF power: 1.7W, substrate temperature: 300 °C, layer thickness: 10nm MWi-type layer SiH 4 : 40sccm, GeH 4 : 40sccm, H 2 : 150sccm, inner pressure: 8mTorr, MW power: 200W, RF bias power: 700W, substrate temperature: 380 °C, layer thickness: 70nm RFi-type

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EP97301265A 1996-02-27 1997-02-26 Photovoltaic device provided with an opaque substrate having a specific irregular surface structure Expired - Lifetime EP0793277B1 (en)

Applications Claiming Priority (3)

Application Number	Priority Date	Filing Date	Title
JP39856/96		1996-02-27
JP3985696		1996-02-27
JP3985696		1996-02-27

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EP0793277A2 EP0793277A2 (en)	1997-09-03
EP0793277A3 EP0793277A3 (en)	1998-09-09
EP0793277B1 true EP0793277B1 (en)	2001-08-22

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US (1)	US6072117A (zh)
EP (1)	EP0793277B1 (zh)
KR (1)	KR100267515B1 (zh)
CN (1)	CN1096713C (zh)
DE (1)	DE69708463T2 (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
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Families Citing this family (81)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US6388301B1 (en) *	1998-06-01	2002-05-14	Kaneka Corporation	Silicon-based thin-film photoelectric device
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AUPQ293099A0 (en) *	1999-09-17	1999-10-14	Pacific Solar Pty Limited	Recrystallization of semiconductor material
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US6787692B2 (en)	2000-10-31	2004-09-07	National Institute Of Advanced Industrial Science & Technology	Solar cell substrate, thin-film solar cell, and multi-junction thin-film solar cell
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US7485799B2 (en) *	2002-05-07	2009-02-03	John Michael Guerra	Stress-induced bandgap-shifted semiconductor photoelectrolytic/photocatalytic/photovoltaic surface and method for making same
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US7306823B2 (en)	2004-09-18	2007-12-11	Nanosolar, Inc.	Coated nanoparticles and quantum dots for solution-based fabrication of photovoltaic cells
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US7732229B2 (en)	2004-09-18	2010-06-08	Nanosolar, Inc.	Formation of solar cells with conductive barrier layers and foil substrates
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US20090032108A1 (en) *	2007-03-30	2009-02-05	Craig Leidholm	Formation of photovoltaic absorber layers on foil substrates
US8816191B2 (en) *	2005-11-29	2014-08-26	Banpil Photonics, Inc.	High efficiency photovoltaic cells and manufacturing thereof
US20080178932A1 (en) *	2006-11-02	2008-07-31	Guardian Industries Corp.	Front electrode including transparent conductive coating on patterned glass substrate for use in photovoltaic device and method of making same
WO2008100603A1 (en) *	2007-02-15	2008-08-21	Massachusetts Institute Of Technology	Solar cells with textured surfaces
US20100186798A1 (en) *	2007-05-28	2010-07-29	Consiglio Nazionale Delle Ricerche- Infm Istituto Nazionale Per La Fisica Della Materia	Photovoltaic device with enhanced light harvesting
US7846750B2 (en) *	2007-06-12	2010-12-07	Guardian Industries Corp.	Textured rear electrode structure for use in photovoltaic device such as CIGS/CIS solar cell
US7875945B2 (en) *	2007-06-12	2011-01-25	Guardian Industries Corp.	Rear electrode structure for use in photovoltaic device such as CIGS/CIS photovoltaic device and method of making same
US20080308147A1 (en) *	2007-06-12	2008-12-18	Yiwei Lu	Rear electrode structure for use in photovoltaic device such as CIGS/CIS photovoltaic device and method of making same
CN101355109A (zh) *	2007-07-26	2009-01-28	鸿富锦精密工业（深圳）有限公司	太阳能电池组件及其制造设备
CN101359698A (zh) *	2007-08-01	2009-02-04	鸿富锦精密工业（深圳）有限公司	太阳能电池及其制造设备和制造方法
CN101363266A (zh) *	2007-08-09	2009-02-11	鸿富锦精密工业（深圳）有限公司	太阳能屋
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JP4418500B2 (ja) *	2008-03-28	2010-02-17	三菱重工業株式会社	光電変換装置及びその製造方法
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US8895844B2 (en) *	2009-10-23	2014-11-25	The Board Of Trustees Of The Leland Stanford Junior University	Solar cell comprising a plasmonic back reflector and method therefor
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US20110120536A1 (en) *	2009-11-20	2011-05-26	Dapeng Wang	Roughness control of a wavelength selective reflector layer for thin film solar applications
JP2011114004A (ja) *	2009-11-24	2011-06-09	Panasonic Electric Works Co Ltd	有機太陽電池
US8212250B2 (en)	2009-12-10	2012-07-03	Leonard Forbes	Backside texturing by cusps to improve IR response of silicon solar cells and photodetectors
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US8999857B2 (en)	2010-04-02	2015-04-07	The Board Of Trustees Of The Leland Stanford Junior University	Method for forming a nano-textured substrate
US8692198B2 (en)	2010-04-21	2014-04-08	Sionyx, Inc.	Photosensitive imaging devices and associated methods
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US8404302B2 (en) *	2010-07-14	2013-03-26	Sharp Laboratories Of America, Inc.	Solution process for fabricating a textured transparent conductive oxide (TCO)
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US9064764B2 (en)	2012-03-22	2015-06-23	Sionyx, Inc.	Pixel isolation elements, devices, and associated methods
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CN107104171B (zh) *	2017-05-17	2019-06-04	常州大学	一种微纳米结构铁酸铋光伏器件的制备方法
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Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4377723A (en) *	1980-05-02	1983-03-22	The University Of Delaware	High efficiency thin-film multiple-gap photovoltaic device
US4571448A (en) *	1981-11-16	1986-02-18	University Of Delaware	Thin film photovoltaic solar cell and method of making the same
JPS594310A (ja) *	1982-06-30	1984-01-11	Toshiba Corp	弾性表面波装置
IL69756A0 (en) *	1982-09-24	1983-12-30	Energy Conversion Devices Inc	System and method for making large area photovoltaic devices
US4493942A (en) *	1983-01-18	1985-01-15	Exxon Research And Engineering Co.	Solar cell with two-dimensional reflecting diffraction grating
JPS59152676A (ja) *	1983-02-21	1984-08-31	Sumitomo Electric Ind Ltd	アモルフアスシリコン光起電力素子
US4532372A (en) *	1983-12-23	1985-07-30	Energy Conversion Devices, Inc.	Barrier layer for photovoltaic devices
US4598306A (en) *	1983-07-28	1986-07-01	Energy Conversion Devices, Inc.	Barrier layer for photovoltaic devices
JPS604187A (ja) *	1983-06-20	1985-01-10	Taiho Yakuhin Kogyo Kk	ピラゾ−ル化合物
IN165761B (zh) *	1983-07-28	1990-01-06	Energy Conversion Devices Inc
JPS6214788A (ja) *	1985-07-12	1987-01-23	Res Assoc Util Of Light Oil	メタクリル酸の製造方法
JPH03205879A (ja) *	1990-01-08	1991-09-09	Hitachi Ltd	太陽電池
JP2923193B2 (ja) *	1993-12-30	1999-07-26	キヤノン株式会社	光電変換素子の製造方法

1997
- 1997-02-26 DE DE69708463T patent/DE69708463T2/de not_active Expired - Lifetime
- 1997-02-26 US US08/806,315 patent/US6072117A/en not_active Expired - Lifetime
- 1997-02-26 EP EP97301265A patent/EP0793277B1/en not_active Expired - Lifetime
- 1997-02-27 KR KR1019970006324A patent/KR100267515B1/ko not_active IP Right Cessation
- 1997-02-27 CN CN97109999A patent/CN1096713C/zh not_active Expired - Fee Related

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
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US8927315B1 (en)	2005-01-20	2015-01-06	Aeris Capital Sustainable Ip Ltd.	High-throughput assembly of series interconnected solar cells
TWI558830B (zh) *	2010-12-22	2016-11-21	奇異電器公司	製造透明導電氧化物層之方法

Also Published As

Publication number	Publication date
CN1174415A (zh)	1998-02-25
KR970063769A (ko)	1997-09-12
EP0793277A2 (en)	1997-09-03
DE69708463T2 (de)	2002-05-16
EP0793277A3 (en)	1998-09-09
CN1096713C (zh)	2002-12-18
DE69708463D1 (de)	2001-12-20
KR100267515B1 (ko)	2000-10-16
US6072117A (en)	2000-06-06

Publication	Publication Date	Title
EP0793277B1 (en)	2001-08-22	Photovoltaic device provided with an opaque substrate having a specific irregular surface structure
US6331672B1 (en)	2001-12-18	Photovoltaic cell and method for manufacturing the same
EP0895291B1 (en)	2003-01-29	Photovoltaic element and method of producing the same
US6106689A (en)	2000-08-22	Process for forming zinc oxide film and processes for producing semiconductor device substrate and photo-electricity generating device using the film
KR100294102B1 (ko)	2001-09-07	특정도핑층을구비한광기전력소자
US6184456B1 (en)	2001-02-06	Photovoltaic device
JP2829653B2 (ja)	1998-11-25	光起電力素子
JP2923193B2 (ja)	1999-07-26	光電変換素子の製造方法
JP2000219512A (ja)	2000-08-08	酸化亜鉛薄膜の製造方法、それを用いた光起電力素子の製造方法、及び光起電力素子
US6812499B2 (en)	2004-11-02	Silicon-based film and photovoltaic element
EP0849810A2 (en)	1998-06-24	Method for producing photovoltaic element
Takano et al.	2004	Light-weight and large-area solar cell production technology
US5897332A (en)	1999-04-27	Method for manufacturing photoelectric conversion element
JPH08298333A (ja)	1996-11-12	半導体被膜作製装置および薄膜太陽電池および薄膜太陽電池の作製方法
JPH11195801A (ja)	1999-07-21	光起電力素子
JP4416569B2 (ja)	2010-02-17	堆積膜形成方法および堆積膜形成装置
JPH09293892A (ja)	1997-11-11	光起電力素子
JP3710312B2 (ja)	2005-10-26	光起電力素子及びその製造方法
JP3072831B2 (ja)	2000-08-07	光起電力素子
AU756834B2 (en)	2003-01-23	Method of producing a microcrystal semiconductor thin film
JPH10173216A (ja)	1998-06-26	光起電力素子
JP3445132B2 (ja)	2003-09-08	酸化亜鉛薄膜の製造方法、それを用いた半導体素子基板の製造方法、光電変換素子の製造方法、酸化亜鉛薄膜、半導体素子基板及び光電変換素子
JPH10173211A (ja)	1998-06-26	光起電力素子
JPH10200146A (ja)	1998-07-31	光起電力素子
JP2004296651A (ja)	2004-10-21	光起電力素子および光起電力素子形成方法

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EP0793277B1 - Photovoltaic device provided with an opaque substrate having a specific irregular surface structure - Google Patents

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