default search action
Guido Groeseneken
Person information
- affiliation: Catholic University of Leuven, Belgium
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
- [c52]Kateryna Serbulova
, Zi-En Qiu, Shih-Hung Chen, Alexander Grill, Kuo-Hsing Kao, Jo De Boeck, Guido Groeseneken
Insight into Latchup Risk in 28nm Planar Bulk Technology for Quantum Computing Applications. IRPS 2024: 1-7 - 2023
- [c51]Michiel Vandemaele, Ben Kaczer, Erik Bury, Jacopo Franco, Adrian Chasin, Alexander Makarov, Hans Mertens, Geert Hellings, Guido Groeseneken
Investigating Nanowire, Nanosheet and Forksheet FET Hot-Carrier Reliability via TCAD Simulations: Invited Paper. IRPS 2023: 1-10 - [c50]Wen-Chieh Chen
Upcoming Challenges of ESD Reliability in DTCO with BS-PDN Routing via BPRs. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c49]Michiel Vandemaele, Ben Kaczer, Stanislav Tyaginov, Erik Bury, Adrian Vaisman Chasin, Jacopo Franco, Alexander Makarov, Hans Mertens, Geert Hellings, Guido Groeseneken
Simulation Comparison of Hot-Carrier Degradation in Nanowire, Nanosheet and Forksheet FETs. IRPS 2022: 6 - [c48]Ping-Yi Hsieh, Artemisia Tsiara
Wafer-Level Aging of InGaAs/GaAs Nano-Ridge p-i-n Diodes Monolithically Integrated on Silicon. IRPS 2022: 9 - [c47]Kateryna Serbulova
Enabling Active Backside Technology for ESD and LU Reliability in DTCO/STCO. VLSI Technology and Circuits 2022: 431-432 - 2021
- [c46]K. Kaczmarek, Marie Garcia Bardon, Y. Xiang, Laurent Breuil, Nicolo Ronchi, Bertrand Parvais
Understanding the memory window in 1T-FeFET memories: a depolarization field perspective. IMW 2021: 1-4 - [c45]Michiel Vandemaele, Ben Kaczer, Stanislav Tyaginov, Jacopo Franco, Robin Degraeve, Adrian Vaisman Chasin, Zhicheng Wu, Erik Bury, Yang Xiang, Hans Mertens, Guido Groeseneken
The properties, effect and extraction of localized defect profiles from degraded FET characteristics. IRPS 2021: 1-7 - [c44]Zhicheng Wu, Jacopo Franco, Brecht Truijen, Philippe Roussel, Stanislav Tyaginov, Michiel Vandemaele, Erik Bury, Guido Groeseneken
Physics-based device aging modelling framework for accurate circuit reliability assessment. IRPS 2021: 1-6 - 2020
- [c43]Michiel Vandemaele, Kai-Hsin Chuang, Erik Bury, Stanislav Tyaginov, Guido Groeseneken
The Influence of Gate Bias on the Anneal of Hot-Carrier Degradation. IRPS 2020: 1-7
2010 – 2019
- 2019
- [c42]Yashwanth Balaji
Tunnel FETs using Phosphorene/ReS2 heterostructures. DRC 2019: 113-114 - [c41]Jasper Bizindavyi, Anne S. Verhulst, Quentin Smets, Bart Sorée, Guido Groeseneken:
Experimental calibration of the temperature dependence of the heterojunction bandgap in III-V tunneling devices. DRC 2019: 253-254 - [c40]Shuzhen You, Xiangdong Li, Stefaan Decoutere, Guido Groeseneken
Monolithically integrated GaN power ICs designed using the MIT virtual source GaNFET (MVSG) compact model for enhancement-mode p-GaN gate power HEMTs, logic transistors and resistors. ESSDERC 2019: 158-161 - [c39]Michiel Vandemaele, Ben Kaczer, Stanislav Tyaginov, Zlatan Stanojevic, Alexander Makarov, Adrian Vaisman Chasin, Erik Bury, Hans Mertens, Dimitri Linten, Guido Groeseneken
Full (Vg, Vd) Bias Space Modeling of Hot-Carrier Degradation in Nanowire FETs. IRPS 2019: 1-7 - [c38]Zhicheng Wu, Jacopo Franco, Dieter Claes, Gerhard Rzepa, Philippe J. Roussel, Nadine Collaert
Accelerated Capture and Emission (ACE) Measurement Pattern for Efficient BTI Characterization and Modeling. IRPS 2019: 1-7 - 2018
- [j40]Kai-Hsin Chuang
A Cautionary Note When Looking for a Truly Reconfigurable Resistive RAM PUF. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2018(1): 98-117 (2018) - [c37]Jasper Bizindavyi, Anne S. Verhulst, Bart Soree
Impact of calibrated band-tails on the subthreshold swing of pocketed TFETs. DRC 2018: 1-2 - [c36]Kai-Hsin Chuang, Erik Bury, Robin Degraeve, Ben Kaczer, T. Kallstenius, Guido Groeseneken
A multi-bit/cell PUF using analog breakdown positions in CMOS. IRPS 2018: 2-1 - [c35]Vamsi Putcha, Jacopo Franco, Abhitosh Vais
Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET maps. IRPS 2018: 5 - [c34]Karine Florent, A. Subirats, Simone Lavizzari, Robin Degraeve, Umberto Celano
Investigation of the endurance of FE-HfO2 devices by means of TDDB studies. IRPS 2018: 6 - 2017
- [j39]Francky Catthoor
Will Chips of the Future Learn How to Feel Pain and Cure Themselves? IEEE Des. Test 34(5): 80-87 (2017) - [c33]Yashwanth Balaji
Tunneling transistors based on MoS2/MoTe2 Van der Waals heterostructures. ESSDERC 2017: 106-109 - [c32]Karine Florent, Simone Lavizzari, Luca Di Piazza, Mihaela Ioana Popovici, Goedele Potoms, Tom Raymaekers, Guido Groeseneken
From planar to vertical capacitors: A step towards ferroelectric V-FeFET integration. ESSDERC 2017: 164-167 - [c31]Nian Wang, Shih-Hung Chen, Geert Hellings, Kris Myny
ESD characterisation of a-IGZO TFTs on Si and foil substrates. ESSDERC 2017: 276-279 - 2016
- [c30]Devin Verreck, Anne S. Verhulst, Bart Soree
Non-uniform strain in lattice-mismatched heterostructure tunnel field-effect transistors. ESSDERC 2016: 412-415 - 2015
- [j38]Halil Kükner, Pieter Weckx, Sébastien Morrison, Jacopo Franco, Maria Toledano-Luque, Moonju Cho, Praveen Raghavan, Ben Kaczer, Doyoung Jang, Kenichi Miyaguchi, Marie Garcia Bardon, Francky Catthoor, Liesbet Van der Perre
Comparison of NBTI aging on adder architectures and ring oscillators in the downscaling technology nodes. Microprocess. Microsystems 39(8): 1039-1051 (2015) - [c29]Pieter Weckx, Ben Kaczer, Praveen Raghavan, Jacopo Franco, Marko Simicic
Characterization and simulation methodology for time-dependent variability in advanced technologies. CICC 2015: 1-8 - [c28]Ben Kaczer, Jacopo Franco, Pieter Weckx, Philippe Roussel, Erik Bury, Moonju Cho, Robin Degraeve, Dimitri Linten, Guido Groeseneken
The defect-centric perspective of device and circuit reliability - From individual defects to circuits. ESSDERC 2015: 218-225 - [c27]C. Y. Chen, Ludovic Goux, Andrea Fantini, Robin Degraeve, Augusto Redolfi, Guido Groeseneken
Engineering of a TiN\Al2O3\(Hf, Al)O2\Ta2O5\Hf RRAM cell for fast operation at low current. ESSDERC 2015: 262-265 - [c26]Roman Boschke, Guido Groeseneken
ESD protection diodes in optical interposer technology. ICICDT 2015: 1-4 - [c25]Pieter Weckx, Ben Kaczer, Philippe J. Roussel, Francky Catthoor, Guido Groeseneken
Impact of time-dependent variability on the yield and performance of 6T SRAM cells in an advanced HK/MG technology. ICICDT 2015: 1-4 - [c24]Jacopo Franco, Ben Kaczer, Philippe J. Roussel, Erik Bury, Hans Mertens, Romain Ritzenthaler, Tibor Grasser
NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures. IRPS 2015: 2 - [c23]Zhigang Ji, Dimitri Linten, Roman Boschke, Geert Hellings, S. H. Chen, AliReza Alian, D. Zhou, Yves Mols, Tsvetan Ivanov, Jacopo Franco, Ben Kaczer, X. Zhang, R. Gao, Jianfu Zhang
ESD characterization of planar InGaAs devices. IRPS 2015: 3 - [c22]Ben Kaczer, Jacopo Franco, M. Cho, Tibor Grasser
Origins and implications of increased channel hot carrier variability in nFinFETs. IRPS 2015: 3 - [c21]Pieter Weckx, Ben Kaczer, C. Chen, Jacopo Franco, Erik Bury, Kausik Chanda
Characterization of time-dependent variability using 32k transistor arrays in an advanced HK/MG technology. IRPS 2015: 3 - [c20]Simon Van Beek, Koen Martens, Philippe Roussel, Gabriele Luca Donadio, Johan Swerts, Sofie Mertens, Gouri Sankar Kar, Tai Min, Guido Groeseneken
Four point probe ramped voltage stress as an efficient method to understand breakdown of STT-MRAM MgO tunnel junctions. IRPS 2015: 4 - [c19]Abhitosh Vais
The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices. IRPS 2015: 5 - [c18]Tian-Li Wu
Time dependent dielectric breakdown (TDDB) evaluation of PE-ALD SiN gate dielectrics on AlGaN/GaN recessed gate D-mode MIS-HEMTs and E-mode MIS-FETs. IRPS 2015: 6 - 2014
- [j37]Chunmeng Dou, Dennis Lin, Abhitosh Vais, Tsvetan Ivanov, Han-Ping Chen, Koen Martens, Kuniyuki Kakushima, Hiroshi Iwai, Yuan Taur, Aaron Thean, Guido Groeseneken
Determination of energy and spatial distribution of oxide border traps in In0.53Ga0.47As MOS capacitors from capacitance-voltage characteristics measured at various temperatures. Microelectron. Reliab. 54(4): 746-754 (2014) - [j36]Jie Hu, Steve Stoffels
Physical origin of current collapse in Au-free AlGaN/GaN Schottky Barrier Diodes. Microelectron. Reliab. 54(9-10): 2196-2199 (2014) - [j35]Tian-Li Wu
Stability evaluation of Au-free Ohmic contacts on AlGaN/GaN HEMTs under a constant current stress. Microelectron. Reliab. 54(9-10): 2232-2236 (2014) - [j34]Sharifah Wan Muhamad Hatta, Zhigang Ji, Jianfu Zhang
Energy distribution of positive charges in high-k dielectric. Microelectron. Reliab. 54(9-10): 2329-2333 (2014) - [j33]Vinicius V. A. Camargo, Ben Kaczer, Gilson I. Wirth
Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits. IEEE Trans. Very Large Scale Integr. Syst. 22(2): 280-285 (2014) - [c17]Halil Kukner, Pieter Weckx, Sebastien Morrison, Praveen Raghavan, Ben Kaczer, Francky Catthoor, Liesbet Van der Perre
NBTI Aging on 32-Bit Adders in the Downscaling Planar FET Technology Nodes. DSD 2014: 98-107 - [c16]Ajay Bhoolokam, Manoj Nag, Adrian Vaisman Chasin, Soeren Steudel
Impact of etch stop layer on negative bias illumination stress of amorphous Indium Gallium Zinc Oxide transistors. ESSDERC 2014: 302-304 - [c15]Halil Kukner, Moustafa A. Khatib
Degradation analysis of datapath logic subblocks under NBTI aging in FinFET technology. ISQED 2014: 473-479 - 2013
- [j32]Halil Kükner, Pieter Weckx, Praveen Raghavan, Ben Kaczer, Francky Catthoor, Liesbet Van der Perre
Impact of duty factor, stress stimuli, gate and drive strength on gate delay degradation with an atomistic trap-based BTI model. Microprocess. Microsystems 37(8-A): 792-800 (2013) - [c14]Geert Hellings, Shih-Hung Chen, Dimitri Linten, Mirko Scholz, Guido Groeseneken
Quasi-3D method: Time-efficient TCAD and mixed-mode simulations on finFET technologies. CICC 2013: 1-4 - [c13]Said Hamdioui, Michael Nicolaidis, Dimitris Gizopoulos, Arnaud Grasset, Guido Groeseneken, Philippe Bonnot:
Reliability challenges of real-time systems in forthcoming technology nodes. DATE 2013: 129-134 - [c12]Marc Aoulaiche, Eddy Simoen, Romain Ritzenthaler, Tom Schram, Hiroaki Arimura, Moonju Cho, Thomas Kauerauf, Guido Groeseneken
Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors. ESSDERC 2013: 190-193 - 2012
- [j31]Maria Toledano-Luque, Ben Kaczer, Jacopo Franco
Defect-centric perspective of time-dependent BTI variability. Microelectron. Reliab. 52(9-10): 1883-1890 (2012) - [j30]Jacopo Franco
BTI reliability of ultra-thin EOT MOSFETs for sub-threshold logic. Microelectron. Reliab. 52(9-10): 1932-1935 (2012) - [j29]Felice Crupi, Massimo Alioto, Jacopo Franco
Understanding the Basic Advantages of Bulk FinFETs for Sub- and Near-Threshold Logic Circuits From Device Measurements. IEEE Trans. Circuits Syst. II Express Briefs 59-II(7): 439-442 (2012) - [j28]Felice Crupi, Massimo Alioto, Jacopo Franco
Buried Silicon-Germanium pMOSFETs: Experimental Analysis in VLSI Logic Circuits Under Aggressive Voltage Scaling. IEEE Trans. Very Large Scale Integr. Syst. 20(8): 1487-1495 (2012) - [c11]Halil Kukner, Pieter Weckx, Praveen Raghavan, Ben Kaczer, Francky Catthoor, Liesbet Van der Perre
Impact of Duty Factor, Stress Stimuli, and Gate Drive Strength on Gate Delay Degradation with an Atomistic Trap-Based BTI Model. DSD 2012: 1-7 - [c10]Romain Ritzenthaler, Tom Schram, Erik Bury, Jérôme Mitard, L.-Å. Ragnarsson, Guido Groeseneken
Low-power DRAM-compatible Replacement Gate High-k/Metal Gate stacks. ESSDERC 2012: 242-245 - [c9]Leqi Zhang, Stefan Cosemans, Dirk J. Wouters, Guido Groeseneken
Analysis of the effect of cell parameters on the maximum RRAM array size considering both read and write. ESSDERC 2012: 282-285 - [c8]Tommaso Romeo, Luigi Pantisano, Eddy Simoen, Raymond Krom, Mitsuhiro Togo
Low-frequency noise assessment of the transport mechanisms in SiGe channel bulk FinFETs. ESSDERC 2012: 330-333 - [c7]Jacopo Franco
Superior reliability and reduced Time-Dependent variability in high-mobility SiGe channel pMOSFETs for VLSI logic applications. ICICDT 2012: 1-4 - 2011
- [j27]P. C. Feijoo, Moonju Cho, Mitsuhiro Togo
Positive bias temperature instabilities on sub-nanometer EOT FinFETs. Microelectron. Reliab. 51(9-11): 1521-1524 (2011) - [c6]Felice Crupi, Massimo Alioto, Jacopo Franco
Experimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scaling. ISCAS 2011: 2249-2252 - 2010
- [j26]Sandeep Sangameswaran, Jeroen De Coster, Guido Groeseneken
Impact of design factors and environment on the ESD sensitivity of MEMS micromirrors. Microelectron. Reliab. 50(9-11): 1383-1387 (2010) - [c5]Vaidyanathan Subramanian, Abdelkarim Mercha, Bertrand Parvais, Morin Dehan, Guido Groeseneken
Identifying the Bottlenecks to the RF Performance of FinFETs. VLSI Design 2010: 111-116
2000 – 2009
- 2009
- [j25]R. Fernández-García, Ben Kaczer, Guido Groeseneken
A CMOS circuit for evaluating the NBTI over a wide frequency range. Microelectron. Reliab. 49(8): 885-891 (2009) - [j24]Dimitri Linten, Steven Thijs, Jonathan Borremans, Morin Dehan, David Trémouilles
A plug-and-play wideband RF circuit ESD protection methodology: T-diodes. Microelectron. Reliab. 49(12): 1440-1446 (2009) - [j23]Mirko Scholz, Dimitri Linten, Steven Thijs, Sandeep Sangameswaran, Masanori Sawada, Toshiyuki Nakaei, Takumi Hasebe, Guido Groeseneken
ESD On-Wafer Characterization: Is TLP Still the Right Measurement Tool? IEEE Trans. Instrum. Meas. 58(10): 3418-3426 (2009) - 2008
- [j22]Guido Groeseneken
Editorial. Microelectron. Reliab. 48(8-9): 1111 (2008) - [c4]Steven Thijs, Mototsugu Okushima, Jonathan Borremans, Philippe Jansen, Dimitri Linten, Mirko Scholz, Piet Wambacq, Guido Groeseneken
Inductor-based ESD protection under CDM-like ESD stress conditions for RF applications. CICC 2008: 49-52 - [c3]Georges G. E. Gielen, Pieter De Wit, Elie Maricau, Johan Loeckx, Javier Martín-Martínez, Ben Kaczer, Guido Groeseneken
Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies. DATE 2008: 1322-1327 - 2007
- [j21]A. Shickova, Ben Kaczer, Anabela Veloso, Marc Aoulaiche, M. Houssa, Herman E. Maes, Guido Groeseneken
NBTI reliability of Ni FUSI/HfSiON gates: Effect of silicide phase. Microelectron. Reliab. 47(4-5): 505-507 (2007) - [j20]A. Kerber, Luigi Pantisano, Anabela Veloso, Guido Groeseneken
Reliability screening of high-k dielectrics based on voltage ramp stress. Microelectron. Reliab. 47(4-5): 513-517 (2007) - [j19]Ben Kaczer, Robin Degraeve, Philippe Roussel, Guido Groeseneken
Gate oxide breakdown in FET devices and circuits: From nanoscale physics to system-level reliability. Microelectron. Reliab. 47(4-5): 559-566 (2007) - [j18]M. Houssa, Marc Aoulaiche, Stefan De Gendt, Guido Groeseneken
Negative bias temperature instabilities in HfSiO(N)-based MOSFETs: Electrical characterization and modeling. Microelectron. Reliab. 47(6): 880-889 (2007) - [j17]David Trémouilles
Transient voltage overshoot in TLP testing - Real or artifact? Microelectron. Reliab. 47(7): 1016-1024 (2007) - [c2]Bertrand Parvais
FinFET technology for analog and RF circuits. ICECS 2007: 182-185 - 2006
- [j16]Steven Thijs, M. Natarajan Iyer, Dimitri Linten, Wutthinan Jeamsaksiri
Implementation of plug-and-play ESD protection in 5.5GHz 90nm RF CMOS LNAs - Concepts, constraints and solutions. Microelectron. Reliab. 46(5-6): 702-712 (2006) - [j15]Raul Fernández, Rosana Rodríguez, Montserrat Nafría
FinFET and MOSFET preliminary comparison of gate oxide reliability. Microelectron. Reliab. 46(9-11): 1608-1611 (2006) - 2005
- [j14]Vesselin K. Vassilev, Steven Thijs, P. L. Segura, Piet Wambacq, Paul Leroux
ESD-RF co-design methodology for the state of the art RF-CMOS blocks. Microelectron. Reliab. 45(2): 255-268 (2005) - [j13]Yunlong Li, Zsolt Tökei
Layout dependency induced deviation from Poisson area scaling in BEOL dielectric reliability. Microelectron. Reliab. 45(9-11): 1299-1304 (2005) - [j12]Vesselin K. Vassilev, Vladislav A. Vashchenko, Philippe Jansen, Guido Groeseneken
ESD circuit model based protection network optimisation for extended-voltage NMOS drivers. Microelectron. Reliab. 45(9-11): 1430-1435 (2005) - [c1]Philippe Jansen, Steven Thijs, Dimitri Linten, M. I. Natarajan, Vesselin K. Vassilev, Mingxu Liu, Ann Concannon, David Trémouilles
RF ESD protection strategies - the design and performance trade-off challenges. CICC 2005: 489-496 - 2004
- [j11]Stefano Aresu, Ward De Ceuninck, Geert Van den Bosch, Guido Groeseneken
Evidence for source side injection hot carrier effects on lateral DMOS transistors. Microelectron. Reliab. 44(9-11): 1621-1624 (2004) - [j10]Vesselin K. Vassilev, Vladislav A. Vashchenko, Philippe Jansen, B.-J. Choi, Ann Concannon, J.-J. Yang, Guido Groeseneken
A CAD assisted design and optimisation methodology for over-voltage ESD protection circuits. Microelectron. Reliab. 44(9-11): 1885-1890 (2004) - 2003
- [j9]Vesselin K. Vassilev, Snezana Jenei, Guido Groeseneken
High frequency characterization and modelling of the parasitic RC performance of two terminal ESD CMOS protection devices. Microelectron. Reliab. 43(7): 1011-1020 (2003) - 2002
- [j8]Ben Kaczer, Robin Degraeve, Mahmoud Rasras
Analysis and modeling of a digital CMOS circuit operation and reliability after gate oxide breakdown: a case study. Microelectron. Reliab. 42(4-5): 555-564 (2002) - [j7]Bart Keppens, Vincent De Heyn, M. Natarajan Iyer, Vesselin K. Vassilev, Guido Groeseneken
Significance of the failure criterion on transmission line pulse testing. Microelectron. Reliab. 42(6): 901-907 (2002) - [j6]E. Andries, R. Dreesen, Kris Croes, Ward De Ceuninck, Luc De Schepper, Guido Groeseneken
Statistical aspects of the degradation of LDD nMOSFETs. Microelectron. Reliab. 42(9-11): 1409-1413 (2002) - 2001
- [j5]Karlheinz Bock
Influence of gate length on ESD-performance for deep submicron CMOS technology. Microelectron. Reliab. 41(3): 375-383 (2001) - [j4]R. Dreesen, Kris Croes, Jean Manca
A new degradation model and lifetime extrapolation technique for lightly doped drain nMOSFETs under hot-carrier degradation. Microelectron. Reliab. 41(3): 437-443 (2001)
1990 – 1999
- 1999
- [j3]Marc M. Heyns, Twan Bearda, Ingrid Cornelissen, Stefan De Gendt, Robin Degraeve, Guido Groeseneken
Cost-effective cleaning and high-quality thin gate oxides. IBM J. Res. Dev. 43(3): 339-350 (1999) - 1998
- [j2]Donato Montanari, Jan Van Houdt, Guido Groeseneken
Novel level-identifying circuit for flash multilevel memories. IEEE J. Solid State Circuits 33(7): 1090-1095 (1998)
1980 – 1989
- 1989
- [j1]Johan S. Witters, Guido Groeseneken, Herman E. Maes:
Analysis and modeling of on-chip high-voltage generator circuits for use in EEPROM circuits. IEEE J. Solid State Circuits 24(5): 1372-1380 (1989)
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-11-14 00:50 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: