KR20080106984A - Method to improve the step coverage and pattern loading for dielectric films - Google Patents

Abstract

Methods of controlling the step coverage and pattern loading of a layer on a substrate are provided. In one aspect, a method includes exposing the substrate to a silicon-containing precursor in the presence of a plasma to deposit a layer, treating the deposited layer with a plasma, and repeating the exposing and treating until a desired thickness of the layer is obtained. The plasma may be generated from an oxygen-containing gas. In another aspect, a method comprises depositing a dielectric layer on a substrate having at least one formed feature across a surface of the substrate and etching the dielectric layer with a plasma from an oxygen or a halogen-containing gas to provide a desired profile of the dielectric layer on the feature. The deposition and etching may be repeated for multiple cycles to provide the desired profile. ® KIPO & WIPO 2009

Description

METHODO TO IMPROVE THE STEP COVERAGE AND PATTERN LOADING FOR DIELECTRIC FILMS

Embodiments of the present invention generally relate to a method and apparatus for semiconductor processing. In particular, embodiments of the present invention relate to a method and apparatus for depositing a conformal dielectric film.

Forming dielectric layers on a substrate by chemical reaction of gases is one of the major steps in the manufacture of modern semiconductor devices. Such deposition processes include chemical vapor deposition (CVD) and plasma enhanced chemical vapor deposition (PECVD) using a combination of plasma with conventional CVD techniques.

CVD and PECVD dielectric layers may be used as different layers in semiconductor devices. For example, dielectric layers may be used as intermetal dielectric layers between conductive lines or interconnects in a device. Optionally, the dielectric layers can be used as barrier layers, etch stops, or spacers and other layers.

Dielectric layers used as barrier layers and spacers are typically deposited over features, such as horizontal interconnects, vertical interconnects (vias), gate stacks, etc., for lines formed in a patterned substrate. do. Preferably, the deposition provides a conformal layer. However, it is sometimes difficult to achieve conformal deposition.

For example, it is difficult to deposit a barrier layer over a feature with little or no surface defects or feature deformation. During deposition, the barrier layer material may be overloaf, ie excess material on the shoulders of the vias is deposited and too little material is deposited on the base of the vias, forming a shape that looks like the sides of the bread loaf. have. This phenomenon is known as footing because the base of the via has a profile that looks like a foot. In the extreme case, the shoulders of the via may be joined against the top of the via and fused to form a sealed surface. Film thickness non-uniformity on the wafer can adversely affect driving current improvement from one device to another. Modulation of process parameters does not significantly improve step coverage and pattern loading problems.

Deposition of a conformal layer over the gate stacks is important to provide layers that are sequentially etched to form a spacer. Methods of depositing silicon nitride and silicon oxide layers for spacers using conventional CVD at high temperature, voltage have been developed, but the thermal budget for this technique is getting too high as the shrinkage of semiconductor device geometry continues. PECVD processes for silicon nitride and silicon oxide deposition can be performed at lower temperatures, but the step coverage and pattern loading results are less desirable than those obtained with high temperature, low pressure CVD.

Thus, a need exists for a method of depositing conformal films over features formed in a patterned substrate.

Embodiments of the present invention provide a method of forming a dielectric film on a substrate, the method comprising disposing a substrate having at least one feature at both ends of a surface in a chamber, depositing a dielectric layer, treating the dielectric layer with plasma. And repeating the steps of: determining the thickness of the dielectric layer, and depositing the dielectric layer, treating the dielectric layer with plasma, and determining the thickness of the dielectric layer.

In one embodiment, a method of forming a layer on a patterned substrate in a chamber is provided. The method includes exposing the patterned substrate to a silicon-containing precursor, such as octamethylcyclotetrasiloxane, in the presence of a plasma to deposit a layer on the patterned substrate, and after the layer is deposited. Treating with an oxygen-containing gas, such as a plasma from an oxygen gas. The exposing and treating steps are repeated until the desired thickness of the layer is obtained. The layer may be a silicon oxide or carbon-doped silicon oxide layer.

In yet another embodiment, a method of forming a layer on a patterned substrate in a chamber comprises exposing the patterned substrate to a silicon-containing precursor in the presence of a plasma to deposit the layer on the patterned substrate, after the layer is deposited. Treating the layer with a plasma from a nitrogen-containing gas, and repeating the exposing and treating steps until a desired thickness of the layer is obtained.

Still further embodiments of the present invention provide a method of controlling step coverage and pattern loading on a substrate. In one embodiment, the method includes positioning a substrate in a chamber having at least one feature formed across a surface. The dielectric layer is deposited on the substrate, and the dielectric layer has a desired profile of the dielectric layer on at least one feature formed by etching with plasma from an oxygen or halogen-containing gas selected from the group consisting of fluorine, chlorine, bromine, and combinations thereof. Is provided.

In another embodiment, the method includes positioning a substrate in a chamber having at least one feature formed across a surface and depositing a dielectric layer on the substrate. The feature includes a top surface, sidewall surfaces, and a bottom surface. The dielectric layer is deposited to a greater thickness on the top surface than on the bottom and sidewall surfaces. The dielectric layer is then etched with a plasma from an oxygen or halogen-containing gas selected from the group consisting of fluorine, chlorine, bromine and combinations thereof. The dielectric layer is etched at a higher etch rate on the top surface than on the sidewall and bottom surfaces. Deposition and etching of the dielectric layer is repeated one or more times to provide a desired profile of the dielectric layer on the formed at least one feature.

In another embodiment, the method includes positioning a substrate having at least one feature across the surface in a chamber and depositing a silicon nitride dielectric layer on the substrate. The feature includes a top surface, a sidewall surface, and a bottom surface. The silicon nitride dielectric layer is deposited to a greater thickness on the top surface than on the bottom and sidewall surfaces. The silicon nitride dielectric layer is then etched with an NF ₃ plasma having a higher etch rate on the top surface than on the sidewall and bottom surfaces to provide a desired profile of the silicon nitride dielectric layer on at least one feature formed. Deposition and etching of the silicon nitride dielectric layer may be repeated one or more times to provide the desired profile.

DETAILED DESCRIPTION In order to understand the above-mentioned features of the present invention through a more detailed description of the present invention, the above brief description, reference is made to several embodiments shown in the accompanying drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of the invention and are not intended to limit the scope of the invention, which may be embodied in other equivalent embodiments.

1 is a flow diagram for an embodiment of a deposition process.

2 is a flowchart of a further embodiment of a deposition process.

3A shows a dielectric layer profile on a substrate feature according to the prior art. 3B shows a dielectric layer profile on a substrate feature in accordance with the present invention.

4 is a graph showing bottom thickness formed for features in dense and insulated regions of a substrate for different film thicknesses etched in accordance with an embodiment of the invention.

5 is a graph showing bottom pattern loading effects formed for different film thicknesses etched in accordance with an embodiment of the invention.

6 is a flow chart for an embodiment of a deposition process.

7 is a graph showing the thickness of a layer during a deposition process performed in accordance with an embodiment of the invention.

8 is a graph showing the thickness of a layer deposited on a substrate in accordance with an embodiment of the present invention based on the amount of time the substrate is exposed to the precursor.

9 is a schematic diagram of depositing a layer on a substrate in accordance with an embodiment of the present invention.

10 is a flow diagram illustrating a further embodiment of a deposition process.

11 is a flow diagram illustrating a further embodiment of a deposition process.

P3 챔버, PRODUCER

APF^TM PECVD 챔버, PRODUCER

BLACK DIAMOND

PECVD 챔버, PRODUCER

BLOK

PECVD 챔버, PRODUCER

DARC PECVD 챔버, PRODUCER HARP 챔버, PRODUCER

PECVD 챔버, PRODUCER SACVD 챔버, PRODUCER

SE STRESS NITRIDE PECVD 챔버, 및 PRODUCER

TEOS FSG PECVD 챔버가 포함되며, 이들 각각은 캘리포니아 산타클라라의 어플라이드 머티리얼스사로부터 상업적으로 이용가능하다. 챔버들은 개별적으로 구성될 수 있으나, 대체로 통합형 툴의 일부이다. 프로세스들은 임의의 기판, 이를 테면 200mm 또는 300mm 기판 또는 반도체 또는 플랫 패널 디스플레이 처리에 적합한 다른 매체 상에서 수행될 수 있다. 하기 개시되는 프로세싱 조건들은 2개의 절연 프로세싱 영역을 갖는 PRODUCER

SE STRESS NITRIDE PECVD 챔버를 기준으로 제공된다. 따라서, 각각의 기판 프로세싱 영역 당 처리되는 유량들은 챔버 유량의 절반이다.The present invention provides a method and apparatus for depositing a conformal dielectric layer on formed features. Films useful in this process include, for example, dielectric materials such as silicon oxide, silicon oxynitride, or silicon nitride films that can be used as spacers or etch stop layers. The films may be carbon doped, hydrogen doped, or some other chemical or element to control dielectric properties. The films can be carbon doped or nitrogen doped. For example, the films can be SiCN, SiOC, SiOCN, SiBN, SiBCN, SiC, BN, or BCN films. In one aspect, a combination of individually deposited and plasma treated thin layers provides a conformal dielectric layer that is more than a single dielectric layer thickness. Chambers that may be used in the processes disclosed herein include PRODUCER.

P3 chamber, PRODUCER

APF ^TM chamber PECVD, PRODUCER

BLACK DIAMOND

PECVD chamber, PRODUCER

BLOK

PECVD chamber, PRODUCER

DARC PECVD chamber, PRODUCER HARP chamber, PRODUCER

PECVD Chamber, PRODUCER SACVD Chamber, PRODUCER

SE STRESS NITRIDE PECVD CHAMBER, AND PRODUCER

TEOS FSG PECVD chambers are included, each of which is commercially available from Applied Materials, Inc. of Santa Clara, California. The chambers can be configured individually but are usually part of an integrated tool. The processes may be performed on any substrate, such as a 200 mm or 300 mm substrate or other medium suitable for semiconductor or flat panel display processing. The processing conditions disclosed below are for PRODUCER with two isolated processing regions.

It is provided based on the SE STRESS NITRIDE PECVD chamber. Thus, the flow rates processed per each substrate processing region are half the chamber flow rate.

1 is a flowchart of an embodiment of a deposition process 100. All process steps of the deposition process 100 may be performed in the same chamber. Process 100 begins at a start step 110 that includes placing a substrate in a chamber having at least one feature formed across a surface. The formed features are features formed in any form, such as vias, interconnects, or gate stacks. The dielectric layer is then deposited by CVD or PECVD during the thin dielectric layer deposition step 120. For example, the thin dielectric layer can be a silicon oxide, silicon oxynitride, or silicon nitride layer. The layer may be carbon doped or nitrogen doped. The thin dielectric layer may have a thickness of about 1 GPa to about 8 GPa. The pressure in the chamber is about 100 mTorr to about 8 Torr, with 2 to 8 Torr being preferred. The thin dielectric layer is deposited for about 2 to about 5 seconds during deposition step 120 and the thin dielectric layer is plasma treated during step 130. Plasma processing step 130 may include using an inert gas or a reactive gas. The thickness of the deposited layers is then analyzed or estimated during the thickness determination step 140. If the thickness of the deposited layer or layers is equal to or greater than the desired thickness imparted, process 100 is completed during step 160. During the termination step 160, the substrate is removed from the chamber through further processing. If the thickness is not equal to or greater than the desired thickness imparted, the deposition step 120 and the plasma treatment step 130 are repeated during the iteration process 150. The thickness determination step 140 and the iteration process 150 may be repeated many times until the desired film thickness is obtained, for example about one to about six iterations have been performed.

1 is generalized to provide a framework for the individual processes shown in FIGS. 2, 6 and 10-11. Process steps similar to FIG. 1 have the same reference numerals as in FIGS. 2, 6, and 10-11. However, some process variations can be approved.

2 is a flowchart of an embodiment of a deposition process 200. As shown in step 202, a substrate is formed in the chamber having at least one feature formed across the surface. The feature has a top surface, sidewall surfaces, and a bottom surface. As shown in step 204, a dielectric layer is deposited on the substrate. The dielectric layer may be deposited by CVD or PECVD. The dielectric layer can be, for example, a silicon nitride, silicon oxide, or silicon oxynitride layer. Optionally, the layer can be any of the carbon or nitrogen-doped films disclosed above. Typically, the deposition of the dielectric layer provides a thicker dielectric layer on the top surface than on the bottom and sidewall surfaces. Next, as shown in step 206, the dielectric layer is etched using a plasma from oxygen or a halogen-containing gas. The halogen-containing gas is selected from the group consisting of fluorine, chlorine, bromine, and combinations thereof. The oxygen plasma may be provided by oxygen gas O ₂ or other oxygen-containing gases. Optionally, although not shown, the thickness of the dielectric layer may be analyzed or estimated during the thickness determination step as disclosed above with reference to FIG. 1. If the etching of the dielectric layer provides a profile of the desired dielectric layer on at least one feature formed in step 206, the process ends at step 208. The desired profile can be a conformal or substantially conformal profile with less change in thickness to the sidewalls, top, and substrate surfaces of the feature than after dielectric layer deposition and before etching. In other words, the desired profile has improved, ie, the percentage coverage of the difference in film thickness between different surfaces of the feature has low step coverage. If step 206 does not provide a desired dielectric layer profile on at least one feature on which the etching of the dielectric layer is formed, repeating step 210 may be performed. Repeating step 210 includes depositing an additional amount of dielectric layer and etching the dielectric layer. The repeating step 210 is repeated several times, such as between 1 and 100 times, for example between 1 and 6 times, until a desired dielectric layer profile is obtained on at least one feature formed.

Referring back to step 206, the dielectric layer may be etched in the same chamber where the dielectric layer is deposited or in a different chamber that is part of the same integrated tool, such as a deposition chamber, and which may be connected with the deposition chamber by a transfer chamber of the integrated tool. . Oxygen or halogen-containing gas may be injected in the chamber in combination with or individently with an inert gas such as argon or helium. The etching step 206 is performed using a plasma generated remotely or in situ. The duration of the etching step 206 may be at least 0.1 seconds, such as between about 0.1 seconds and about 45 seconds, for example between about 15 seconds and about 45 seconds. The etch profile can be configured to match the deposition profile by adjusting the halogen-containing gas flow rate and exposure period. For example, the etch rate can be higher on the top surface of the feature than on the sidewall surface or the bottom surface of the feature. Typically, the etch rate on the top surface is about 10% higher than the etch rate on the sidewall surface or the bottom surface. In certain instances, an etch rate of about 50 percent is desirable. As defined herein, an etch rate of about 50 percent corresponds to an etching process that removes about 50% of the thickness of the dielectric layer being deposited. In addition, the deposition step 204 may optionally be a two part deposition process, such as a two second plasma at the first power and precursor partial pressure and an additional two seconds at the second power and second precursor partial pressure.

In an embodiment where the etching step 206 is performed using a remotely generated plasma, the plasma consists of fluorine, chlorine, bromine and combinations thereof in the microwave energy of the remote plasma source connected to the chamber in which the dielectric layer is deposited. It is produced by exposing an oxygen or halogen-containing gas selected from the group. For example, the plasma can be generated from NF ₃ providing reactive fluorine species. NF ₃ may be injected into the chamber at a flow rate between about 10 sccm and about 20 slm. NF ₃ may be injected into the chamber using argon or helium as the diluent gas. In addition, argon and helium may help maintain plasma in the chamber. Argon or helium may be injected into the chamber at a flow rate between about 100 sccm and about 20 slm. The pressure of the chamber during the etch may be between about 10 mTorr and about 760 Torr, and the temperature of the substrate support in the chamber may be set between about 100 ° C and about 650 ° C.

In embodiments where the etching step 206 is performed in situ, i.e., using a plasma generated in the chamber, the plasma may be generated by RF power. The RF power may be at a high frequency of about 1 MHz to about 13.56 MHz, such as about 2 MHz to about 13.56 MHz, a low frequency of about 100 kHz to about 1 MHz, such as about 100 kHz to about 400 kHz, or about 1 MHz to about 13.56 MHz. A mixed frequency can be provided that includes low frequencies between MHz, for example between about 2 MHz and about 13.56 MHz, between about 100 kHz and about 1 MHz, such as between about 100 kHz and about 400 kHz. The halogen-containing gas selected from the group consisting of fluorine, chlorine, bromine and combinations thereof and used as the etching gas may be NF ₃ or carbon and fluorine-containing gas such as CF ₄ or C ₄ F ₈ . Oxygen or halogen-containing gas may be injected into the chamber at a flow rate between about 10 sccm and about 20 slm. Oxygen or halogen-containing gas may be injected into the chamber with argon or helium as the diluent gas. Argon and helium may also help maintain plasma in the chamber. Argon or helium may be injected into the chamber at a flow rate between about 100 sccm and about 20 slm. The pressure of the chamber during etching may be between about 10 mTorr and about 760 mTorr, and the temperature of the substrate support in the chamber may be set between about 100 ° C. and about 650 ° C. The space between the substrate support electrode and the showerhead electrode of the chamber may be between about 100 mils and about 3000 mils. The space can be adjusted to control the stability of the plasma.

Embodiments of the invention include a process sequence comprising a single deposition step 204 and a single etch step 206 performed and a repeating step 210 of multiple deposition and etch steps. A process sequence comprising a single deposition step and a single etch step may be performed on a dielectric layer having a high etch rate on the sidewall surface of the feature of the dielectric layer based on the etch rate on the top surface of the feature of the dielectric layer. For example, the etch rate on the sidewall surface can be at least about 10% of the rate at which the dielectric layer is etched from the top surface. Dielectric deposition processes that provide low ion bombardment on the sidewalls of the features rather than on the top or bottom of the features can yield a higher dielectric etch rate on the sidewall than on the bottom or top of the feature.

By keeping the thickness of the etched material constant for dielectric layers deposited at different thicknesses and changing the percentage of dielectric layers being etched, the bottom pattern loading effect for a process sequence including a single deposition step and a single etch step is 1000 kW. It has been found that for dielectric layers with thicknesses up to, it is independent of the thickness of the deposited dielectric layer.

A process sequence comprising multiple deposition and etching steps may be performed on a dielectric layer having a low etch rate on the sidewall surface of the feature of the dielectric layer based on the etch rate on the top surface of the dielectric layer feature. For example, the etch rate on the sidewall surface can be less than about 10% of the rate at which the dielectric layer is etched from the top surface. Etch rates may be determined by measuring the thickness of the dielectric layer at the bottom, sidewalls and top of the feature and calculating the etched thickness per time period of etching using SEM or TEM cross sections before and after the dielectric layer is etched. The pattern loading effect can be improved by increasing the number of deposition and etch cycles.

In an exemplary embodiment, a process sequence comprising two or three deposition and etch cycles may be performed on dielectric layers used as etch stop liners for feature points of 90 nm or less. The dielectric layer may be deposited at a thickness between about 300 microseconds and about 400 microseconds in each cycle and the thickness between about 100 microseconds and about 200 microseconds of the dielectric layer may be etched in each cycle.

Experimental testing of embodiments of the present invention shows that the etch profile can be controlled to match the deposition profile, ie to provide a high etch rate for the top surface of the formed features rather than at the bottom or along the sidewalls of the formed feature. 3A is a sketch of an SEM of dielectric layer 302 formed on feature 304 of substrate 306 according to the prior art. The dielectric layer has a non-uniform profile with a greater thickness at the top 308 of the feature than on the sidewall 310 and bottom 312 of the feature. 3B is an SEM sketch of dielectric layer 320 formed on feature 304 in accordance with an embodiment of the present invention. Dielectric layer 320 has a more uniform profile on feature 304 than dielectric layer 302.

Scanning electron micrographs of the cross-sections of the formed features showed a 45 sec NF ₃ plasma etch comprising 50 sccm of NF ₃ , 3L argon, low frequency RF power of 100W at 350 kHz, chamber pressure of 1.5 Torr, and 1000 mils of space (67% PLE's bottom pattern loading effect (PLE) of the silicon nitride dielectric layer can be reduced by about 30% and this etching process can be used to modulate step coverage for other dielectric film deposition processes. Indicates. Film stress is not affected by the etching process. Sidewall loading is reduced from 46% to 33% and top loading is reduced from 10% to 3%. The pattern loading effect is characterized by a film thickness on the bottom, top or sidewalls of the feature in the substrate area with several features (insulated zones) and a feature in the substrate area with high density features (dense zones) The low pattern loading effect percentage reflects high film thickness uniformity across the substrate because it is measured as a percentage of the film thickness difference between the film thicknesses on that portion of.

4 and 5 show the effect of 50 sccm NF ₃ , 3L argon and the action of the length of the etch period as reflected depending on the film thickness etched at the bottom dielectric layer thickness for substrates with iso and dense feature spaces, respectively; Pattern loading effects for NF ₃ etch using low frequency RF power of 100 W at 350 kHz, chamber pressure of 1.5 Torr, and 1000 mils of space. An etching period of 15-45 seconds is used, which corresponds to a film thickness etched from 100 kPa to 300 kPa. The bottom loading action is significantly improved, ie about 30%, with a long etching period.

The comparison of pattern loading and bottom thickness as a function of etch type is performed using NF ₃ as a fluorine-containing etch gas on the silicon nitride dielectric layer. Without etching, a low frequency RF plasma etch at 100 W, a high frequency RF plasma etch at 50 W and a remote plasma source etch include deposition of 400 ns of silicon nitride dielectric layer, 200 ns of silicon nitride dielectric layer, and 450 ns of silicon nitride dielectric layer. It is compared against the process sequence. Low frequency RF etch and high frequency RF plasma etch show similar pattern loading effect results, while remote plasma source etch shows greater pattern loading effect and etch uniformity of 30 percent or more. RF plasma in-situ etch methods are similar to the deposition profile, i.e. the etch profile in plasma etch methods is more isotropic but remote as the etch species are directionally accelerated towards the substrate surface by the sheath voltage in the in-situ RF methods. It is believed that the etch rate is slower on the sidewall surface of the features and the etch rate is faster on the top surface of the features than the plasma etch methods.

또는 BCN 층들에 대해 사용될 수 있다. 탄소를 포함하는 층들에 대해, 에칭 단계(206)는 탄소-함유층들을 에칭하는 반응성 산소 종들을 제공하는 산소-함유 가스 및 할로겐-함유 가스를 포함한다. 할로겐-함유 가스 및 산소-함유 가스는 동시에 또는 순차적으로 사용될 수 있다. 예를 들어, 층은 산소-함유 가스의 플라즈마에 노출된 다음 할로겐-함유 가스의 플라즈마에 노출될 수 있다.While the embodiment of FIG. 2 has been mainly described around SiN layers, the embodiment of FIG. 2 is based on other dielectric layers, such as

Or for BCN layers. For layers comprising carbon, the etching step 206 includes an oxygen-containing gas and a halogen-containing gas that provide reactive oxygen species for etching the carbon-containing layers. The halogen-containing gas and the oxygen-containing gas can be used simultaneously or sequentially. For example, the layer may be exposed to a plasma of an oxygen-containing gas and then to a plasma of a halogen-containing gas.

6 is a flowchart of an embodiment of a deposition process 600. All process steps of the deposition process 600 may be performed in the same chamber. Process 600 begins at a start step 610 that includes placing a substrate having at least one feature across a surface, ie, a patterned substrate, in a chamber. The formed feature may be a feature formed in any form, such as, for example, vias, interconnects, or gate stacks.

The deposition of the dielectric layer is performed by exposing the substrate to the silicon-containing precursor simultaneously with the plasma present in the chamber during the precursor and plasma step 620. Silicon-containing precursors include octamethylcyclotetrasiloxane (OMCTS), methyldiethoxysilane (MDEOS), bis (tert-butylamino) silane (BTBAS), trimethylaminosilane (TriDMAS), trismethylaminosilane (TrisDMAS), Silane, disilane, dichlorosilane, trichlorosilane, dibromsilane, silicon tetrachloride, silicon tetrabromide, or combinations thereof. In one aspect, OMCTS and silanes are preferred silicon-containing precursors. The plasma is provided at about 50 W to about 3000 W at a frequency of 13.56 MHz and / or 350 KHz. Gases that are selectively injected into the chamber simultaneously with the silicon-containing precursors include helium, nitrogen, oxygen, nitrous oxide and argon. If additional gas is used, further gases for injection into the chamber are preferably oxygen and / or helium. Helium or other inert gases can be used as the carrier gas.

The plasma, precursor and optional additional gases injected during step 620 lead to the injection of an oxygen-containing gas, such as oxygen gas or nitrous oxide, into the chamber during the oxygen purification step 630. Oxygen purification step 630 is performed by injecting the oxygen-containing gas into the chamber at a selected time period and partial pressure to purge the residual silicon-containing precursor and optional additional gases. Next, during the oxygen plasma treatment step 640, an oxygen-containing gas, such as oxygen or nitrous oxide, is injected into the chamber. The plasma is provided at about 50W to about 3000W for about 0.1 seconds to about 600 seconds.

Referring back to step 620, the silicon-containing precursor may be injected into the chamber at a flow rate between about 5 sccm and about 1000 sccm. An optional carrier gas, such as helium, may be injected into the chamber at a flow rate between about 100 sccm and about 20000 sccm. The ratio of the flow rate of the silicon-containing precursor into the chamber, such as octamethylcyclotetrasiloxane, to the carrier gas, such as helium, is at least about 1: 1, such as from about 1: 1 to about 1: 100. The chamber pressure is at least about 5 mTorr, such as from about 1.8 Torr to about 10 Torr, while the silicon-containing precursor is introduced into the chamber for layer deposition, and the temperature of the substrate support in the chamber is between about 125 ° C and about 580 ° C. Preferably, the temperature is about 500 ° C. or less. The silicon-containing precursor may enter the chamber for a time period sufficient to deposit a layer having a thickness between about 5 kPa and about 2000 kPa. For example, the silicon-containing precursor may enter the chamber for between about 0.1 seconds and about 120 seconds.

During step 620 the plasma may be provided by RF power between about 50 W and about 3000 W at a frequency of 13.56 MHz or 350 KHz. RF power may be provided to the showerhead, ie the gas distribution assembly, and / or the substrate support of the chamber. The space between the showerhead and the substrate support is at least about 230 mils, such as between about 350 mils and about 800 mils.

The flow of the silicon-containing precursor into the chamber and the RF power are interrupted, and any remaining silicon-containing precursor is removed in step 630 with an oxygen-containing gas such as oxygen gas, nitrous oxide, or a combination thereof. Purified from the chamber by injection into the chamber. Oxygen-containing gas may be injected into the chamber at a flow rate between about 100 and about 20000 sccm. The oxygen-containing gas may enter the chamber for a time period between about 0.1 seconds and about 60 seconds. The chamber pressure is between about 5 mTorr and about 10 Torr while the oxygen-containing gas is introduced into the chamber, and the temperature of the substrate support in the chamber may be between about 125 ° C and about 580 ° C.

After the chamber has been purged, an oxygen plasma treatment is performed in the chamber to treat the layer deposited on the substrate from the silicon-containing precursor, as shown in step 640. Oxygen-containing gas may be injected into the chamber at a flow rate between about 100 and about 20000 sccm. The oxygen-containing gas may enter the chamber for a period of time, such as between about 0.1 seconds and about 120 seconds. The oxygen plasma may be provided by applying RF power between about 50 W and about 3000 W to the chamber at a frequency of 13.56 MHz and / or 350 KHz. The chamber pressure may be between about 5 mTorr and about 10 Torr while the oxygen-containing gas is introduced into the chamber, and the temperature of the substrate support in the chamber may be between about 125 ° C and about 580 ° C.

Oxygen plasma processing can be terminated by shutting off the flow of oxygen-containing gas and RF power into the chamber. Optionally, the thickness of the deposited dielectric layer is analyzed or estimated during the thickness determination step 650. If the thickness of the deposited layer or layers is equal to or greater than the given desired thickness, process 600 is completed during termination step 660. During the termination step 660, the substrate is removed from the chamber through further processing. If the thickness is not equal to or greater than the desired thickness imparted, deposition step 620 and plasma processing step 630 are repeated during the iteration process 655. The thickness determination step 650 and the iteration process 655 may be repeated several times until the desired film thickness is obtained, for example about one to about six repetitions are performed.

If the thickness is not equal to or greater than the desired thickness given, the flow of the silicon-containing precursor into the chamber is resumed for further deposition of the dielectric layer. The chamber is purged and then the oxygen plasma treatment is performed as previously described. Multiple cycles of deposition, purification, and plasma treatment may be performed until the desired dielectric layer thickness is obtained.

Experimental testing of a process similar to FIG. 6 using OMCTS and helium as the silicon-containing precursor is performed. The film deposition rate and the ratio of methyl groups to oxygen groups present in the film formed are shown as a function of plasma power. The deposition rate reaches a plateau at about 300W, and the ratio of methyl groups to oxygen groups is the lowest at about 400W when 400W of RF power is used.

Several combinations of helium and OMCTS were tested to determine the best rate for depositing a dielectric layer. Like silicon containing precursors and additional gases, the ratio of approximately twice the helium to OMCTS yields the film with the largest film thickness. In addition, scanning electron micrographs of the film deposited with OMCTS at 90 mTorr, the film deposited with OMCTS and oxygen plasma, and the film deposited with OCMTS and oxygen plasma at 2 Torr were obtained for the three films of the film deposited with OMCTS and oxygen plasma at 2 Torr. It provides the best pattern loading effect and step coverage.

Nitrous oxide and oxygen are compared to the use in oxygen plasma treatment step 640. Scanning electron micrographs of films deposited using nitrous oxide plasma and films deposited using oxygen plasma show that the film deposited using oxygen plasma has the best pattern loading effect and step coverage for the two films.

In one aspect, the embodiment disclosed with reference to FIG. 6 is pulsed layer deposition (PLD), wherein the pulses of the silicon-containing precursor, as distinguished by oxygen plasma processing, provide sequentially deposited thin layers to form a complete layer. . FIG. 7 is a graph showing the thickness of a layer during dielectric deposition performed using the deposition and plasma treatment cycles disclosed above based on deposition time or number of cycles. The points at which plasma processing is performed are indicated in the graph. 7 shows that there are periods in which the deposition rate is significantly reduced in a similar process that does not include plasma treatments, while the process provided in the present invention does not exhibit this period. FIG. 8 illustrates deposition per time period of introducing silicon-containing precursor (OMCTS) into the chamber in the presence of plasma (plasma soak time of FIG. 8) in a similar process that does not include plasma treatments (deposition only in FIG. 8). The thickness that is shown is less than the thickness deposited per time period of introducing the silicon-containing precursor into the chamber in the presence of the plasma in a process comprising plasma treatments in accordance with an embodiment of the invention. Note that deposition rates approximately 10-times higher than deposition rates for atomic layer deposition (ALD) processes are achieved using processes in accordance with an embodiment of the present invention. It is also noted that the processes disclosed herein can be performed in conventional chemical vapor deposition chambers such as PRODUCER PECVD ^™ chambers.

Oxygen plasma treatment is believed to improve the deposition rate by removing the methyl groups (-CH ₃ ) retained in the deposited layer, since the presence of methyl groups in the deposited layer has been found to interfere with further deposition. Oxygen plasma treatment replaces at least some of the hydroxyl groups (-OH) that can act as nucleation sites for the attachment of another layer of silicon-containing precursors when there are no multiple methyl groups in the deposited layer. 9 illustratively illustrates the effect of oxygen plasma treatment on a layer deposited from OMCTS. For simplicity, only one OMCTS molecule of the layer is shown. In step 902 of FIG. 9, the OMCTS reacts in the presence of a substrate comprising plasma and Si—OH bonds. The plasma forms OMCTS radicals. The OMCTS radical is attached to the hydroxyl group of the substrate, as shown in step 904. In step 906, oxygen plasma treatment with oxygen gas replaces at least some of the methyl groups in the deposited OMCTS layer with hydroxyl groups.

Using the previously disclosed RF power levels, space, pressure and flow rate ratios, when a self-saturating precursor is used as the precursor for depositing the layer, it is thin and only has a thickness of between about 3 kHz and about 25 kHz It has been found that uniform dielectric layers can be deposited reliably. Layers in the 1 mm thickness range in a single 300 mm substrate are obtained using the conditions provided in the present invention. A “self-saturated precursor”, as disclosed herein, is a precursor that deposits one thin layer, eg, one molecular layer of precursor, on a substrate. The presence of the thin dielectric layer prevents further deposition of additional layers of dielectric material from the precursor under the processing conditions used to deposit the thin layer. OMCTS is a preferred self-saturated precursor and contains a number of methyl groups that yield self-saturation deposition of the layer. In other words, a conformal first layer can be deposited from the OMCTS, as soon as the surface of the underlying substrate is covered with the OMCTS molecules, in the presence of the Si-CH ₃ bonds in the surface of the deposited layer among the methyl groups. This is because additional deposition substantially blocks until some are removed by the oxygen plasma treatment described above. Thus, the deposition of each molecular layer of the OMCTS can be highly controlled, so that the step coverage of the final layer can be enhanced.

Scanning electron microscopy images confirm that the processes according to FIGS. 6-9 provide improved step coverage and reduced pattern loading based on layers deposited using conventional plasma enhanced chemical vapor deposition processes.

Deposition of an oxide layer deposited according to an embodiment of the present invention is performed at the sides, bottom and top of the features in a patterned substrate having regions having high density (dense regions) of features and low density (insulated regions) of features. Is measured. 75% of sidewall / top coverage is achieved in dense areas, and 80% of sidewall / top coverage is achieved in insulated areas. 85% bottom / top coverage is achieved in dense areas and 95% bottom / top coverage is achieved in insulated areas. 0% pattern loading effect (PLE) is observed on top of the features, only 10% PLE is observed on the sidewalls and bottom of the features. In one embodiment, the oxide layer is deposited with a top thickness of 420 GPa in a feature having an aspect ratio of 3.5. The thickness of the layer at the side wall is 275 mm 3 and the thickness at the bottom is 345 mm 3. Thus, sidewall / top step coverage is 66%, bottom / top step coverage is 83%, and sidewall / bottom step coverage is 80%. In another example, a low dielectric constant carbon-doped oxide film is deposited with a top thickness of 340 μs in a feature with an aspect ratio of 3.5. The layer thickness on the sidewall is 125 mm 3 and the thickness on the bottom is 210 mm 3. Thus, the sidewall / top step coverage is 35%, the bottom / top step coverage is 60% and the sidewall / bottom step coverage is 58%.

Embodiments and the results have been described in connection with using OMCTS primarily as a silicon-containing precursor for depositing silicon oxide or carbon-doped silicon oxide films, however other silicon-containing precursors may be used. Other silicon-containing precursors may be used including Si-O or Si-N backbone and one or more alkyl groups attached to silicon atoms. In addition, other plasma processes may be used to form further films. For example, a silicon-containing precursor can be used to deposit a layer that is nitrogen plasma treated to provide a conformal SiN layer, as described below with reference to FIGS.

10 is a flowchart of an embodiment of a deposition process 1000. The starting step 610, the thickness determining step 650, the repeating step 655, and the ending step 660 have been described above with reference to FIG. 6. During the deposition step 1010, a silicon-containing precursor is injected into the chamber. Silicon-containing precursors include octamethylcyclotetrasiloxane (OMCTS), methyldiethoxysilane (MDEOS), bis (tert-butylamino) silane (BTBAS), trimethylaminosilane (TriDMAS), trismethylaminosilane (TrisDMAS), Silane, disilane, dichlorosilane, trichlorosilane, dibromsilane, silicon tetrachloride, silicon tetrabromide, or combinations thereof. Silane is a preferred precursor for the deposition process 1000. Deposition step 1010 may be performed for about 2 to about 5 seconds. Next, during step 1020, nitrogen is injected into the chamber to purify the chamber. Next, ammonia is used to provide a plasma to the chamber during step 1030. During the next step 1040, another nitrogen purge is performed. The time for one cycle of steps 1010-650 is about 60 seconds per cycle and the deposition rate is about 2 ms per cycle. The process 1000 provides conformal coverage controlled by the purification efficiency, ie by how efficiently the purification removes the silicon-containing precursor prior to the ammonia plasma.

11 is a flow chart of another embodiment of a deposition process 1100. The start step 610, the thickness determination step 650, the iteration step 655, and the end step 660 have been described above. During the deposition step 1110, a silicon-containing precursor is injected into the chamber. After the silicon-containing precursor step 1110, an optional nitrogen purge step (not shown) may be performed. Next, during the plasma step 1120, a nitrogen-containing precursor plasma is injected into the chamber. The nitrogen containing precursor may comprise nitrogen, ammonia, or nitrous oxide. Ammonia is the preferred nitrogen-containing precursor. The time for one cycle of steps 1110-650 is about 30 seconds for the increment process 1100. The deposition rate is about 3.5 kW per cycle.

Conformal layers provided in accordance with embodiments of the present invention can be used as different layers of semiconductor devices. For example, the deposited layers can be used and sequentially etched to form a spacer near the gate stack of the transistor or used as barrier layers.

The advantages of the process disclosed above are that it yields a film with improved step coverage and reduced pattern loading effect. Process cycles may be performed in the same chamber, requiring less processing time than processes requiring multiple chambers. All thermal budgets and individual substrate process temperatures are lower than those without a plasma.

While so far been described with respect to embodiments of the present invention, other further embodiments of the invention may be devised without departing from the basic spirit and scope of the invention as determined by the following claims.

Claims (20)

A method of forming a layer on a patterned substrate in a chamber, the method comprising: Exposing the patterned substrate to a silicon-containing precursor in the presence of a plasma to deposit a layer on the patterned substrate; After the layer is deposited, treating the layer with a plasma from an oxygen-containing gas; And Repeating the exposing and treating steps until a layer of desired thickness is obtained Comprising a layer forming method. The method of claim 1, Wherein said layer is a silicon oxide layer or a carbon-doped silicon oxide layer. The method of claim 1, Wherein said silicon-containing precursor comprises one or more alkyl groups bonded to silicon. The method of claim 1, And the oxygen-containing gas comprises oxygen gas, nitrous oxide, or a combination thereof. The method of claim 1, Wherein the silicon-containing precursor comprises OMCTS and the oxygen-containing gas comprises oxygen gas. The method of claim 1, Treating the layer with a plasma from the oxygen-containing gas includes removing methyl groups from the deposited layer. The method of claim 6, Treating the layer with a plasma from the oxygen-containing gas further comprises adding hydroxyl groups to the deposited layer. The method of claim 1, Etching the layer such that a spacer is formed near the gate stack after the desired thickness of the layer is obtained. A method of forming a layer on a patterned substrate in a chamber, the method comprising: Exposing the patterned substrate to a silicon-containing precursor in the presence of a plasma to deposit a layer on the patterned substrate; After the layer is deposited, treating the layer using plasma from a nitrogen-containing gas; And Repeating the exposing and treating steps until a layer of desired thickness is obtained Comprising a layer forming method. The method of claim 9, Wherein said silicon-containing precursor comprises a Si-N backbone and one or more alkyl groups bonded to silicon. The method of claim 9, The silicon-containing precursors include octamethylcyclotetrasiloxane, methyldiethoxysilane, bis (tert-butylamino) silane, trimethylaminosilane, trismethylaminosilane, silane, disilane, dichlorosilane, trichlorosilane, dibrom A method of forming a layer, characterized in that it is selected from the group consisting of silane, silicon tetrachloride, and silicon tetrabromide. The method of claim 9, Wherein said layer comprises silicon and nitrogen. A method of controlling step coverage and pattern loading of a layer on a substrate, Placing a substrate in the chamber having at least one feature formed across the surface; Depositing a dielectric layer on the substrate; And Etching the dielectric layer with a plasma from an oxygen or halogen-containing gas selected from the group consisting of fluorine, chlorine, bromine, and combinations thereof to provide a desired profile of the dielectric layer on at least one feature formed. Step coverage and pattern loading control method comprising a. The method of claim 13, Depositing the dielectric layer and etching the dielectric layer with plasma are performed in the same chamber or in separate chambers connected by a transfer chamber. The method of claim 13, The feature includes a top surface, a sidewall surface, and a bottom surface, wherein the dielectric layer is deposited to a greater thickness on the top surface than on the bottom surface and the sidewall surface, and the dielectric layer is formed on the bottom surface and the surface. A method for controlling step coverage and pattern loading, characterized in that it is etched at a higher etch rate on the upper surface than on the side surface. The method of claim 15, And the etch rate of the dielectric layer on the top surface is at least 10% higher than the etch rate of the dielectric layer on the sidewall surface or the bottom surface. The method of claim 15, Repeating the step of depositing the dielectric layer and etching the dielectric layer with the plasma such that a desired profile of the dielectric layer is provided on at least one feature formed. The method of claim 15, Wherein said dielectric layer is a silicon nitride layer and said plasma is an NF ₃ plasma. The method of claim 13, And wherein said plasma is generated by an RF power or remote plasma source in said chamber. The method of claim 19, The plasma is generated by RF power and the RF power is a single frequency between about 100 kHz and about 1 MHz, a single frequency between about 1 MHz and about 13.56 MHz, or a first frequency between about 100 kHz and about 1 MHz and about 1 MHz to about 1 MHz. And a second frequency between 13.56 MHz.

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