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CN111710746B - Perovskite/crystalline silicon tandem solar cell structure - Google Patents

Perovskite/crystalline silicon tandem solar cell structure Download PDF

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CN111710746B
CN111710746B CN202010558387.8A CN202010558387A CN111710746B CN 111710746 B CN111710746 B CN 111710746B CN 202010558387 A CN202010558387 A CN 202010558387A CN 111710746 B CN111710746 B CN 111710746B
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perovskite
crystalline silicon
silicon
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passivation layer
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CN111710746A (en
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寿春晖
闫宝杰
曾俞衡
盛江
叶继春
丁莞尔
郑晶茗
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Ningbo Institute of Material Technology and Engineering of CAS
Zhejiang Energy Group Research Institute Co Ltd
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Zhejiang Energy Group Research Institute Co Ltd
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Abstract

The invention relates to a perovskite/crystalline silicon tandem solar cell structure, comprising: a bottom cell and a perovskite top cell; the bottom battery is a crystalline silicon-PERC bottom battery or a crystalline silicon-PERT bottom battery; the perovskite roof battery comprises a perovskite battery carrier transmission layer A, a perovskite absorption layer, a perovskite battery carrier transmission layer B, a transparent conductive film and a roof electrode grid line; the top electrode grid line is positioned on the top of the transparent conductive film. The invention has the beneficial effects that: the perovskite/crystalline silicon-PREC or perovskite/crystalline silicon-PERT can utilize the production line of the prior crystalline silicon PREC or PERT solar cell, and a good bottom cell can be prepared by only a small amount of improvement, so that the efficiency of the solar cell is improved, and the production cost of the perovskite/crystalline silicon laminated cell is reduced; the structure can form reliable all-surface tunneling junction contact without rectification effect; the preparation process is completely compatible with the existing silicon cell production method, can realize uniform preparation on the whole surface, and has simple process and strong reliability.

Description

Perovskite/crystalline silicon tandem solar cell structure
Technical Field
The invention relates to the field of solar cells, in particular to a perovskite/crystalline silicon laminated solar cell structure.
Background
In recent years, perovskite/crystalline silicon tandem solar cells have gained wide attention in the photovoltaic field. The laminated cell can effectively utilize solar spectrum, perovskite with wide band gap absorbs short wave part of sunlight so as to reduce loss of thermoelectrons, and crystalline silicon with narrow band gap absorbs long wave part so as to expand spectral response of the solar cell so as to reduce loss of long wave. The theoretical efficiency of the double-junction solar cell is far higher than the theoretical limit of the efficiency of a crystalline silicon single-junction solar cell by 29.4 percent. From the viewpoint of energy band matching, perovskite and crystalline silicon are ideal double-junction cell matching. The perovskite is a novel solar cell which develops rapidly in recent years, and shows good development prospect, and the efficiency of a single junction cell exceeds 25%; crystalline silicon solar cells are always the pillar technology in the photovoltaic industry, and the laboratory cell efficiency reaches 26.7%. By using perovskite/crystalline silicon double-junction solar cells, more than 27% of efficiency is achieved by a plurality of research institutions, and the highest efficiency reaches 28%.
The bottom cell widely used in perovskite/crystalline silicon tandem solar cells at present is an amorphous/single crystal Heterojunction (HIT) solar cell. Although the HIT solar cell has the characteristics of high efficiency, few preparation steps, low temperature coefficient and the like, the HIT solar cell still accounts for a small proportion in the actual production due to high equipment cost and expensive materials. Two technical difficulties exist in perovskite/crystalline silicon HIT tandem solar cells: 1) because HIT is prepared at low temperature, the HIT can not bear any high-temperature process in the subsequent perovskite solar cell, such as TiO preparation at high temperature2An electron collecting layer; 2) the HIT solar cell preparation equipment has high cost and expensive materials, and is not beneficial to industrial popularization. The cell structure widely used in the industry is a passivated emitter and back electrode structure (p-type PERC cell (p-PERC) or n-type PERT cell (n-PERT)), so perovskite/crystalline silicon PREC or perovskite/PERT is an ideal choice from the industrial point of view. However, since the PERC or PERT upper electrode is made of alumina (Al)2O3) And silicon nitride (SiNx) passivation, current flows to the grid lines transversely and is collected through the grid lines, and the structure is difficult to form a laminated cell with a two-end structure with perovskite, because the current cannot be connected in the middle. To solve this problemThe Australian National University (ANU) developed a laminate cell using laser shedding technology to connect a perovskite top cell and a PERC bottom cell to form a two terminal structure, achieving 23.6% efficiency. However, such a laser opening technique is complicated and difficult to be applied in industrialization. However, the perovskite/crystalline silicon PREC or perovskite/crystalline silicon PRET tandem solar cell with industrial application prospect has the following two difficulties: 1) the currents of the perovskite top battery and the PREC bottom battery cannot be directly connected; 2) how to form the intermediate tunneling junctions of a perovskite top cell and a p-PREC or n-PERT bottom cell.
Therefore, from the view point of perovskite/crystalline silicon solar cell industrialization, the development of a novel perovskite/crystalline silicon p-PREC or n-PERT crystalline silicon tandem cell structure is of great significance.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provides a perovskite/crystalline silicon laminated solar cell structure.
The perovskite/crystalline silicon tandem solar cell structure (shown in figures 1 and 2) comprises: a bottom cell and a perovskite top cell; the bottom battery is a crystalline silicon-PERC bottom battery (figure 1) or a crystalline silicon-PERT bottom battery (figure 2); the perovskite roof battery comprises a perovskite battery carrier transmission layer A, a perovskite absorption layer, a perovskite battery carrier transmission layer B, a transparent conductive film and a roof electrode grid line; the top electrode grid line is positioned at the top of the transparent conductive film;
the structure of the crystalline silicon-PERT bottom battery (figure 1) from bottom to top is sequentially a back electrode grid line, a passivation layer A, a passivation layer B, n-type silicon chip, a p-type doped emitter, an ultrathin tunneling dielectric layer and a heavily doped polycide film; the bottom of the back electrode grid line embedded into the passivation layer A and the bottom of the passivation layer B are in contact with the n-type silicon wafer; the p-type doped emitter, the ultrathin tunneling dielectric layer and the heavily doped polycide film form a tunneling junction;
the structure of the crystalline silicon type-PERC bottom battery (figure 2) from bottom to top is sequentially a back electrode grid line, a passivation layer A, a passivation layer B, p-type silicon chip, an n-type doped emitter, an ultrathin tunneling dielectric layer and a heavily doped polycide film; the back electrode grid line is embedded into the bottoms of the passivation layer A and the passivation layer B and is contacted with the p-type silicon wafer; and the n-type doped emitter, the ultrathin tunneling dielectric layer and the heavily doped polycide film form a tunneling junction.
Preferably, the polarity of the highly doped polysilicon in the heavily doped polycide film in a crystalline silicon based-PERT bottom cell (fig. 1) is opposite to the polarity of the p-type doped emitter; in a silicon based PERC bottom cell (fig. 2), the polarity of the highly doped polysilicon in the heavily doped polycide film is opposite to the polarity of the n-type doped emitter; the heavily doped polycide film forms a tunneling composite junction with the emitter of the bottom cell and forms ohmic contact with a carrier transport layer of the top cell, i.e., an electron collection layer (ETL) or a hole collection layer (HTL).
Preferably, the back electrode grid line is made by screen printing silver paste and sintering.
Preferably, the passivation layer A in the crystalline silicon-PERT bottom cell is a silicon nitride and silicon oxide back passivation layer, the passivation layer B is a phosphorus diffusion back field layer, and the p-type doped emitter is a boron diffusion layer; the ultrathin tunneling dielectric layer is made of ultrathin silicon oxide (SiOx), ultrathin aluminum oxide (AlOx) or other dielectric materials; the heavily doped polycide film is heavily doped n-type polycide or polysilicon layer (poly-SiOx, poly-SiNx, poly-SiCx, or poly-Si).
Preferably, the passivation layer A in the crystalline silicon type-PERC bottom battery is a silicon nitride back passivation layer, the passivation layer B is an aluminum oxide back passivation layer, the n-type doped emitter is a phosphorus diffusion layer, and the ultrathin tunneling dielectric layer can be ultrathin silicon oxide (SiOx), ultrathin aluminum oxide (AlOx) or other dielectric materials; the heavily doped polycide film is heavily doped p-type polycide or polysilicon layer (poly-SiOx, poly-SiNx, poly-SiCx, or poly-Si).
Preferably, the ultrathin tunneling dielectric layer comprises silicon oxide, aluminum oxide, silicon oxynitride and the like; the silicide has the important function of preventing doping atoms in the polycrystalline silicide from obviously diffusing into the silicon surface, so that a conventional pn junction is prevented from being formed, and a tunneling junction is ensured to be formed.
Preferably, the heavily doped polycide film is polycrystalline or nanocrystalline silicon oxide, silicon nitride or silicon carbide processed at high temperature, but may be polycrystalline silicon (or nanocrystalline silicon); advantages of silicide films over polysilicon films include: the absorption in visible light and middle infrared light regions is low, the refractive index is low, and the square resistance is low under the same thickness.
Preferably, if the heavily doped polycide film is an n-type polycide, the effective doping concentration is higher than 1 × 1018cm-3Preferably higher than 1X 1019cm-3(ii) a If the heavily doped polycide film is p-type polycide, the effective doping concentration is higher than 5 × 1017cm-3Preferably higher than 5X 1018cm-3(ii) a The film thickness of the heavily doped polycide film is 5-100 nm, preferably 10-50 nm.
Preferably, the n-type silicon chip in the crystalline silicon-PERT bottom battery and the p-type silicon chip in the crystalline silicon-PERC bottom battery are in a plane structure or a suede structure; the planar structure is subjected to alkali polishing, and then high-concentration TMAH treatment is performed to make the surface smoother; the surface of the suede structure is firstly subjected to round-corner treatment by using an acid solution, and then high-concentration TMAH treatment is performed to make the surface smoother.
The invention has the beneficial effects that:
1) the perovskite/crystalline silicon-PREC or perovskite/crystalline silicon-PERT can utilize the production line of the prior crystalline silicon PREC or PERT solar cell, and a good bottom cell can be prepared by only a small amount of improvement, so that the efficiency of the solar cell is improved, and the production cost of the perovskite/crystalline silicon laminated cell is reduced; the structure can form reliable all-surface tunneling junction contact without rectification effect; the preparation process is completely compatible with the existing silicon cell production method, can realize uniform preparation on the whole surface, and has simple process and strong reliability.
2) The tunneling junction is formed by adopting the dielectric layer and the heavily doped polycide laminated structure, and the transmission of carriers on the whole surface can be realized. Compared with an HIT bottom battery, the bottom battery with the structure can bear high-temperature treatment at a temperature of more than 250 ℃; compared with a PERC or PERT battery, the structure can form full-surface carrier collection without a hole opening process.
3) The absorption of the polycide in visible light and near infrared light is low, the refractive index is proper, and the spectral distribution can be adjusted through the thickness; the surface is subjected to unique smoothing treatment, so that the uniform deposition of a silicide film is facilitated, and the deposition of each functional layer of a subsequent perovskite battery is facilitated.
Drawings
FIG. 1 is a schematic structural diagram of a novel perovskite/PERT-like tandem solar cell;
fig. 2 is a structural schematic diagram of a novel perovskite/PERC-like tandem solar cell.
Description of reference numerals: the solar cell comprises a back electrode grid line 1, a passivation layer A2, a passivation layer B3, an n-type silicon wafer 4, a p-type doped emitter 5, an ultrathin tunneling dielectric layer 6, a heavily doped polycrystalline silicide film 7, a perovskite cell carrier transmission layer A8, a perovskite absorption layer 9, a perovskite cell carrier transmission layer B10, a transparent conductive film 11, a top electrode grid line 12, a p-type silicon wafer 13 and an n-type doped emitter 14.
Detailed Description
The present invention will be further described with reference to the following examples. The following examples are set forth merely to aid in the understanding of the invention. It should be noted that, for a person skilled in the art, several modifications can be made to the invention without departing from the principle of the invention, and these modifications and modifications also fall within the protection scope of the claims of the present invention.
Example 1:
a perovskite/crystalline silicon tandem solar cell structure comprising: a bottom cell and a perovskite top cell; the bottom battery is a crystalline silicon-PERC bottom battery; the perovskite top battery comprises a perovskite battery carrier transmission layer A8, a perovskite absorption layer 9, a perovskite battery carrier transmission layer B10, a transparent conductive film 11 and a top electrode grid line 12; the top electrode grid line 12 is positioned on the top of the transparent conductive film 11;
the structure of the crystalline silicon type-PERC bottom battery from bottom to top is sequentially back electrode grid line 1, passivation layer A2, passivation layer B3, p-type silicon wafer 13, n-type doped emitter 14, ultrathin tunneling dielectric layer 6 and heavily doped polycide film 7; the back electrode grid line 1 is embedded into the bottoms of the passivation layer A2 and the passivation layer B3 and is in contact with the p-type silicon wafer 13; and the n-type doped emitter 14, the ultrathin tunneling dielectric layer 6 and the heavily doped polycrystalline silicide film 7 form a tunneling junction.
The polarity of the highly doped polysilicon in the heavily doped polycide film 7 is opposite to that of the n-type doped emitter 14, the heavily doped polycide film 7 forms a tunneling composite junction with the emitter of the bottom cell, and forms ohmic contact with a carrier transport layer of the top cell, namely an electron collection layer (ETL) or a hole collection layer (HTL). The back electrode grid line 1 is made of screen printing silver paste and sintering. The passivation layer A2 in the crystalline silicon type-PERC bottom battery is a silicon nitride back passivation layer, the passivation layer B3 is an aluminum oxide back passivation layer, the n-type doped emitter 14 is a phosphorus diffusion layer, and the ultrathin tunneling dielectric layer 6 can be ultrathin silicon oxide (SiOx), ultrathin aluminum oxide (AlOx) or other dielectric materials; the heavily doped polycide film 7 is heavily doped p-type polycide or polysilicon layer (poly-SiOx, poly-SiNx, poly-SiCx, or poly-Si).
The ultrathin tunneling dielectric layer 6 comprises silicon oxide, aluminum oxide, silicon oxynitride and the like; the silicide has the important function of preventing doping atoms in the polycrystalline silicide from obviously diffusing into the silicon surface, so that a conventional pn junction is prevented from being formed, and a tunneling junction is ensured to be formed.
The heavily doped polycide film 7 is polycrystalline or nanocrystalline silicon oxide, silicon nitride or silicon carbide processed at high temperature, and can be polycrystalline silicon (or nanocrystalline silicon); advantages of silicide films over polysilicon films include: the absorption in visible light and middle infrared light regions is low, the refractive index is low, and the square resistance is low under the same thickness. If the heavily doped polycide film 7 is n-type polycide, the effective doping concentration is higher than 1 × 1018cm-3Preferably higher than 1X 1019cm-3(ii) a If the heavily doped polycide film 7 is p-type polycide, the effective doping concentration is higher than 5 x 1017cm-3Preferably higher than 5X 1018cm-3(ii) a The film thickness of the heavily doped polycide film 7 is 5 to 100nm, preferably 10 to 50 nm.
Example 2
A perovskite/crystalline silicon tandem solar cell structure comprising: a bottom cell and a perovskite top cell; the bottom battery is a crystalline silicon-PERT bottom battery; the perovskite top battery comprises a perovskite battery carrier transmission layer A8, a perovskite absorption layer 9, a perovskite battery carrier transmission layer B10, a transparent conductive film 11 and a top electrode grid line 12; the top electrode grid line 12 is positioned on the top of the transparent conductive film 11;
the structure of the crystalline silicon-PERT bottom battery from bottom to top is sequentially back electrode grid line 1, passivation layer A2, passivation layer B3, n-type silicon chip 4, p-type doped emitter 5, ultrathin tunneling dielectric layer 6 and heavily doped polycide film 7; the back electrode grid line 1 is embedded into the bottoms of the passivation layer A2 and the passivation layer B3 and is in contact with the n-type silicon chip 4; the p-type doped emitter 5, the ultrathin tunneling dielectric layer 6 and the heavily doped polycrystalline silicide film 7 form a tunneling junction;
the polarity of the highly doped polysilicon in the heavily doped polycide film 7 is opposite to that of the p-type doped emitter 5; the heavily doped polycide film 7 forms a tunneling composite junction with the emitter of the bottom cell and forms ohmic contact with the carrier transport layer of the top cell, i.e., the electron collection layer (ETL) or the hole collection layer (HTL). The back electrode grid line 1 is made of screen printing silver paste and sintering. The passivation layer A2 in the crystalline silicon-PERT bottom cell is a silicon nitride and silicon oxide back passivation layer, the passivation layer B3 is a phosphorus diffusion back field layer, and the p-type doped emitter 5 is a boron diffusion layer; the ultrathin tunneling dielectric layer 6 is ultrathin silicon oxide (SiOx), ultrathin aluminum oxide (AlOx) or other dielectric materials; the heavily doped polycide film 7 is heavily doped n-type polycide or polysilicon layer (poly-SiOx, poly-SiNx, poly-SiCx, or poly-Si).
The ultrathin tunneling dielectric layer 6 comprises silicon oxide, aluminum oxide, silicon oxynitride and the like; the silicide has the important function of preventing doping atoms in the polycrystalline silicide from obviously diffusing into the silicon surface, so that a conventional pn junction is prevented from being formed, and a tunneling junction is ensured to be formed.
The heavily doped polycide film 7 is polycrystalline or nanocrystalline silicon oxide, silicon nitride or silicon carbide processed at high temperature, and can be polycrystalline silicon (or nanocrystalline silicon); advantages of silicide films over polysilicon films include: the absorption in visible light and middle infrared light regions is low, the refractive index is low, and the square resistance is low under the same thickness. Heavily doped polycide film 7 such asIf n-type polycide is used, the effective doping concentration is higher than 1 × 1018cm-3Preferably higher than 1X 1019cm-3(ii) a If the heavily doped polycide film 7 is p-type polycide, the effective doping concentration is higher than 5 x 1017cm-3Preferably higher than 5X 1018cm-3(ii) a The film thickness of the heavily doped polycide film 7 is 5 to 100nm, preferably 10 to 50 nm.
The n-type silicon chip 4 in the crystalline silicon-PERT bottom battery and the p-type silicon chip 13 in the crystalline silicon-PERC bottom battery are in a plane structure or a suede structure; the planar structure is subjected to alkali polishing, and then high-concentration TMAH treatment is performed to make the surface smoother; the surface of the suede structure is firstly subjected to round-corner treatment by using an acid solution, and then high-concentration TMAH treatment is performed to make the surface smoother.
Example 3
The bottom cell is a planar n-PERT cell, silicon oxide is prepared on the surface of the bottom cell, the thickness of the phosphorus-doped amorphous silicon is 20nm, a tunneling junction is formed after rapid annealing at 700 ℃ for 10-300 s, the contact resistivity is 10-20 m omega-cm 2, and the sheet resistance is 1000 omega/sq. Sequentially preparing an electron transport layer (which can be but is not limited to TiO) with the thickness of 1-300 nm on the tunneling junction2、SnO2、ZnO、PCBM、C60、Nb2O5、SrTiO3ICBA, ICTA, etc.) and perovskite thin film (ABX) with thickness of 50-1500 nm3Wherein A is MA (methylamine), FA (formamidine), 5-AVA (5-ammonium isopropoxide) or CS and combinations thereof, B is Cu, Ni, Fe, Co, Mn, Cr, Cd, Sn, Pb, Pd, Ge, Eu or Yb and combinations thereof, X is I, Br or Cl and combinations thereof), a hole transport layer (which may be but is not limited to spiro-OMeTAD, NiO or combinations thereof) having a thickness of 1-300 nmx、CuI、CuSCN、NiOx、PEDOT:PSS、CuCSN、Graphene oxide、Cu2O、CuO、CuCaO2、P3HT、VOxEtc. materials). And preparing ITO (indium tin oxide), FTO (fluorine-doped tin oxide), ATO (antimony tin oxide) or transparent metal electrodes on the prepared hole transport layer, and finally preparing the grid line electrodes.
Example 4
The bottom cell is a planar n-PERT cell,preparing silicon oxide on the surface, wherein the thickness of the phosphorus-doped amorphous silicon is 100nm, and forming a tunneling junction by performing rapid annealing at 700 ℃ for 10-300 s, wherein the contact resistivity is 5-15 m omega-cm 2, and the sheet resistance is 60 omega/sq. Sequentially preparing an electron transport layer (which can be but is not limited to TiO) with the thickness of 1-300 nm on the tunneling junction2、SnO2、ZnO、PCBM、C60、Nb2O5、SrTiO3ICBA, ICTA, etc.) and perovskite thin film (ABX) with thickness of 50-1500 nm3Wherein A is MA (methylamine), FA (formamidine), 5-AVA (5-ammonium isopropoxide) or CS and combinations thereof, B is Cu, Ni, Fe, Co, Mn, Cr, Cd, Sn, Pb, Pd, Ge, Eu or Yb and combinations thereof, X is I, Br or Cl and combinations thereof), a hole transport layer (which may be but is not limited to spiro-OMeTAD, NiO or combinations thereof) having a thickness of 1-300 nmx、CuI、CuSCN、NiOx、PEDOT:PSS、CuCSN、Graphene oxide、Cu2O、CuO、CuCaO2、P3HT、VOxEtc. materials). And preparing ITO (indium tin oxide), FTO (fluorine-doped tin oxide), ATO (antimony tin oxide) or transparent metal electrodes on the prepared hole transport layer, and finally preparing the grid line electrodes. The SiOx-poly-Si structure and the surface emitting electrode are adopted to form the tunneling junction, laser hole opening is not needed, and a metal electrode and TCO are not needed. Can bear high temperature, and the sheet resistance is lower than that of TCO and metal electrodes.
The invention adopts a polycide material (containing polysilicon); as distinguished from Heterojunction (HIT); defining the thickness to be 5-100 nm and the doping concentration; defining partial diffusion of doping atoms, preferably 10-30 nm; the silicon chip adopted by the invention needs surface treatment, and the surface TMAH is forced no matter the plane suede.
The two electrolyte passivation layers in a typical PERC or PERT solar cell are insulating materials and do not form a current path with the top cell. In the invention, the two electrolyte passivation layers are respectively an ultrathin tunneling dielectric layer 6 and a heavily doped polycide film 7, and current carriers can tunnel through the ultrathin tunneling dielectric layer and form a current path with the top battery.

Claims (3)

1. A perovskite/crystalline silicon tandem solar cell structure, comprising: a bottom cell and a perovskite top cell; the bottom battery is a crystalline silicon-PERC bottom battery or a crystalline silicon-PERT bottom battery; the perovskite top battery comprises a perovskite battery carrier transmission layer A (8), a perovskite absorption layer (9), a perovskite battery carrier transmission layer B (10), a transparent conductive film (11) and a top electrode grid line (12); the top electrode grid line (12) is positioned at the top of the transparent conductive film (11);
the structure of the crystalline silicon-PERT bottom battery from bottom to top is sequentially a back electrode grid line (1), a passivation layer A (2), a passivation layer B (3), an n-type silicon wafer (4), a p-type doped emitter (5), an ultrathin tunneling dielectric layer (6) and a heavily doped polycide film (7); the bottom of the back electrode grid line (1) embedded into the passivation layer A (2) and the passivation layer B (3) is contacted with the n-type silicon wafer (4); the p-type doped emitter (5), the ultrathin tunneling dielectric layer (6) and the heavily doped polycrystalline silicide film (7) form a tunneling junction;
the structure of the crystalline silicon type-PERC bottom battery from bottom to top is sequentially a back electrode grid line (1), a passivation layer A (2), a passivation layer B (3), a p-type silicon wafer (13), an n-type doped emitter (14), an ultrathin tunneling dielectric layer (6) and a heavily doped polycide film (7); the bottom of the back electrode grid line (1) embedded into the passivation layer A (2) and the passivation layer B (3) is contacted with the p-type silicon wafer (13); the n-type doped emitter (14), the ultrathin tunneling dielectric layer (6) and the heavily doped polycrystalline silicide film (7) form a tunneling junction;
the heavily doped polycrystalline silicide film (7) is polycrystalline silicon oxide, silicon nitride or silicon carbide which is processed at high temperature; the film thickness of the heavily doped polycide film (7) is 10-50 nm;
an n-type silicon wafer (4) in the crystalline silicon-PERT bottom battery and a p-type silicon wafer (13) in the crystalline silicon-PERC bottom battery are of a plane structure or a suede structure; the planar structure is subjected to alkali polishing and then high-concentration TMAH treatment; the suede structure is subjected to round-corner treatment on the surface by using an acid solution, and then high-concentration TMAH treatment is performed;
the passivation layer A (2) in the crystalline silicon-PERT bottom battery is a back passivation layer of silicon nitride and silicon oxide,the passivation layer B (3) is a phosphorus diffusion back field layer, and the p-type doped emitter (5) is a boron diffusion layer; the ultrathin tunneling dielectric layer (6) is ultrathin silicon oxide or ultrathin aluminum oxide; the heavily doped polycide film (7) is heavily doped n-type polycide; effective doping concentration higher than 1 x 1019cm-3；
In the crystalline silicon type-PERC bottom battery, a passivation layer A (2) is a silicon nitride back passivation layer, a passivation layer B (3) is an aluminum oxide back passivation layer, an n-type doped emitter (14) is a phosphorus diffusion layer, and an ultrathin tunneling dielectric layer (6) is ultrathin silicon oxide or ultrathin aluminum oxide; the heavily doped polycrystalline silicide film (7) is heavily doped p-type polycrystalline silicide; effective doping concentration higher than 5 x 1018cm-3。
2. The perovskite/crystalline silicon tandem solar cell structure of claim 1, wherein: the back electrode grid line (1) is made by screen printing silver paste and sintering.
3. The perovskite/crystalline silicon tandem solar cell structure of claim 1, wherein: the heavily doped polycrystalline silicide film (7) is made of nanocrystalline silicon oxide, silicon nitride or silicon carbide processed at high temperature.
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