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Valid clocking in wavepipelined circuits

Authors:

William K. C. Lam,

Robert K. Brayton,

Alberto L. Sangiovanni-VincentelliAuthors Info & Claims

ICCAD '92: Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

Pages 518 - 525

Published: 08 November 1992 Publication History

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References

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W. Lien and W. Burleson, Wave-domino logic: Timing analysis and applications. 1992 ACM Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 1992.

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W. Lam, R. Brayton, and A. Sangiovanni- Vincentelli. Valid clocking in wavepipelined circuits. UC Berkeley ERL memorandum: UCBIERL, 1992.

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W. Lain, R. Brayton, and A. Sangiovanni- Vincentelli. Exact delay computation with timed boolean function. UC Berkeley ERL memorandum: UCB/ERL M92/57, May 1992.

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W. Lam, R. Brayton, and A. Sangiovanni- Vincentelli. Minimum cycle time of synchronous circuit with boundeddelays. UC Berkeley ERL memorandum: UCB/ERL M92/56, May 1992.

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Cited By

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Litvin MMourad S(2008)Wave pipelining using self reset logicVLSI Design10.1155/2008/7389832008:2(1-6)Online publication date: 1-Jan-2008
https://dl.acm.org/doi/10.1155/2008/738983
Potkonjak MSrivastava MPreas B(1995)RephasingProceedings of the 32nd annual ACM/IEEE Design Automation Conference10.1145/217474.217515(107-112)Online publication date: 1-Jan-1995
https://dl.acm.org/doi/10.1145/217474.217515
Feehrer JJordan HJess JRudell R(1994)Timing uncertainty analysis for time-of-flight systemsProceedings of the 1994 IEEE/ACM international conference on Computer-aided design10.5555/191326.191656(728-735)Online publication date: 6-Nov-1994
https://dl.acm.org/doi/10.5555/191326.191656
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Index Terms

Valid clocking in wavepipelined circuits
1. Applied computing
  1. Physical sciences and engineering
    1. Engineering
2. Hardware
  1. Integrated circuits
    1. Logic circuits

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Information & Contributors

Information

Published In

ICCAD '92: Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

November 1992

637 pages

ISBN:0897915402

Chairmen:
Louise Trevillyan
IBM Corp., Yorktown Heights, NY
,
Michael Lightner
Univ. of Colorado, Boulder

Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 08 November 1992

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

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Litvin MMourad S(2008)Wave pipelining using self reset logicVLSI Design10.1155/2008/7389832008:2(1-6)Online publication date: 1-Jan-2008
https://dl.acm.org/doi/10.1155/2008/738983
Potkonjak MSrivastava MPreas B(1995)RephasingProceedings of the 32nd annual ACM/IEEE Design Automation Conference10.1145/217474.217515(107-112)Online publication date: 1-Jan-1995
https://dl.acm.org/doi/10.1145/217474.217515
Feehrer JJordan HJess JRudell R(1994)Timing uncertainty analysis for time-of-flight systemsProceedings of the 1994 IEEE/ACM international conference on Computer-aided design10.5555/191326.191656(728-735)Online publication date: 6-Nov-1994
https://dl.acm.org/doi/10.5555/191326.191656
Lam WBrayton RSangiovanni-Vincentelli ADunlop A(1993)Circuit delay models and their exact computation using Timed Boolean FunctionsProceedings of the 30th international Design Automation Conference10.1145/157485.164625(128-134)Online publication date: 1-Jul-1993
https://dl.acm.org/doi/10.1145/157485.164625

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Recommendations

Study on timing analysis and clocking problems of logic circuits

Valid clock frequencies and their computation in wavepipelined circuits

Design and Clocking of VLSI Multipliers