KR20110060924A - Method of simulation and simulation device - Google Patents

Abstract

Based on the equations and device parameters stored in the storage device, arithmetic operation is performed to calculate the surface potential in the silicon layer (STEP4). Similarly, the surface potential of the bulk layer under the buried oxide film when the silicon layer is in the partially depleted state and in the fully depleted state is respectively calculated (STEP5, 6), and the surface potential in the calculated silicon layer is calculated. The calculation is performed in the computing device based on the surface potential in the bulk layer and the equation stored in the storage device, and the surface potential in the bulk layer is obtained by iterative calculation (STEP7). Then, calculation is performed in the computing device based on the surface potential in the bulk layer determined by the iteration calculation and the equation stored in the storage device to calculate the potential of the back surface in the silicon layer (STEP8).

Description

Simulation method and simulation device {METHOD OF SIMULATION AND SIMULATION DEVICE}

The present invention relates to a simulation method and a simulation apparatus for performing device design and circuit simulation of an SOI-MOSFET.

In recent years, with the increase in portable devices, the demand for devices having high speed and low power consumption is increasing. In response to this demand, so-called SOI-MOSFETs for forming MOSFETs on silicon on insulator (SOI) substrates are used as a technique for achieving high speed and low power consumption of CMOS LSI.

The SOI-MOSFET forms a buried oxide film called buried oxide (BOX) under the channel region of a bulk-MOSFET (normal MOSFET), and forms a channel in a thin silicon layer on the buried oxide film.

1 (a) and 1 (b) show cross-sectional structures of the bulk-MOSFET and the SOI-MOSFET. 1 (a) and (b), 11 is a semiconductor substrate (also called a bulk in the case of a SOI-MOSFET), 12 is a buried oxide film (BOX), 13 is a silicon layer (SOI layer), and 14 is A source region, 15 is a drain region, 16 is a channel region, 17 is a gate oxide film (FOX: front oxide in SOI-MOSFET), 18 is a gate electrode.

In the SOI-MOSFET, since the buried oxide film 12 is provided under the channel region 16, since the stray capacitance is smaller than that of the bulk-MOSFET, the switching delay can be reduced and the leakage current to the semiconductor substrate 11 can be achieved. Leakage current can also be reduced.

The SOI-MOSFET is divided into three types according to the thickness of the silicon layer (SOI layer): fully depleted, partially depleted, and incomplete depleted. The non-complete depletion type SOI-MOSFET exhibits characteristics close to the bulk-MOSFET without the depletion layer in the SOI layer 13 reaching the buried oxide film 12 under normal voltage conditions. In the partially depleted SOI-MOSFET, only the depletion layer at the drain end of the SOI layer 13 touches the buried oxide film 12 under normal voltage conditions. In the completely depleted SOI-MOSFET, the entire SOI layer 13 is depleted under normal voltage conditions, and exhibits the most different characteristics from the bulk-MOSFET.

The fully depleted SOI-MOSFET has the following advantages.

(1) Since the silicon layer in which the channel is formed is thin, the leakage current in the deep portion under the gate electrode can be suppressed.

(2) When the SOI layer is in the depletion state, the sub-threshold swing is small because the gate capacitance is small.

(3) The saturation current is large because the substrate voltage dependency of the threshold voltage is small.

(4) Since an insulator is provided between the source and drain regions (diffusion layer) and the substrate, the junction capacitance is small.

As such a fully depleted SOI-MOSFET is a high speed, low power consumption device, a wide range of applications are expected. Several circuit simulation models have been developed to enable circuit design that takes advantage of the fully depleted SOI-MOSFET. As the existing main models, for example, BSIM (Berkeley short-channel IGFET model-SOI) described in Non-Patent Document 1 and UFSIM (University of Florida SOI) described in Non-Patent Document 2 are known. These models contain important features specific to SOI-MOSFETs such as parasitic bipolar effects and generation and recombination currents. In addition, a smooth transition from a partially depleted state to a fully depleted state is also contemplated.

However, since these models are developed as an extension of the bulk-MOSFET model, the problem of non-convergence in circuit simulation has not been solved. This convergence problem is thought to be due to the violation of the law of charge conservation.

By the way, in HiSIM (Hiroshima-Univ. STARC IGFET Model), the operation of the MOSFET from the weak inversion to the strong inversion is performed by the surface potential (single-diffusion-drift expression). surface potential) is derived to calculate the surface charge, and a method of calculating the current is employed (see Non-Patent Document 3, for example). The voltage-current characteristics of the MOSFET obtained from this technique can reproduce the measured values very well with relatively simple calculations. However, since HiSIM is also a bulk-MOSFET model, application to SOI-MOSFETs results in degradation of stability and precision.

That is, as shown in the potential diagram of FIG. 2, the SOI-MOSFET has potential φ _{s0 at} the interface BB of the bulk and the BOX, the interface BS of the BOX and the SOI layer, and the interface SF of the SOI layer and the FOX, respectively _{. bulk} , φ _b0.SOI , φ _{s0 . SOI} occurs. 2, Q _bulk is charge in bulk per unit area, Q _SOI is charge in SOI layer per unit area, φ _SOI is potential change in SOI layer, V _gs is gate-source voltage, and V _fb is flat. Flat-band voltage.

The potential φ _{s0 . bulk} , φ _{b0 . SOI} , φ _{s0 . SOI} changes the surface potential of the source and drain region ends used in HiSIM's bulk-MOSFET model by capacitive coupling, resulting in deterioration of stability and accuracy. Accordingly, there is a demand for a simulation method and a simulation apparatus capable of extending the HiSIM to a model capable of covering the SOI-MOSFET structure and simulating it stably and with high accuracy.

[Non-Patent Document 1] Samuel K. H. Fung, Pin Su, and Chenming Hu, "Present Status and Future Direction of BSIM SOI Model for High-Performance / Low-Power / RF Application" in proc. Model. Simul. Microsysst, 2002, pp. 690-693. [Non-Patent Document 2] S. Veeratoghavan and J. G. Fogsum. "A physical short-channel model for the thin-film SOI MOSFET applicable to the device and circuit CAD." IEEE Trans. Electron Devices, Vol. 35. no. 11, pp. 1866-1875, Nov. 1988. [Non-Patent Document 3] M. Miura-Mattausch, N. Sadachika, D. Navarro, G. Suzuki, Y. Takeda, M. Miyake, T. Warabino, Y. Mizukane, R. Inagaki, T. Ezaki, HJ Mattausch, T. Ohguro, T. Iizuka, M. Taguchi, S. Kumashiro, and S. Miyamoto, "HiSIM2: Advanced MOSFET Model Valid for RF Circuit Simulation," IEEE Trans. Electron Devices, vol. 53, p. 1994. 2006.

The present invention provides a simulation method and a simulation apparatus capable of stably and with high accuracy simulating the device characteristics of an SOI-MOSFET.

According to an aspect of the present invention, device characteristics of a transistor in which a source region and a drain region are formed in the silicon layer on the buried oxide film, and the gate electrode is formed on the channel region between these source and drain regions through a gate insulating film. A simulation method for simulating a signal, comprising the steps of: inputting a formula in one representation form of data representing a characteristic of the transistor from an input device and storing it in a storage device, and inputting a device parameter of the transistor from the input device to the storage device; Storing in the memory device, calculating the first value of the surface potential in the silicon layer by performing calculation in the computing device based on the formula and device parameters stored in the storage device, and the formula stored in the storage device. And phase based on device parameters Computation is performed in an arithmetic device to determine the surface potential of the bulk layer under the buried oxide film when the silicon layer is in a partially depleted state and when the silicon layer is in a fully depleted state. Calculating each of the first values, based on the calculated first value of the surface potential in the silicon layer, the calculated first value of the surface potential in the bulk layer, and the formula stored in the storage device. Calculating by the calculation device to obtain a second value of the surface potential in the bulk layer by iterative calculation; a second value of the surface potential in the bulk layer obtained by the iteration calculation; And calculating the first value of the potential of the back surface of the silicon layer by performing arithmetic operation on the basis of the stored formula. Orientation This method is provided.

In addition, a simulation apparatus is provided which simulates device characteristics of a transistor by executing each step in the simulation method.

1 is a schematic diagram showing the cross-sectional structure of a bulk-MOSFET and an SOI-MOSFET;
2 is a diagram for explaining the potential of an SOI-MOSFET;
3 is a block diagram showing a schematic configuration of a simulation apparatus according to a first embodiment of the present invention;
4 is a flowchart showing a simulation method according to the first embodiment of the present invention;
5 is a flowchart showing a simulation method according to the second embodiment of the present invention;
6 is a characteristic diagram showing the relationship between the surface potential of the SOI layer, the back potential of the SOI layer, and the surface potential of the bulk layer and the gate-source voltage in a 2D-device simulator (2D-Device) model;
7 is a characteristic diagram showing the relationship between the surface potential of the SOI layer, the back potential of the SOI layer, and the surface potential of the bulk layer and the gate-source voltage in the HiSIM-SOI (initial value) model;
8 is a characteristic diagram showing the relationship between the surface potential of the SOI layer, the back potential of the SOI layer, and the surface potential of the bulk layer and the gate-source voltage in the HiSIM-SOI (Newton loop) model.
Fig. 9 is a characteristic diagram showing the relationship between the surface potential of the SOI layer, the back potential of the SOI layer, the surface potential of the bulk layer and the gate-source voltage when the bulk-source voltage is changed in the two-dimensional device simulator model.
10 is a characteristic diagram showing the relationship between the surface potential of the SOI layer, the back potential of the SOI layer, and the surface potential of the bulk layer and the gate-source voltage when the bulk-source voltage is changed in the HiSIM-SOI model.
11 shows a third embodiment, which is a flowchart for calculating device characteristics;
FIG. 12 shows a fourth embodiment and is a flowchart showing a modification of FIG. 5.

EMBODIMENT OF THE INVENTION Hereinafter, embodiment of this invention is described with reference to drawings.

First, the outline | summary of the SOI-MOSFET model used by this invention and the process of consideration leading to this model are demonstrated, Then, the simulation method and simulation apparatus which concern on this embodiment using this SOI-MOSFET model are demonstrated.

The basic way of thinking of the present invention is as follows.

As described above, in the SOI-MOSFET, potentials exist in the interface BB of the bulk and the BOX, the interface BS of the BOX and the SOI layer, and the interface SF of the SOI layer and the FOX, respectively. These three surface potentials can be related by the Poisson equation. In order to calculate the three surface potentials, three equations are required. These potentials vary depending on the structure of the SOI-MOSFET.

The SOI-MOSFET has a large degree of freedom in structure, and in order to optimize the structure of the SOI-MOSFET, this equation must be solved stably for all structures. This is because the potential distribution determines the device characteristics. However, it is not easy to solve the Poisson equation stably by iterative calculation.

Thus, a stable solution is always obtained by adopting two methods: (i) derivation of the initial solution and (ii) (Newton method) solved using Jacobian.

When deriving the initial solution, three surface potentials are solved independently. Surface potential of SOI layer φ _{s0 .} Back potential of _SOI and SOI layer φ _{b0 . SOI} is obtained by an analytical formula, and the surface potential φ _s0 of the bulk layer _{. For bulk} , we use an iterative calculation to find the exact value. For this iteration calculation, the Newton method of 1 variable is used, for example.

The order of initial solution derivation is as follows (a)-(d).

(a) Surface potential φ _s0 of SOI layer _{. For} the initial solution of _SOI, the initial solution of HiSIM2, a bulk-MOSFET model, is used.

(b) Dividing whether the SOI layer is in partially depleted (PD) or fully depleted (FD) state, and the surface potential φ _s0 of the bulk layer _. An interpretation of the _bulk is drawn for each case. And this analysis solution is used as an initial solution of the iteration calculation of (c) next.

(c) The surface potential φ _s0 of the SOI layer obtained in (a) above _. Surface potential φ _s0 of the bulk layer obtained from _SOI and (b) above _{. Using} the initial solution of bulk, the surface potential of the bulk layer φ _{s0 . Find bulk} by iterative calculation.

(d) The surface potential φ _s0 of the bulk layer obtained in (c) above _{. Using bulk} , the potential φ _{b0 on the back surface} of the SOI layer _{. Obtain the SOI} from the equation.

Next, the calculation of specific initial value is demonstrated in detail.

Surface potential of SOI layer φ _{s0 .} The initial value of the _SOI is in the same way as the initial value of the surface potential φ HiSIM2 _s0 (voltage between bulk and source V _bs = 0V when one of) the source-channel-stage to induce expression.

Surface potential φ _s0 of the bulk layer _{. The bulk} is found by solving the Newton method (one variable). When solving, add the following two Poisson equations of SOI, and the back potential φ _b0 of the SOI layer _. Equation (1) using _SOI is used.

Here, the capacitance CSOI of the SOI layer and the surface potential φ _s0 of the bulk layer _{. bulk} is represented by the following formula, respectively.

Again, Q _{s0 . bulk} is the charge induced in bulk after the FD state, Q _dep . SOI is the depletion charge of the SOI layer, V _{bi . SOI} is the built-in potential between the SOI and bulk layers, V _bs is the bulk-source voltage, C _BOX is the buried oxide capacity, Q _bulk is the bulk charge per unit area, ε _Si is silicon Is the dielectric constant, t _SOI is the thickness of the SOI layer, q is the elementary charge quantity, β is the inverse of the thermal voltage, and N _sub.bulk is the bulk impurity concentration.

Next, as an analytical initial value for use in calculating the initial value (the Newton method of one variable), it is divided into (I) FD state and (II) PD state, and in each case, the bulk is (A Consider two cases: depletion and (B) inversion. Therefore, four states are considered.

For the FD and PD states, the distinction between the depletion layer width of the SOI layer W _{d .} If the _SOI is greater FD state, it is smaller than the thickness t _SOI of the SOI layer and the PD state.

Where the depletion layer width W _{d . SOI} can be represented by the following equation.

In addition, N _{sub . SOI} is the impurity concentration of the SOI layer.

In the case of a bulk surface, classification is performed based on the following formula.

φ _{s0 . bulk} = φ _{s0 . bulk _iniA} (φ _{s0 . bulk _iniA} <2Ψ _{B. bulk} )

φ _{s0 . bulk} = φ _{s0 . bulk _ iniA} and φ _{s0 .} smoothing of _{bulk _ iniB} (φ _{s0 . bulk _ iniA} > 2Ψ _{B. bulk} )

Where φ _{s0 . bulk _ iniA} is the initial value of the surface potential of bulk depletion, φ _{s0 . bulk _ iniB} is the initial value of the surface potential of the bulk is reversed, Ψ _{B. bulk} is the difference between the intrinsic Fermi (Fermi) level and the Fermi level.

Initial value calculation (interpretation)

(Ⅰ.A) Bulk depletion in FD state

The charge Q _s0 induced in bulk _. Solve equation (1) by approximating _bulk as

Then, it becomes

Provided that A ₁ and A ₂ are as follows:

Q _{dep . SOI} is said to be the following equation.

(Ⅰ.B) Bulk inverted in FD state

The charge Q _s0 induced in bulk _. Solve equation (1) by approximating _bulk as

That way, φ _{s0 . The bulk _ FD _ iniB} is

However, A ₃ and A ₄ are as follows.

Where n _i is the intrinsic carrier density.

(II.A) Bulk Depletion in PD State

In the PD state, the surface potential φ _s0 of the SOI layer _{. As SOI} increases, the depletion layer widens and the following relationship is established.

W _{d . When SOI} = t _SOI , it is considered that Expression (1) holds true at the same time as the above relationship. For this reason, Formula (1) becomes Formula (2).

Equation (2) is approximated and solved by the following equation as in the case of the FD state.

Then, the following equation is obtained.

However, A ₅ and A ₆ are each represented by the following formula.

(II.B) Bulk inverted in PD state

Solve equation (2) by approximating it with

Then, the following equation is obtained.

However, A ₇ and A ₈ are each represented by the following formula.

Initial value calculation (Newton's method of one variable)

(2.1) In case of FD status

From equation _{(1), f (φ s0} . Bulk) by the the following equation, surface potential of the bulk layer by a Newtonian law φ _s0. Update the _bulk .

That way, φ _{s0 . bulk} ^{n +1} is given by

(2.2) PD status

From equation _{(2), f (φ s0} . Bulk) by the the following equation, surface potential of the bulk layer by a Newtonian law φ _s0. Update the _bulk .

That way, φ _{s0 . bulk} ^{n +1} is given by

<Surface potential φ _s0 of SOI layer _. Derivation of _SOI >

The surface potential φ _s0 of the bulk layer determined by the Newton method described above _{. Using bulk} , the surface potential of the SOI layer φ _{s0 . SOI} can be derived as follows.

Surface potential φ _s0 of the SOI layer in the <FD state _. Correction of _SOI >

Depletion layer width of SOI layer W _{d . When SOI} reaches the thickness t _SOI of the SOI layer, the reversal of the surface of the SOI layer is accelerated. The charge Q _s0, which is organic in bulk after becoming FD _{. bulk} is the depletion charge "-qN _{sub . SOI} · (W _{d . SOI} -t _SOI ) ”is so small that it can be ignored, and if ignored, it is considered that the depletion layer width exhibits the same potential change as the bulk-MOSFET fixed by the thickness t _SOI of the SOI layer. .

In order to keep the depletion layer width (= t _SOI ) constant in the bulk-MOSFET, a bias of A may be applied to the substrate as in the following equation.

Solving the above equation for A gives the following equation:

It is assumed that this bias A is applied to the substrate, and the initial solution of the surface potential of the SOI layer φ _{s0 . Solving} and _{fixing SOI _ iniA} gives the following equation:

However, V _gp is a value obtained by subtracting the flat band voltage from the gate-source voltage, C _FOX is the capacity of the gate oxide film rh, and cnst0 is represented by the following equation.

Three initial solutions can be derived as mentioned above.

The simulation is performed in the simulation apparatus using the initial solution obtained as described above and the analysis formula.

[First Embodiment]

Next, a simulation method and a simulation apparatus according to the first embodiment of the present invention using the SOI-MOSFET model will be described with reference to FIGS. 3 and 4. 3 is a block diagram showing a schematic configuration of a simulation apparatus according to an embodiment of the present invention, and FIG. 4 is a flowchart showing a simulation method according to an embodiment of the present invention.

As shown in FIG. 3, the simulation apparatus includes, for example, an input apparatus 21 composed of a keyboard, an operation panel, an audio input apparatus, various data reading apparatuses, or the like, a processing apparatus 22 that performs various kinds of processing, and a semiconductor. A storage device 23 such as a memory or a hard disk, and an output device 24 such as a monitor, a printer, and a recording device. The processing device 22 is composed of a control device 22-1 such as a CPU and a computing device 22-2 such as an ALU, and the input device 21 and the computing device in the control device 22-1. (22-2), operations of the memory device 23, the output device 24, and the like are controlled.

The simulation apparatus may be configured exclusively, or may be realized by, for example, corresponding to each apparatus of the personal computer.

In the memory device 23, a mathematical expression which is one representation format of data representing the characteristics of a transistor, that is, various arithmetic expressions, analytical expressions, relational expressions, and the like in the HiSIM-SOI model described above are described and stored as a program. For example, a program describing an equation based on a drift-diffusion approximation by a surface potential model, a program describing an equation for calculating the potential of the source terminal of the SOI-MOSFET, and an operation for calculating the potential of the drain terminal of the SOI-MOSFET. A program describing an expression, a program describing an expression of the drain-source current of the SOI-MOSFET, a program describing an analysis formula for calculating the surface potential of the SOI layer, and an analysis for calculating the surface potential of the bulk layer The program describing the equation, the program describing the analysis formula for calculating the potential behind the SOI layer, and the like are stored. In addition, the storage device 23 stores the device parameters input from the input device 21, the initial values of the parameters, and the like (although they may be stored in advance), and the calculation result by the calculation device 22-2. Is remembered.

In the above configuration, as shown in the flowchart of FIG. 4, first, the gate oxide film thickness t _FOX , the thickness t _SOI of the SOI layer, the impurity concentration N _{sub.bulk of the} bulk, and the impurities of the SOI layer from the input device 21. Concentration N _{sub .} Enter the device parameters and model parameters for the SOI-MOSFET, such as _SOI, and (STEP1), gate-source voltage V _gs, between drain-source voltage V _ds, the bulk-source voltage V _bs, the flat-band voltage V _fb, etc. The voltage to be applied to the SOI-MOSFET is set (STEP2).

The model parameter of the SOI-MOSFET input from the input device 21, the gate-source voltage V _gs , the drain-source voltage V _ds , the bulk-source voltage V _bs, and the flat band voltage V _fb of the SOI-MOSFET are Under the control of the control device 22-1 in the processing device 22, the storage device 23 is read and stored (STEP3).

The model parameter of the SOI-MOSFET stored in the storage device 23, and the surface potential φ _s0 of the SOI layer _. Program describing an analytical formula for calculating _SOI , surface potential φ _s0 of bulk layer _{. The} program describing the analysis formula for calculating the _bulk, and the potential φ b _{0 on the back} of the SOI layer. The program describing the analysis formula for calculating the _SOI is operated by the control unit 22-1. 2), and the initial solution is derived in accordance with a functional formula such as (Equations 1) to (33) described above.

That is, the surface potential φ _{s0 .} Of the SOI layer using the HiSIM2 equation _. An initial solution of _SOI is derived (STEP4), and the surface potential φ _s0 of the bulk layer when the SOI layer is in the PD state _{. The bulk} solution (STEP5) is derived and the surface potential φ _s0 of the bulk layer when the SOI layer is in the FD state _{. Obtain} an analytic solution for the _bulk (STEP 6). These initial solutions or interpretations are transferred to and stored in the storage device 23.

Surface potential φ _s0 of the SOI layer obtained in step 4 above _{. SOI} and the surface potential φ _s0 of the bulk layer obtained in the above Steps 5 and 6 _{. Using the bulk} solution as an initial value, the surface potential φ _{s0 . The bulk} is obtained by iterative calculation (STEP 7).

After that, the potential φ _{b0 on} the rear surface of the SOI layer stored in the storage device 23 _. The surface potential φ _{s0 . Of the} bulk layer obtained in the above STEP 7 according to the program describing the equation for calculating the _{SOI . Using bulk} , the potential φ _{b0 on the back surface} of the SOI layer _{. Obtain the SOI} from the equation (STEP 8).

In this way, HiSIM can be extended to a model that can cover the SOI-MOSFET structure. As a result, the device characteristics of the SOI-MOSFET can be simulated stably and with high accuracy.

Second Embodiment

The surface potential φ _{s0 . Of the} SOI layer which is the initial solution in the SOI-MOSFET structure by the simulation method by HiSIM-SOI described in the first embodiment _{. SOI} (hereinafter, φ ₁ ) and the potential φ b _{0 on the back surface} of the SOI layer _{. SOI} (hereinafter φ ₂ ) and the surface potential φ _s0 of the bulk layer _. the _bulk (more than φ ₃₎ can be obtained.

The second embodiment to be described below is a method for simulating more precisely and multivariate at high speed by using the values of potentials φ ₁ , φ ₂ , and φ ₃ obtained as described above as initial values. .

Hereinafter, with reference to FIG. 5, the simulation method which concerns on 2nd Embodiment is demonstrated. In addition, this simulation is performed by the general purpose computer system similarly to 1st Embodiment.

First, as in the simulation shown in FIG. 4, the gate oxide film thickness t _FOX , the thickness t _SOI of the SOI layer, and the impurity concentration N _{sub . bulk} , SOI layer impurity concentration N _{sub .} By entering the potentials φ _1, φ _2, φ ₃ as a device parameter, the model parameters and the initial solution for the SOI-MOSFET, such as _SOI, and stores in the storage device (23) (STEP11, 12) .

Next, a formula required for calculation, that is, a program, is input from the predetermined input device 21 of the computer system and stored in the storage device 23. These are stored in an external storage device (for example, a hard disk) or the like as a predetermined storage device in a stored program computer system. This program is loaded into an execution memory device (RAM or the like) when the simulation is executed, and is executed gradually or in parallel by a computing device (CPU or the like) (STEP13).

Next, the formula will be described.

The surface potential φ ₁ of the SOI layer, the potential φ ₂ on the back surface of the SOI layer, and the surface potential φ ₃ of the bulk layer are each represented by, for example, the following equations (A), (B) and (C). Assume that a relationship is established.

Moreover, it is needless to say that Formula (A), (B), and (C) are not limited to this, but are represented by another expression or another analysis formula.

Where V _gp is a value obtained by subtracting the flat band voltage from the voltage between the gate and the source, and Q _{s0 . bulk} is the bulk charge, Q _n is the reverse charge on the SOI surface, Q _{dep . SOI} is the depletion charge amount of the SOI layer, C _BOX is the charge capacity of the BOX, and C _FOX is the charge capacity of the gate oxide film. In addition, C _SOI is ε _si / t _SOI , ε _si is the dielectric constant of silicon, and t _SOI is the thickness of the SOI layer.

The surface potential φ ₁ of the SOI layer, the potential φ ₂ on the back surface of the SOI layer, and the bulk layer so that f ₁ , f ₂ , and f ₃ in the above formulas (A), (B), and (C) are simultaneously 0. What is necessary is just to determine the surface potential (phi) ₃ of. That is, to return to the solution of the simultaneous equation of three variables. In the process of obtaining these solutions by computer, it is necessary to repeat the calculation of three variables by the Newton method.

Next, STEP 14 is executed. The iterative calculation of the three variables is carried out using the Jacobian matrix J (Equation (D)), whereby the correction difference amounts of each surface potential δφ = (δφ ₁ , δφ ₂ , δφ ₃ ) T (T is the transposition ) Is repeated by equation (E).

That is, in the said STEP14, Formula (E) is input from the predetermined input device of a computer system as a program of the 3-variable iteration calculation, and is stored in the memory | storage device.

Next, the surface potential φ ₁ of the SOI layer, the potential φ ₂ on the back surface of the SOI layer, and the initial value of the surface potential φ ₃ of the bulk layer are input from a predetermined input device of the computer system and stored in the storage device. . They are stored in an external storage device or the like as a predetermined storage device in a stored program execution computer system, and are loaded into an execution storage device such as a RAM at the time of execution.

In addition, the process order of STEP11 and STEP12 does not matter. It is also possible to run STEP11 after STEP12.

(STEP15, 16)

From STEP 11 to STEP 14, the program of the iterative calculation and the initial value at the time of executing the program are stored in an external storage device or the like, so that they are loaded into RAM or the like at arbitrary timing, and are gradually or parallel to the CPU or the like. Just run Here, the termination condition of the execution is a case where the correction difference amount δφ reaches a predetermined threshold in the calculation process. If the correction difference amount δφ has not reached the threshold, control shifts to STEP13, and the operation is repeated.

By the operation, the surface potential of the SOI layer obtained as an initial value φ ₁ and, on the basis of the potential φ ₂ of the back surface of the SOI layer, and surface potential φ ₃ of the bulk layer, calculated Shinano more precision is good SOI layer of the repeating Surface potential phi ₁ , potential phi ₂ of the back surface of SOI layer, and surface potential phi ₃ of a bulk layer can be obtained.

The values of potentials φ ₁ , φ ₂ , and φ ₃ obtained by the above treatment do not fall into extreme values in the iteration calculation. This is because at these initial values, they already have considerable precision.

(STEP17)

In the above STEP 14, when the correction difference amount δφ reaches the threshold value, the device characteristics of the SOI-MOSFET, for example, current, capacity, etc., are obtained based on potentials φ ₁ , φ ₂ , and φ ₃ (solution of repetition calculation). The device characteristics refer to the current and capacitance between the gate, source and drain terminals of the MOSFET, and also the current and capacitance between these terminals and the bulk.

In addition, by introducing the Jacobian matrix J (formula (D)), iterative calculation of multivariate variables (here, but not limited to three variables) can be performed simultaneously and at high speed on a computer. As a result, both the advantages of precision in computer simulation and high speed can be achieved.

Therefore, according to the second embodiment, by using the value of the potential obtained in the first embodiment as an initial value, it is possible to simulate more precisely and multivariate at high speed.

Fig. 6 is a characteristic diagram showing the relationship between the surface potential of the SOI layer, the back potential of the SOI layer, and the surface potential of the bulk layer and the gate-source voltage in the 2D device simulator (2D-Device) model. The simulation results using the two-dimensional device simulator MEDICI are shown here.

7 is a characteristic diagram showing the relationship between the surface potential of the SOI layer, the back potential of the SOI layer, and the surface potential of the bulk layer and the gate-source voltage in the HiSIM-SOI (initial value) model. 8 is a characteristic diagram showing the relationship between the surface potential of the SOI layer, the back potential of the SOI layer, and the surface potential of the bulk layer and the gate-source voltage in the HiSIM-SOI (Newton loop) model. 6 to 8 show simulation results when the bulk-source voltage V _bs is -2V.

Fig. 9 is a characteristic diagram showing the relationship between the surface potential of the SOI layer and the voltage between the gate and the source when the voltage between the bulk and the source is changed in the two-dimensional device simulator (2 D-Device) model. Fig. 10 is a characteristic diagram showing the relationship between the surface potential of the SOI layer and the gate-source voltage when the bulk-source voltage is changed in the HiSIM-SOI model. 9 and 10, the bulk-source voltage V _{bs is set} to 0.0V, -0.5V, -1.0V, -2.0V.

That is, the superiority or effect of HiSIM-SOI on the 2D model is as follows. In the 2D device simulator, device structures are divided into meshes, and Poisson equations and current continuous equations are solved for each node and numerically solved. As a result, the calculation amount inevitably increases, and there is a limit on the number of nodes that can be processed by the calculator. As a result, the 2D device simulator cannot simulate large circuits, and the circuit simulation of practically several transistors is limited. Moreover, since many simultaneous equations are solved numerically, there exists a problem that calculation time becomes long.

On the other hand, since HiSIM-SOI does not classify devices into meshes and obtains device characteristics by an analytical formula, the amount of calculation is very small compared to 2D device simulators. Therefore, simulation on a large scale circuit can be executed within a preferable processing time in practice. In addition, HiSIM-SOI has a feature that the calculation time per device is overwhelmingly faster than 2D device simulator.

Therefore, according to the simulation apparatus and simulation method of the above structure, the device characteristic of SOI-MOSFET can be simulated stably and with high precision. In addition, since a model has been developed using the structure parameters of the MOSFET, it is possible to easily cope with the difference in structure.

Therefore, the SOI-MOSFET can be designed and manufactured by reflecting the MOSFET model and simulation results in the device design and adjusting various device parameters and set voltages in the MOSFET.

[Third Embodiment]

The present invention, in addition to the device parameters, inputs the circuit diagram and the driving conditions of the circuit from the input device 21, stores it in the storage device 23, and uses the data stored in the storage device 23 to adjust the circuit characteristics. You can get it.

11 shows a third embodiment and shows a method for obtaining circuit characteristics.

As shown in FIG. 11, first, a device parameter, a circuit diagram, and driving conditions of a circuit are input from the input device 21, and are stored in the memory | storage device 23 (STEP21). This is done by a circuit simulation program (circuit simulator) stored in the storage device 23.

Subsequently, the device parameters and the applied voltage are input from the circuit simulation program to the program (HiSIM-SOI) for simulating the device characteristics of the SOI-MOSFET (STEP22).

Thereafter, the calculation is performed in accordance with the flowcharts shown in FIGS. 4 and 5 to obtain device characteristics (STEP23).

The device characteristics obtained in STEP23 are supplied to the program for circuit simulation (STEP24).

The circuit simulation program simulates circuit characteristics based on the supplied device characteristics (STEP25).

In the apparatus shown in FIG. 3, the specific operation | movement regarding the simulation of the said circuit characteristic is as follows. The input device 21, the calculation device 22-2, the output device 24, and the storage device 23 are controlled by the control device 22-1. The storage device 23 stores a program describing a command for controlling the control device 22-1, a device parameter input from the input device 21, a circuit diagram, and driving conditions of the circuit. The computing device 22-2 simulates the circuit characteristics based on the device parameters, the circuit diagram, and the data of the driving conditions of the circuit in accordance with the program stored in the storage device 23. The output device 24 outputs the circuit characteristics calculated by the calculation device 22-2.

According to the third embodiment, circuit characteristics are simulated by using a program (HiSIM-SOI) and a circuit simulation program for inputting device parameters, circuit diagrams, and circuit driving conditions to simulate device characteristics of the SOI-MOSFET. It is possible to do Therefore, it is possible to simulate circuit characteristics with high precision and at high speed.

Fourth Embodiment

The present invention can also specify a device parameter by changing the input device parameter by a predetermined algorithm and ending the calculation when the device characteristic as the result of the calculation matches the requested device characteristic.

12 shows a fourth embodiment, which shows a method for specifying a device parameter.

As shown in Fig. 12, first, the device parameters for the SOI-MOSFET from the input device 21, for example, the gate oxide film thickness t _FOX , the thickness t _SOI of the SOI layer, and the impurity concentration N _{sub . bulk} , SOI layer impurity concentration N _{sub . SOI} and the like are input and stored in the memory device 23 (STEP31).

Thereafter, potentials φ ₁ , φ ₂ , and φ ₃ are calculated according to the flowchart shown in FIG. 5 (STEP32), and the device characteristics of the SOI-MOSFET, for example, current, capacitance, etc. between the terminals are calculated (STEP33).

Next, it is judged whether or not the calculated device characteristic matches the requested device characteristic (STEP 34). As a result, if they do not match, the device parameter is changed, and the processes of STEP 31 to 33 are repeated again. The change of the device parameter changes, for example, the gate oxide film thickness, the thickness of the SOI layer, the bulk impurity concentration, the impurity concentration of the SOI layer, and the like.

When the calculated device characteristic and the requested device characteristic coincide, the calculation process is terminated (STEP35). As a result, device parameters corresponding to the requested device characteristics can be obtained.

According to the fourth embodiment, by changing the device parameters, calculates the value of the potentials φ _1, φ _2, φ ₃ with high accuracy, based on the calculated potentials φ _1, φ _2, φ ₃ of the SOI-MOSFET The device characteristic is calculated and this calculated device characteristic is compared with the requested device characteristic. For this reason, it is possible to obtain the device parameters of the SOI-MOSFET matching the required device characteristics.

As described above, according to one aspect of the present invention, a simulation method and a simulation apparatus capable of simulating the device characteristics of an SOI-MOSFET stably and with high accuracy are obtained.

Since the device structure of the SOI-MOSFET has a large degree of freedom, the structure of the SOI-MOSFET can be determined by the simulation of the present invention, and at the same time, the evaluation of circuit characteristics can be performed. For this reason, development cost can be reduced. In addition, the demand for SOI-MOSFET is large, and the present invention can cope with various uses.

In addition, this invention is not limited to the said, 1st-4th embodiment, It is possible to variously deform in the range which does not deviate from the summary of invention. For example, each of the above embodiments has described a simulation method and a simulation apparatus only for the SOI-MOSFET model as an example. However, since the basic parts of the bulk-MOSFET model and the SOI-MOSFET model are common, for example, by setting a flag to calculate the potential required only for the SOI-MOSFET and switching this flag, the bulk-MOSFET and SOI-MOSFET It can correspond to both. Therefore, it is also possible to simulate a circuit in which a bulk-MOSFET and a SOI-MOSFET are mixed.

Further, the first to fourth embodiments include inventions of various steps, and various inventions can be extracted by appropriate combination of a plurality of constituent requirements disclosed. For example, even if some of the configuration requirements are deleted from the overall configuration requirements shown in the first to fourth embodiments, at least one of the problems described in the problem field to be solved by the invention can be solved, and the effects described in the effect column of the invention. If at least one of is obtained, a configuration in which this configuration requirement is omitted can be extracted as an invention.

(Industrial availability)

The present invention can be applied to device design of an SOI-MOSFET, simulation of a circuit using the SOI-MOSFET, and the like.

Claims (10)

Forming a source electrode and a drain region in a silicon layer on a buried oxide film, and simulating device characteristics of a transistor in which a gate electrode is formed through a gate insulating film on a channel region between the source and drain regions. In the simulation method,
Inputting an expression, which is one representation of data representing the characteristics of the transistor, from an input device and storing it in a storage device;
Inputting device parameters of the transistor from the input device and storing them in the storage device;
Calculating the first value of the surface potential in the silicon layer by performing calculation in the computing device based on the equation stored in the storage device and the device parameter;
The embedding is performed in the computing device based on a formula stored in the storage device and a device parameter so that the embedding when the silicon layer is in a partially depleted state and when the silicon layer is in a completely depleted state Calculating a first value of the surface potential of the bulk layer under the oxide film, respectively,
On the basis of the calculated first value of the surface potential in the silicon layer, the calculated first value of the surface potential in the bulk layer, and the formula stored in the storage device, the arithmetic operation is performed in the computing device. Obtaining a second value of the surface potential in the bulk layer by iterative calculation,
On the basis of the second value of the surface potential in the bulk layer determined by the iterative calculation and the formula stored in the storage device, the calculation is performed in the computing device, and the potential of the back surface potential in the silicon layer is calculated. Calculating the value of 1
Simulation method comprising the.
The method of claim 1,
As a representational form of data representing the characteristics of the transistor, different formulations describing the relationship between the surface potential in the silicon layer, the surface potential in the bulk layer, and the potential of the back surface in the silicon layer. Inputting first to third formulas from the input device and storing them in the storage device;
Storing the first value of the surface potential in the silicon layer, the second value of the surface potential in the bulk layer, and the first value of the potential of the back surface in the silicon layer;
The different first to third formulas stored in the storage device, the first value of the surface potential in the silicon layer, the second value of the surface potential in the bulk layer, and the back surface in the silicon layer. On the basis of the first value of the potential of, the iterative calculation is performed in the computing device, the second value of the surface potential in the silicon layer, the third value of the surface potential in the bulk layer, and the Further comprising calculating a second value of the rear potential
Simulation method characterized in that.
The method of claim 2,
Wherein, in the iterative calculation, the first to third equations different from each other are performed by an iterative calculation step in the computing device as an equation of a Jacobian matrix.
The method of claim 1,
The calculation method of a 1st value of the surface potential in the said silicon layer is performed using the bulk-MOSFET model based on surface potential.
The method of claim 1,
The iterative calculation is a simulation method, characterized in that the Newton method of one variable (Newton method).
The method of claim 1,
Storing in the storage device a program describing a command for controlling the input device, the storage device, and a control device controlling the arithmetic device;
And inputting a device parameter, a circuit diagram, and a driving condition of the circuit from the input device, and storing them in the storage device,
Under the control of the control device, according to the program stored in the storage device, the calculation is performed in the calculation device based on the model parameters, the circuit diagram, and the driving conditions of the circuit calculated in the calculation device to simulate the circuit characteristics.
Simulation method characterized in that.
The simulation apparatus characterized by simulating the device characteristic of a transistor by performing each step in the simulation method of Claim 1 or 2.
The method of claim 7, wherein
A control device for controlling the input device, the storage device, and the arithmetic device;
And an output device controlled by the control device and outputting a model parameter obtained by the calculation by the calculation device.
Simulation device characterized in that.
The method of claim 8,
The storage device further stores a program describing a command for controlling the control device, a device parameter, a circuit diagram, and a circuit driving condition input from the input device, and according to the program under the control of the control device. And calculating in the computing device on the basis of the device parameters, the circuit diagram, and the driving conditions of the circuit to simulate circuit characteristics.
The method of claim 2,
Inputting device parameters for an SOI-MOSFET from the input device and storing them in the storage device;
Said control based on the 2nd value of the surface potential in the said silicon layer, the 3rd value of the surface potential in the said bulk layer, and the 2nd value of the potential of the back surface in the said silicon layer obtained by Claim 2 Calculating device characteristics by the apparatus,
Determining, by the control apparatus, whether the calculated device characteristic matches the requested device characteristic;
When it is determined by the control apparatus that the calculated device characteristic and the requested device characteristic do not coincide, the step of changing the device parameter and repeating the calculation again is repeated, and the calculated device characteristic and the requested device characteristic are When matching, ending the calculating step
Simulation method characterized in that.

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