KR100720049B1 - 다층 배선판 및 그 제조 방법 - Google Patents
다층 배선판 및 그 제조 방법 Download PDFInfo
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
Description
Claims (14)
- 코어 기판과 상기 코어 기판의 양면에 형성된 배선 패턴 부재를 갖고, 상기 코어 기판은 상기 코어 기판을 관통하는 도전성 부재를 갖고, 상기 코어 기판의 양면의 상기 배선 패턴 부재는 상기 코어 기판을 관통하는 상기 도전성 부재를 통해 서로 접속되는 다층 배선판으로서,상기 코어 기판은 도금으로 형성된 비어 칼럼(column)과 도전성 구조 부재 및 개개의 상기 비어 칼럼과 상기 도전성 구조 부재를 전기적으로 서로 절연시키는 절연 구조 부재를 갖고,상기 비어 칼럼은 상기 코어 기판을 관통하여 상기 코어 기판의 양면의 상기 배선 패턴 부재를 서로 접속하는 도전성 부재로서 기능하며,상기 코어 기판은 절연 구조 부재에 의해 서로 절연된 비어 칼럼과 도전성 구조 부재를 각각 포함한 복수의 층을 가지고, 상기 층들은 그 사이에 끼워진 절연층에 의해 상호 분리되고, 인접하는 층의 상기 비어 칼럼은 삽입된 상기 절연층을 관통하는 중간 비어에 의해 서로 접속되는 것을 특징으로 하는 다층 배선판.
- 삭제
- 제1항에 있어서,상기 인접하는 층의 선택된 도전성 구조 부재는 서로 접속되는 것을 특징으로 하는 다층 배선판.
- 제1항에 있어서,상기 도전성 구조 부재중 적어도 하나는 전력 공급 부재 또는 접지 부재로서 사용되는 것을 특징으로 하는 다층 배선판.
- 제1항에 있어서,상기 배선 패턴 부재중 적어도 하나는 상기 코어 기판의 상기 도전성 구조 부재에 접속되는 것을 특징으로 하는 다층 배선판.
- 제1항에 있어서,상기 절연 구조 부재는 내열 수지재로 형성되는 것을 특징으로 하는 다층 배선판.
- 제6항에 있어서,상기 내열 수지재는 에폭시 또는 폴리이미드인 것을 특징으로 하는 다층 배선판.
- 코어 기판과 상기 코어 기판의 양면에 형성된 배선 패턴 부재를 갖고, 상기 코어 기판은 상기 코어 기판을 관통하는 도전성 부재를 갖고, 상기 코어 기판의 양면의 상기 배선 패턴 부재는 상기 코어 기판을 관통하는 상기 도전성 부재를 통해 서로 접속되는 다층 배선판으로서, 상기 코어 기판은 도금으로 형성된 비어 칼럼과, 도전성 구조 부재 및 개개의 상기 비어 칼럼과 상기 도전성 구조 부재를 전기적으로 서로 절연시키는 절연 구조 부재를 갖고, 상기 비어 칼럼은 상기 코어 기판을 관통하여 상기 코어 기판의 양면의 상기 배선 패턴 부재를 서로 접속하는 도전성 부재로서 기능하는 다층 배선판을 제조하는 방법에 있어서,도전 기판의 표면에 패터닝된 레지스트막을 형성하는 단계와,상기 레지스트막을 마스크로, 그리고 상기 도전 기판을 전력 공급층으로 사용하여, 패터닝된 상기 레지스트막이 설치된 상기 도전 기판의 표면을 전해 도금함으로써 비어 칼럼과 도전성 구조 부재를 형성하는 단계와,상기 레지스트막을 제거하는 단계와,상기 비어 칼럼과 도전성 구조 부재의 사이에 절연 수지를 충전하고, 상기 비어 칼럼과 도전성 구조 부재를 덮은 상기 절연 수지를 제거하여, 상기 도전성 구조 부재, 비어 칼럼 및 도전성 구조부재와 비어 칼럼을 절연하는 절연 구조 부재로 이루어지고, 상기 절연 구조 부재 표면에 상기 도전성 구조 부재 및 비어 칼럼의 상면이 노출한 코어 기판을 형성하는 단계와,상기 코어 기판상에 배선 패턴을 복수 형성하는 단계와,상기 도전 기판을 제거하는 단계를 포함하는 것을 특징으로 하는 다층 배선판을 제조하는 방법.
- 제8항에 있어서,상기 비어 칼럼과 도전성 구조 부재는 구리로 형성된 것을 특징으로 하는 다층 배선판을 제조하는 방법.
- 제8항에 있어서,상기 도전 기판은 알루미늄 시트로 된 것을 특징으로 하는 다층 배선판을 제조하는 방법.
- 제8항에 있어서,상기 도전 기판은 도전층과 상기 도전층 하부의 전기적 절연재의 기판을 포함하는 것을 특징으로 하는 다층 배선판을 제조하는 방법.
- 제8항에 있어서,상기 배선 패턴 부재중 적어도 하나는 상기 코어 기판의 상기 도전성 구조 부재에 접속되는 것을 특징으로 하는 다층 배선판을 제조하는 방법.
- 제8항에 있어서,상기 도전 기판의 제거 후에, 복수의 배선 패턴 층이 상기 도전 기판이 제거된 상기 코어 기판의 표면에 형성되는 것을 특징으로 하는 다층 배선판을 제조하는 방법.
- 코어 기판과 상기 코어 기판의 양면에 형성된 배선 패턴 부재를 갖고, 상기 코어 기판은 상기 코어 기판을 관통하는 도전성 부재를 갖고, 상기 코어 기판의 양면의 상기 배선 패턴 부재는 상기 코어 기판을 관통하는 상기 도전성 부재를 통해 서로 접속되는 다층 배선판으로서, 상기 코어 기판은 도금으로 형성된 비어 칼럼과, 도전성 구조 부재, 및 개개의 상기 비어 칼럼과 상기 도전성 구조 부재를 전기적으로 서로 절연시키는 절연 구조 부재를 갖고, 상기 비어 칼럼은 상기 코어 기판을 관통하여 상기 코어 기판의 양면의 상기 배선 패턴 부재를 서로 접속하는 도전성 부재로서 기능하는 다층 배선판을 제조하는 방법에 있어서,도전 기판의 표면에 제1조의 배선 패턴 층을 형성하는 단계와,배선 패턴의 상부층에 코어 기판을 형성하는 단계와,상기 코어 기판의 표면에 제2조의 배선 패턴 층을 형성하는 단계와,상기 도전 기판을 제거하는 단계를 포함하는 것을 특징으로 하는 다층 배선판을 제조하는 방법.
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JP99-107757 | 1999-04-15 | ||
JP10775799A JP3592129B2 (ja) | 1999-04-15 | 1999-04-15 | 多層配線基板の製造方法 |
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KR100720049B1 true KR100720049B1 (ko) | 2007-05-18 |
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JP (1) | JP3592129B2 (ko) |
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US6841862B2 (en) * | 2000-06-30 | 2005-01-11 | Nec Corporation | Semiconductor package board using a metal base |
US6665193B1 (en) * | 2002-07-09 | 2003-12-16 | Amerasia International Technology, Inc. | Electronic circuit construction, as for a wireless RF tag |
JP4488684B2 (ja) | 2002-08-09 | 2010-06-23 | イビデン株式会社 | 多層プリント配線板 |
JP2004186307A (ja) | 2002-12-02 | 2004-07-02 | Tdk Corp | 電子部品の製造方法および、電子部品 |
CN100417313C (zh) * | 2004-06-29 | 2008-09-03 | 台湾吉德门国际股份有限公司 | 提升电路板制程良率的方法 |
JP4670495B2 (ja) * | 2004-09-06 | 2011-04-13 | Tdk株式会社 | 電子デバイス及びその製造方法 |
WO2007013595A1 (ja) * | 2005-07-29 | 2007-02-01 | Fujikura Ltd. | 屈曲式リジットプリント配線板およびその製造方法 |
KR100757907B1 (ko) * | 2006-07-06 | 2007-09-11 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
JP2008108791A (ja) * | 2006-10-23 | 2008-05-08 | Fujifilm Corp | 多層プリント配線基板及び多層プリント配線基板の作製方法 |
JP2008140886A (ja) * | 2006-11-30 | 2008-06-19 | Shinko Electric Ind Co Ltd | 配線基板及びその製造方法 |
MY171427A (en) * | 2012-03-26 | 2019-10-12 | Advanpack Solutions Pte Ltd | Multi-layer substrate for semiconductor packaging |
JP6945513B2 (ja) * | 2018-09-20 | 2021-10-06 | 日立Astemo株式会社 | 電子制御装置 |
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JPH08167629A (ja) * | 1994-12-14 | 1996-06-25 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
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US4522667A (en) * | 1980-06-25 | 1985-06-11 | General Electric Company | Method for making multi-layer metal core circuit board laminate with a controlled thermal coefficient of expansion |
CA2059020C (en) * | 1991-01-09 | 1998-08-18 | Kohji Kimbara | Polyimide multilayer wiring board and method of producing same |
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US5282312A (en) * | 1991-12-31 | 1994-02-01 | Tessera, Inc. | Multi-layer circuit construction methods with customization features |
DE59309575D1 (de) * | 1992-06-15 | 1999-06-17 | Heinze Dyconex Patente | Verfahren zur herstellung von leiterplatten unter verwendung eines halbzeuges mit extrem dichter verdrahtung für die signalführung |
US5432999A (en) * | 1992-08-20 | 1995-07-18 | Capps; David F. | Integrated circuit lamination process |
WO1997048260A1 (fr) * | 1996-06-14 | 1997-12-18 | Ibiden Co., Ltd. | Plaquette a circuit sur un seul cote pour carte a circuits imprimes multicouche, carte a circuits imprimes multicouche, et procede pour sa production |
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JPH06177278A (ja) * | 1992-12-08 | 1994-06-24 | Toppan Printing Co Ltd | 半導体装置の製造方法 |
JPH08167629A (ja) * | 1994-12-14 | 1996-06-25 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
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JP2000299404A (ja) | 2000-10-24 |
KR20000071696A (ko) | 2000-11-25 |
US6629366B1 (en) | 2003-10-07 |
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