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JPS6137538U - microprogram controller - Google Patents

microprogram controller

Info

Publication number
JPS6137538U
JPS6137538U JP11896884U JP11896884U JPS6137538U JP S6137538 U JPS6137538 U JP S6137538U JP 11896884 U JP11896884 U JP 11896884U JP 11896884 U JP11896884 U JP 11896884U JP S6137538 U JPS6137538 U JP S6137538U
Authority
JP
Japan
Prior art keywords
microprogram
error
control device
microprogram controller
check
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11896884U
Other languages
Japanese (ja)
Inventor
健也 岡崎
信一 宮島
泰吉 上等
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP11896884U priority Critical patent/JPS6137538U/en
Publication of JPS6137538U publication Critical patent/JPS6137538U/en
Pending legal-status Critical Current

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  • Detection And Correction Of Errors (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】 第1図は、従来のマイクロプログラム制御装置第2図 を説明するための図、第2因は、この考案によるマイク
ロプログラム制御装置を説明するための図である。 図中、1はマイクロプログラムシーケンサ、2はマイク
ロプログラムメモリ、3はマイクロプログラムレジスタ
、4はチェック回路、5は電子機器、6はマイクロプロ
グラムエラー表示回路、7はエラーステイタスレジスタ
である。 なお、図中同一あるいは相当部分には同一符号を付して
示してある。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram for explaining a conventional microprogram control device in FIG. 2, and the second reason is a diagram for explaining a microprogram control device according to this invention. In the figure, 1 is a microprogram sequencer, 2 is a microprogram memory, 3 is a microprogram register, 4 is a check circuit, 5 is an electronic device, 6 is a microprogram error display circuit, and 7 is an error status register. It should be noted that the same or corresponding parts in the figures are indicated by the same reference numerals.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マイクロプログラム制御装置において、マイクロプログ
ラムとそのチェックビットを格納したマイクロプログラ
ムメモリから読み出されるマイクロ命令にエラーが無い
事を上記チェックビットにより検査する回路と、エラー
処理用マイクロプログラムシーケンサと、エラー処理用
マイクロプログラムメモリと、エラー処理用.マイクロ
プログラムレジスタと、エラーステイタスレジスタとを
有する事を特徴とするマイクロプログラム制御装置。
A microprogram control device includes a circuit that uses the check bits to check that there are no errors in microinstructions read from a microprogram memory that stores a microprogram and its check bits, a microprogram sequencer for error processing, and a microprogram for error processing. For program memory and error handling. A microprogram control device characterized by having a microprogram register and an error status register.
JP11896884U 1984-08-01 1984-08-01 microprogram controller Pending JPS6137538U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11896884U JPS6137538U (en) 1984-08-01 1984-08-01 microprogram controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11896884U JPS6137538U (en) 1984-08-01 1984-08-01 microprogram controller

Publications (1)

Publication Number Publication Date
JPS6137538U true JPS6137538U (en) 1986-03-08

Family

ID=30677845

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11896884U Pending JPS6137538U (en) 1984-08-01 1984-08-01 microprogram controller

Country Status (1)

Country Link
JP (1) JPS6137538U (en)

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