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JPS586178A - Semiconductor memory unit - Google Patents

Semiconductor memory unit

Info

Publication number
JPS586178A
JPS586178A JP56104301A JP10430181A JPS586178A JP S586178 A JPS586178 A JP S586178A JP 56104301 A JP56104301 A JP 56104301A JP 10430181 A JP10430181 A JP 10430181A JP S586178 A JPS586178 A JP S586178A
Authority
JP
Japan
Prior art keywords
resistance value
films
current
semiconductor memory
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56104301A
Other languages
Japanese (ja)
Other versions
JPH0247867B2 (en
Inventor
Toshiaki Ogata
尾形　俊昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP56104301A priority Critical patent/JPS586178A/en
Publication of JPS586178A publication Critical patent/JPS586178A/en
Publication of JPH0247867B2 publication Critical patent/JPH0247867B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To enable to operate as a non volatile RAM, and moreover to contrive to reduce the consuming current of a semiconductor memory unit by a method wherein ferroelectric substance films are formed on polycrystalline Si films to be used as load resistors interposing insulators between them. CONSTITUTION:Besides connection is performed as in the past between transistors 7, 8, 9, 10 and load resistors 11, 12, the ferroelectric substance films 13, 14 are formed on the load resistors 11, 12 interposing the insulating films between them, and polarities of the ferroelectric substances are inverted respectively by reverse electric potential of electrodes 15, 16. Accordingly the resistance value on one side of the polycrystalline Si resistors 11, 12 is increased to cut off almost the current, and the resistance value on another side is reduced. At structure mentioned above, because polarity of the ferroelectric substance has non volatility, operation as the non volatile RAM is enabled, and when the FET7 is made to ON, because the resistance value of the load resistor 11 is increased, the consuming current is reduced.

Description

【発明の詳細な説明】 本ｌｉ明は不揮俺性半導体記憶装曾Ｋｌｌす石。[Detailed description of the invention] This light is a non-volatile semiconductor memory device.

本発明の目的は強誘電体によって多結晶シリコン負荷抵
抗の抵抗値Ｋｌｌ”化させ為事を可能にし、不褌員性Ｏ
ＦＩＡＭを作る事にある。The purpose of the present invention is to make it possible to increase the resistance value of a polycrystalline silicon load resistor by using a ferroelectric material, thereby making it possible to
The purpose is to create FIAM.

以下１１１によりて説明する。This will be explained below using 111.

館ＩＩＩは従来のＲＡＭのセルを示すＩｌ’ｆ％ある。Panel III indicates cells of a conventional RAM.

ＩＩ（）　１　、　２　、　　Ｓ　、　　４　ｆｄ　Ｍ
　ｆ　−？　７ネＡｉ（０１！）ランジヌーでああ、閣
の５．６は多結晶シリーンで形成１れた負荷抵抗を示す
、鎮１図に示すＲＡＭのセルは不揮発性が無く、會た例
えばトランジスタ１がＯＮＬ、２がＯＦＦ　Ｌｔ場鳩舎
荷抵抗５とトランジスタ１を通して電流が渡れ、逆の場
合も同様に常時電流が流れる為に消費電流が大きくなる
次点を有する。II() 1, 2, S, 4 fd M
f-? 7 Ne Ai (01!) Ranjinu Ah, Cabinet 5.6 shows the load resistance formed by polycrystalline silicon.The RAM cell shown in Figure 1 is non-volatile, When ONL, 2 is OFF, current can pass through the resistor 5 and transistor 1, and in the reverse case, the current always flows, resulting in a large current consumption.

本発明は上記の欠点を除去した亀のでああ、第２図に示
す様にトランジスタ７，８，９．１０と負荷抵抗１１，
１２の結−〇方法は従来のものと皆化ないが、負荷抵抗
１１．１２上に絶縁膜を介して強誘電体＄１３１４が形
成され電１ｉ１５　１６のそれぞれ逆の電位によって１
１＃電体ｔＪＩＩ性が反転する。従って多結晶シリラン
負荷抵抗１１，１２０抵抗値は、一方が増大し電流がほ
とんど線断され。The present invention eliminates the above-mentioned drawbacks, so as shown in FIG.
Although the method of connection 12 is not the same as the conventional method, a ferroelectric material $1314 is formed on the load resistor 11 and 12 through an insulating film, and the electrical potentials 1i, 15 and 16 are reversed to 1.
1# The electric body tJII property is reversed. Therefore, one of the resistance values of the polycrystalline silylan load resistors 11 and 120 increases, and the current is almost cut off.

他方は抵抗値が下がる。上記の構造Ｋかいて強誘電体の
響性は不揮純性を有するので不揮発性負ム讐としての動
作が可能であり、會たトランジスタ７がＯ）ｉした鳩舎
負荷抵抗１１の抵抗値は増大しているので消費電流が少
なくなる。On the other hand, the resistance value decreases. According to the above structure K, the ferroelectric material has non-volatile purity, so it can operate as a non-volatile negative resistor, and the resistance value of the pigeonhole load resistor 11 where the transistor 7 is Since the current consumption is increased, the current consumption decreases.

以上述べた様に本発明Ｏ亭導体記憶装置は不揮発性ＲＡ
Ｍとして使用で會★・た消費電流を小さ（で！？ゐ。As mentioned above, the O-tei conductor storage device of the present invention has a non-volatile RA.
When used as M, the current consumption is reduced.

ｔＳ画の簡単なＩｔ＠ 第１ｍは従来ＯＲＡ菫のセルを示す■でああ。Simple It@ of tS drawing The 1st m shows the conventional ORA violet cell.

館２図は本発明のＲＡＭの令鳥を示す図である。Figure 2 is a diagram showing a young version of the RAM of the present invention.

１、２．　Ｓ、　４．７．８．９．１０・・菖チャンネ
ルＭＯ！ｌ　）ランジヌー ５、４．１１．１２・・疹結晶シリコン負荷抵抗１３．
１４・・強誘電体膜 １５．１４・・電極 以　　上 出履人　株式会社　諏訪精工金 代理人　弁曹士　最上　務1, 2. S, 4.7.8.9.10...Iris Channel MO! l) Langinu 5, 4.11.12...Crystalline silicon load resistance 13.
14. Ferroelectric film 15. 14. Electrode and above Author: Suwa Seikokin Co., Ltd. Attorney Tsutomu Mogami

Claims (1)

【特許請求の範囲】[Claims] 負荷抵抗となる多結晶シリコン膜上に絶縁物を介して強
誘電体膜が形成されている事を４１轍とする亭導体記憶
Ｉ１１舒。The conductor memory I11 is based on the fact that a ferroelectric film is formed on a polycrystalline silicon film, which serves as a load resistance, with an insulator interposed therebetween.
JP56104301A 1981-07-02 1981-07-02 Semiconductor memory unit Granted JPS586178A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56104301A JPS586178A (en) 1981-07-02 1981-07-02 Semiconductor memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56104301A JPS586178A (en) 1981-07-02 1981-07-02 Semiconductor memory unit

Publications (2)

Publication Number Publication Date
JPS586178A true JPS586178A (en) 1983-01-13
JPH0247867B2 JPH0247867B2 (en) 1990-10-23

Family

ID=14377095

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56104301A Granted JPS586178A (en) 1981-07-02 1981-07-02 Semiconductor memory unit

Country Status (1)

Country Link
JP (1) JPS586178A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0227762A (en) * 1988-07-15 1990-01-30 Toshiba Corp Semiconductor memory
JPH06262602A (en) * 1993-03-10 1994-09-20 Amitec Corp Blade edge adjusting device for plane stage of woodworking super finishing plane
KR19980027519A (en) * 1996-10-16 1998-07-15 김광호 Ferroelectric Random Accessor Memory with Thermal Charge Discharge Circuit
JP2003059259A (en) * 2001-08-13 2003-02-28 Texas Instr Japan Ltd Ferroelectric memory
WO2003085741A1 (en) * 2002-04-10 2003-10-16 Matsushita Electric Industrial Co., Ltd. Non-volatile flip-flop

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0227762A (en) * 1988-07-15 1990-01-30 Toshiba Corp Semiconductor memory
JPH06262602A (en) * 1993-03-10 1994-09-20 Amitec Corp Blade edge adjusting device for plane stage of woodworking super finishing plane
KR19980027519A (en) * 1996-10-16 1998-07-15 김광호 Ferroelectric Random Accessor Memory with Thermal Charge Discharge Circuit
JP2003059259A (en) * 2001-08-13 2003-02-28 Texas Instr Japan Ltd Ferroelectric memory
WO2003085741A1 (en) * 2002-04-10 2003-10-16 Matsushita Electric Industrial Co., Ltd. Non-volatile flip-flop
US7206217B2 (en) 2002-04-10 2007-04-17 Matsushita Electric Industrial Co., Ltd. Non-volatile flip flop

Also Published As

Publication number Publication date
JPH0247867B2 (en) 1990-10-23

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