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JPS56104435A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56104435A
JPS56104435A JP736680A JP736680A JPS56104435A JP S56104435 A JPS56104435 A JP S56104435A JP 736680 A JP736680 A JP 736680A JP 736680 A JP736680 A JP 736680A JP S56104435 A JPS56104435 A JP S56104435A
Authority
JP
Japan
Prior art keywords
semiconductor device
polycrystalline film
substrate
heat treatment
high temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP736680A
Other languages
Japanese (ja)
Inventor
Masamitsu Yamauchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP736680A priority Critical patent/JPS56104435A/en
Publication of JPS56104435A publication Critical patent/JPS56104435A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To obtain a semiconductor device having stable characteristics by forming oxide films on both the front and the back surfaces of N<->N<+> type substrate, forming a base region and an emitter region on the back surface after preforming a polycrystalline film thereon and removing the polycrystalline film after high temperature heat treatment such as diffusion or the like is finished. CONSTITUTION:The oxide films 3, 4 are formed on the front and the back surfaces of the substrate 2, and then the polycrystalline film 19 is preformed on the back surface thereof. Subsequently, a photoresist film is formed thereon, the base region 7 and the emitter region 9 are formed thereon, and after the high temperature heat treatment such as the impurity diffusion of the substrate 2 is completed, the polycrystalline film 19 is removed therefrom. Thus, the semiconductor device having stable characteristics can be obtained with preferable workability.
JP736680A 1980-01-23 1980-01-23 Manufacture of semiconductor device Pending JPS56104435A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP736680A JPS56104435A (en) 1980-01-23 1980-01-23 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP736680A JPS56104435A (en) 1980-01-23 1980-01-23 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56104435A true JPS56104435A (en) 1981-08-20

Family

ID=11663963

Family Applications (1)

Application Number Title Priority Date Filing Date
JP736680A Pending JPS56104435A (en) 1980-01-23 1980-01-23 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56104435A (en)

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