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JPS57194566A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS57194566A
JPS57194566A JP56079203A JP7920381A JPS57194566A JP S57194566 A JPS57194566 A JP S57194566A JP 56079203 A JP56079203 A JP 56079203A JP 7920381 A JP7920381 A JP 7920381A JP S57194566 A JPS57194566 A JP S57194566A
Authority
JP
Japan
Prior art keywords
film
oxide film
intermediary
substrate
base region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56079203A
Other languages
Japanese (ja)
Inventor
Akihisa Uchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56079203A priority Critical patent/JPS57194566A/en
Publication of JPS57194566A publication Critical patent/JPS57194566A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/10—ROM devices comprising bipolar components

Landscapes

  • Bipolar Transistors (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To reduce the fluctuation of the transistor characteristics during the walled wash process by a method wherein the base region is formed on the substrate through the intermediary of the second oxide film which is opened so that the emitter region may be diffused through the intermediary of the oxide film. CONSTITUTION:The thick oxide film 2 is formed on the thin oxide film 3 on the substrate 1 and the multicrystal Si film 9 is further formed on the said film 3. Next boron is inplanted in the substrate through the intermediary of said films 9 and 3 to form the P type base region 4. After forming the PSG film 5 on the overall surface, said film 5 on the base region 4 is removed to etch the multicrystal Si film 9 utilizing said film 5 as a mask. Arsenic is inplanted in said region 4 through the intermediary of the thin oxide film 3 to form the N<+> type emitter 6. Through these procedures, the fluctuation of the transistor characteristics during the walled process may be reduced.
JP56079203A 1981-05-27 1981-05-27 Semiconductor device and manufacture thereof Pending JPS57194566A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56079203A JPS57194566A (en) 1981-05-27 1981-05-27 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56079203A JPS57194566A (en) 1981-05-27 1981-05-27 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS57194566A true JPS57194566A (en) 1982-11-30

Family

ID=13683388

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56079203A Pending JPS57194566A (en) 1981-05-27 1981-05-27 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS57194566A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58161363A (en) * 1982-01-04 1983-09-24 フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン Lateral p-n-p cell ram and standard ram and prom oxide isolating process
JPS58186962A (en) * 1982-04-12 1983-11-01 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Programmable read-only memory and method of producing same
JPS58186963A (en) * 1982-04-12 1983-11-01 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Programmable read-only memory and method of producing same
JPS59191372A (en) * 1983-04-14 1984-10-30 Nec Corp Semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58161363A (en) * 1982-01-04 1983-09-24 フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン Lateral p-n-p cell ram and standard ram and prom oxide isolating process
JPS58186962A (en) * 1982-04-12 1983-11-01 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Programmable read-only memory and method of producing same
JPS58186963A (en) * 1982-04-12 1983-11-01 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Programmable read-only memory and method of producing same
JPH0518262B2 (en) * 1982-04-12 1993-03-11 Fuiritsupusu Furuuiranpenfuaburiken Nv
JPS59191372A (en) * 1983-04-14 1984-10-30 Nec Corp Semiconductor device
JPH0425705B2 (en) * 1983-04-14 1992-05-01 Nippon Electric Co

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