JPH0766277A - Element isolating method and semiconductor device - Google Patents

Abstract

PURPOSE:To provide an element isolating method wherein an element isolating region can be lessened in size. CONSTITUTION:A patterned silicon nitride film 9 is formed on the upside of a silicon substrate 1 on which a silicon oxide film 3 is formed. A silicon oxide film is deposited thereon, and an element isolating side wall 3 is provided to the side of the nitride film 9 by anisotropic etching. A silicon nitride film 16 is formed on the exposed surface of the oxide film 3 leaving the exposed surface of the side wall 13 unremoved, and then only the side wall 13 is removed. By this setup, the nitride films 9 and 16 which are provided with openings smaller in width than usual and high in oxidation resistance can be formed on the upsides of the substrate 1 and the oxide film 3. Then, a thermal oxidation process is executed, whereby an element isolating region corresponding to the width of an opening can be formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an element isolation method, and more particularly to reduction of the element isolation region.

[0002]

2. Description of the Related Art In the manufacture of a semiconductor device, element isolation is performed in the first step so that each element can be independently controlled when a plurality of elements are formed on a semiconductor substrate. On the surface of the substrate on which the element isolation has been performed, the element formation planned region is surrounded by the element isolation region. The LOCOS (Local Oxidation of Silicon) method is widely known as the element isolation region forming method. An element isolation method using the LOCOS method will be described below.

FIGS. 4A to 4C and FIG. 5 are sectional views of a semiconductor substrate for showing the process of element isolation. As shown in FIG. 4A, the prepared P-type silicon wafer 1 is
Approximately 0.1 μm silicon oxide film 23 by thermal oxidation at ~ 1000 ° C
Is formed, and then a silicon nitride film (Si ₃
N ₄ ) 25 is formed to a thickness of about 0.1 μm.

Next, as shown in FIG. 4B, a resist pattern 27 is formed on the upper surface of the silicon nitride film 25. The resist pattern 27 is for determining the position of the element formation planned region. The silicon nitride film 25 is etched using the formed resist pattern 27 as a mask. Further, using the resist pattern 27 as a mask, boron (B
+) Is typed. The reason for implanting boron is to ensure element isolation by an element isolation region formed in the following steps. Here, in order to form the resist pattern 27, a technique called lithography using a photographic technique is used, and a pattern forming method using lithography will be described below with reference to FIG.

As shown in FIG. 6A, a photosensitive material 37 called a photoresist is applied over the entire surface of the material 35 to be processed formed on the upper surface of the substrate. Next, as shown in FIG. 6B, the material 35 is formed on the upper surface of the photoresist 37.
After overlapping the glass mask 41 on which the light-shielding pattern 39 in which the portion to be removed is drawn is drawn, ultraviolet rays are applied to perform baking. As a result, the material 35 is formed with the exposed portion 43 and the non-exposed portion 45.

When the wafer thus exposed is applied to the developing solution, only the resist of the exposed portion 43 is dissolved as shown in FIG. 6C, and only the surface of the portion of the material 35 to be removed is left while leaving the unexposed portion 45. Will be exposed.

Returning to FIG. 4, the resist pattern 27 is changed to O ₂
After removing it by plasma treatment,
A portion of the upper surface of the substrate where the silicon oxide film 23 is exposed by oxidizing in a water vapor (H ₂ 0) atmosphere of 00 ° C. for about 6 to 7 grows into a silicon oxide film 29 having a thickness of about 1 μm. The silicon nitride film 25 is formed of H ₂
Of the silicon nitride film 25, the silicon oxide film 23 in the portion covered by the silicon nitride film 25 hardly grows and becomes the silicon oxide film 21. However, since this oxidative growth proceeds in each direction within the silicon substrate, the silicon oxide film 29 grows so as to penetrate into the substrate portion covered with the silicon nitride film 25. Also, at this time, FIG.
The boron ions implanted in the step B of FIG. 2 are located under the silicon oxide layer 29 and form a P ⁻ -type stop layer 31 (see C in FIG. 4).

Finally, the remaining silicon nitride film 25 and silicon oxide film 21 are sequentially removed (see FIG. 5).

As described above, by forming the element isolation region with the silicon oxide film 29, the upper surface of the substrate can be divided into a plurality of element formation planned regions 33 which can be completely independently controlled.

[0010]

However, the LOC
The conventional element isolation method using the OS method has the following problems.

In response to the demand for integration accompanying the development of the semiconductor industry, integration of various element forming regions in semiconductor devices has been attempted. Under this circumstance, the area ratio of the element formation region and the element isolation region on the upper surface of the substrate of the semiconductor device has become about 1: 1 along with the reduction of the element formation region. Therefore, in considering further integration of the semiconductor device, it has become important to consider not only the reduction of the element formation region but also the reduction of the element isolation region.

However, in the conventional element isolation using the LOCOS method, there is a limit to the reduction of the element isolation region for the following reason.

The width of the element isolation region formed on the upper surface of the substrate is determined by the width d of the resist pattern 27 (see B in FIG. 4). However, there is a limit to reducing the width d due to the problem of accuracy, and it has been impossible to reduce the width d to 0.5 μm or less.

An object of the present invention is to solve the above problems and to provide an element isolation method capable of reducing the element isolation region.

[0015]

According to a first aspect of the present invention, there is provided an element isolation method for isolating a semiconductor substrate into a plurality of element formation planned regions, wherein an upper surface of the semiconductor substrate has oxidation resistance. A first film forming step of forming a first film formed by selectively removing the film after depositing the film, and an upper surface of the formed first film and an upper surface of the substrate. An insulating film forming step of depositing an insulating film on the exposed surface, and a sidewall forming step of removing the insulating film while leaving the insulating film located on the side surface portion of the formed first film as a side wall for element isolation, A second film forming step of depositing a second film having oxidation resistance while exposing a part of the element isolation side wall on the substrate upper surface exposed by the side wall forming step; and a first film forming step First film formation and second film formation forming steps formed by The side wall for element isolation is removed, leaving the second film formed by the above process, and a side wall removing step of exposing the upper surface of the substrate, and an oxide layer is formed by oxidizing the upper surface of the substrate exposed by the side wall removing step. And an oxide layer forming step of separating into a plurality of element formation planned regions.

An element isolation method according to a second aspect is an element isolation method for isolating a semiconductor substrate into a plurality of element formation planned regions, and an oxide film forming step of forming an oxide film on an upper surface of the semiconductor substrate; A first film forming step of forming a first film formed by depositing a film having oxidation resistance on the upper surface of the oxide film and then selectively removing the film; and An insulating film forming step of depositing an insulating film on the upper surface of the first film and the exposed surface of the oxide film, and leaving the insulating film located on the side surface portion of the formed first film as a side wall for element isolation. A sidewall forming step of removing the insulating film;
A second film forming step of depositing a second film having oxidation resistance on the upper surface of the oxide film exposed by the sidewall forming step while exposing a part of the element isolation side wall, and a first film forming step A side wall removal step of removing the element isolation side wall leaving the first film formed by the step and the second film formed by the second film formation step, and exposing the upper surface of the substrate; And an oxide layer forming step of forming an oxide layer by oxidizing the upper surface of the substrate exposed by the above, and separating the oxide layer into a plurality of element formation planned regions.

According to a third aspect of the present invention, in the element isolation method, the film having the oxidation resistance that is non-selective to the etching solution having a selectivity for the insulating film is used, and the removal in the sidewall forming step is performed. Anisotropic etching is used as a method, and as a method of forming the oxidation resistant film formed in the second film formation step, an oxidation resistant film is once deposited on the entire surface of the substrate and then etched to form a sidewall for element isolation. Part of it is exposed, and etching using a selective etching solution for the insulating film is used as a removing method in the sidewall removing step. The semiconductor device according to claim 4 forms a first film formed by depositing a film having oxidation resistance on the upper surface of a semiconductor substrate and then selectively removing the film, The insulating film is deposited on the upper surface of the formed first film and the exposed surface of the upper surface of the substrate, and the insulating film located on the side surface of the formed first film is left as a sidewall for element isolation. And removing a part of the element isolation side wall on the exposed upper surface of the substrate to deposit a second film having oxidation resistance, and leaving the first film and the second film to remain. It is characterized in that the side wall for isolation is removed to expose the upper surface of the substrate, and the exposed upper surface of the substrate is oxidized to form an oxide layer and separate into a plurality of device formation regions.

[0018]

In the element isolation method and the semiconductor device according to claims 1 and 4, after forming the first film having oxidation resistance, the insulating film forming step forms the upper surface of the first film and the semiconductor film. An insulating film is once deposited on the exposed surface of the upper surface of the substrate, the insulating film is selectively removed by the next sidewall forming step, and the insulating film in the side surface portion of the first film formation is used as a sidewall for element isolation. I try to leave. The width of the element isolation side wall can be adjusted by the film thickness of the deposited insulating film.

Next, a second film is formed on the upper surface of the substrate exposed in the sidewall forming step while exposing a part of the element isolation sidewall, and then the element isolation sidewall is removed. Thus, an opening having the same width as the element isolation side wall can be formed on the upper surface of the substrate, and the upper surface of the substrate other than the opening can be covered with the first film and the second film having oxidation resistance.

Next, by oxidizing in the oxide layer forming step, an element isolation region corresponding to the width of the opening can be formed on the upper surface of the substrate.

In the element isolation method according to the second aspect, the oxide film formed in the oxide film forming step protects the substrate region during the element isolation step.

After forming the first film having oxidation resistance, an insulating film is once deposited on the upper surface of the first film and the exposed surface of the oxide film by the insulating film forming step, The insulating film is selectively removed by the sidewall forming step, and the insulating film in the portion located on the side surface portion of the first film formation is left as a sidewall for element isolation. The width of the element isolation side wall can be adjusted by the film thickness of the deposited insulating film.

Next, a second film is formed on the oxide film exposed by the sidewall forming step while exposing a part of the element isolation sidewall, and then the element isolation sidewall is removed. Thus, an opening having the same width as the element isolation side wall can be formed on the upper surface of the substrate, and the upper surface of the substrate other than the opening can be covered with the first film and the second film having oxidation resistance.

Next, by oxidizing in the oxide layer forming step, an element isolation region corresponding to the width of the opening can be formed on the upper surface of the substrate.

In the element isolation method according to the third aspect, the sidewall forming step and the sidewall removal are performed by using a film having oxidation resistance that is non-selective to the etching solution having selectivity for the insulating film. The manufacturing process can be facilitated by using etching, which is a general method for removing the process.

Further, the manufacturing process can be facilitated by using etching which is a general method for exposing a part of the element isolation side wall in the second film forming step.

Further, by using anisotropic etching as a removing method in the sidewall forming step, the insulating film can be removed uniformly in the vertical direction. Therefore, the width of the element isolation side wall can be adjusted by the thickness of the formed insulating film.

[0028]

EXAMPLE An example of element isolation using the element isolation method according to the present invention will be described. 1A to 1C, FIG. 2A to C, and FIG. 3A to C are schematic sectional configuration diagrams for showing the manufacturing process of the above-described embodiment.

As shown in FIG. 1A, a silicon wafer 1 prepared as a semiconductor substrate is thermally oxidized at 900 to 1000 ° C. to form a silicon oxide film 3 which is an oxide film of about 0.1 μm. Next, as shown in FIG. 1B, a low pressure silicon nitride (SiN) film, which is a film having oxidation resistance, is formed on the entire upper surface of the silicon oxide film 3 by a low pressure CVD (LP-CVD) method.
After being deposited to a thickness of 0.1 nm, the silicon nitride film is etched by using the resist pattern 7 as a mask to form a low pressure silicon nitride film 9 to be the first film. next,
After removing the resist 7 as shown in C of FIG.
A silicon oxide film 11, which is an insulating film, is deposited by the method to a thickness of about 300 nm. Next, as shown in FIG. 2A, the silicon oxide film 11 is etched back by reactive ion etching (RIE) which is anisotropic, and the width r of the side surface of the silicon nitride film 9 is about 0.1 μm. Side wall for element isolation 1
3 is formed. The width r of the element isolation side wall 13 is determined by the film thickness of the silicon oxide film 11, and is proportional to the film thickness. Further, the film thickness of the silicon oxide film 11 can be controlled accurately. Therefore, the width r of the element isolation side wall 13 can be accurately controlled.

Next, as shown in FIG. 2B, low pressure CVD is performed.
A silicon nitride (SiN) film 15, which is a film having oxidation resistance, is deposited to a thickness of 250 nm by (LP-CVD) method.
Next, as shown in FIG. 2C, etching is performed using phosphoric acid at a high temperature (about 150 ° C.) to form the element isolation sidewall 1
The top 14 of 3 is exposed. In this manner, the silicon oxide film 15 is once deposited on the entire surface of the substrate and then etched to expose a part of the element isolation side wall 13 while exposing the exposed surface of the silicon oxide film 3 to a second film of silicon nitride. The film 16 can be formed.

Next, as shown in FIG. 3A, the element isolation side wall 13 which is a silicon oxide film is removed by etching using an HF solution. Thus, as can be seen from FIG. 3A, it is possible to form the silicon nitride films 9 and 16 having the opening 5 having a smaller width than the conventional one on the upper surface of the substrate having the oxide film on the surface. After this, B (boron) as a stopper may be implanted / diffused so that element isolation is not insufficient.

Next, as shown in FIG. 3B, thermal oxidation (950
Then, a silicon oxide layer 17 is grown as an element isolation region at 100 ° C. for 100 minutes. Since the silicon nitride films 9 and 16 have oxidation resistance, an element isolation region is formed in the opening 5.

Finally, as shown in C of FIG. 3, CDE (Ch
Silicon nitride films 9 and 16 by the emical dry etching method
And the silicon oxide film 3 is removed.

The width W of the element isolation region thus formed is determined by the width r of the element isolation side wall 13.
The width r can be accurately controlled by the film thickness of the silicon oxide film 11. Therefore, it is possible to reduce the element isolation region.

In the above embodiment, the silicon oxide film 3 is first provided. Accordingly, the silicon substrate region can be protected during the element isolation process.

In the above embodiment, the silicon nitride (SiN) film is used as the film having the oxidation resistance,
Any other film may be used as long as it is a film having oxidation resistance.

Further, in the above embodiment, the silicon oxide film is used as the insulating film, but other film may be used as long as it is a film having oxidation resistance and capable of being selectively etched.

In the above embodiment, the insulating film 11 is formed by using the silicon nitride films 9 and 16 which are non-selective with respect to the selective etching solution, and the side wall 13 for element formation is removed. As the etching, etching with a selective etching solution is used for the insulating film 11. However, another method may be used as long as the element isolation sidewall 13 can be removed while leaving the first film 9 and the second film 16.

[0039]

According to the element isolation method and the semiconductor device of the first and fourth aspects, the element isolation side wall whose width can be easily adjusted is formed on the upper surface of the substrate, and the element isolation side walls other than the element isolation side wall are formed. The upper surface of the substrate can be covered with the first film and the second film having the oxidation resistance. Therefore, by performing oxidation next, an element isolation region having a width corresponding to the width of the opening can be formed on the upper surface of the substrate.

Therefore, it is possible to form the element isolation region which is smaller than the conventional one.

In the element isolation method according to the second aspect, the oxide film formed in the oxide film formation step protects the substrate region during the element isolation step. In addition, the first isolation film and the second film are formed on the upper surface of the oxide film, the sidewalls for element isolation whose width can be easily adjusted, and the upper surface of the oxide film other than the sidewalls for element isolation having oxidation resistance. Can be covered with a membrane. Therefore, by performing oxidation next, an element isolation region having a width corresponding to the width of the opening can be formed on the upper surface of the substrate.

Therefore, it is possible to form the element isolation region which is smaller than the conventional one.

According to a third aspect of the present invention, in the element isolation method, the sidewall forming step and the step of forming the side wall are performed by using the film having the oxidation resistance which is non-selective to the etching solution having a selectivity for the insulating film. Etching, which is a general method, is used as a removing method in the sidewall removing step. Further, also in the second film forming step, etching, which is a general method, is used to expose a part of the element isolation side wall. Therefore, the manufacturing process can be facilitated.

Therefore, it is possible to easily implement the element isolation method which can reduce the element isolation region.

By using anisotropic etching as a removing method in the sidewall forming step, it becomes possible to adjust the width of the element isolation sidewall depending on the film thickness of the formed insulating film.

Therefore, it is possible to easily form the opening having a width smaller than that of the conventional film in the film having the oxidation resistance.

[Brief description of drawings]

FIG. 1 is a manufacturing process diagram illustrating an element isolation method according to an embodiment of the present invention.

FIG. 2 is a manufacturing process diagram for illustrating an element isolation method according to an embodiment of the present invention.

FIG. 3 is a manufacturing process diagram for illustrating an element isolation method according to an embodiment of the present invention.

FIG. 4 is a manufacturing process diagram for illustrating a conventional element isolation method.

FIG. 5 is a manufacturing process diagram for illustrating a conventional element isolation method.

FIG. 6 is a diagram for explaining a lithographic technique.

[Explanation of symbols]

 1 ... P-type silicon wafer 3 ... Silicon oxide film 9 ... Silicon nitride film 11 ... Silicon oxide film 13 ... Element isolation side wall 16 ... Silicon nitride film 17 ... Silicon oxide Film 19: Area for element formation

Claims (4)

[Claims] 1. A device isolation method for separating a semiconductor substrate into a plurality of device formation regions, wherein a film having oxidation resistance is deposited on an upper surface of the semiconductor substrate and then the film is selectively removed. A first film forming step of forming a first film formed by forming, an insulating film forming step of depositing an insulating film on an upper surface of the formed first film and an exposed surface of the substrate upper surface, A side wall forming step of removing the insulating film by leaving the insulating film located on the side surface of the formed first film as a side wall for element isolation; and the element on the substrate upper surface exposed by the side wall forming step. A second film formation step of depositing a second film having oxidation resistance while exposing a part of the separation side wall; a first film formation and a second film formation formed by the first film formation step Element isolation, leaving the second film formed by the process A sidewall removing step of removing the sidewalls to expose the upper surface of the substrate; and an oxide layer forming step of forming an oxide layer by oxidizing the substrate upper surface exposed by the sidewall removing step and separating it into a plurality of device formation planned regions. An element isolation method comprising: 2. An element isolation method for isolating a semiconductor substrate into a plurality of element formation planned regions, which comprises an oxide film forming step of forming an oxide film on the upper surface of the semiconductor substrate, and an oxidation resistance on the upper surface of the oxide film. A first film forming step of forming a first film formed by selectively removing the film after depositing a film having: a top surface of the formed first film; An insulating film forming step of depositing an insulating film on the exposed surface of the oxide film, and a sidewall forming for removing the insulating film while leaving the insulating film located on the side surface portion of the formed first film as a side wall for element isolation. A second film forming step of depositing a second film having oxidation resistance on the upper surface of the oxide film exposed by the sidewall forming step while exposing a part of the element isolation side wall; First film formation and second film formation formed by the film formation process The sidewall for element isolation is removed leaving the second film formed by the forming step, and a sidewall removing step of exposing the upper surface of the substrate, and an oxide layer is formed by oxidizing the upper surface of the substrate exposed by the sidewall removing step. An element isolation method comprising: an oxide layer formation step of forming and isolating into a plurality of element formation planned regions. 3. The element isolation method according to claim 1 or 2, wherein the film having the oxidation resistance that is non-selective to the etching solution having selectivity to the insulating film is used, and Anisotropic etching is used as a removal method in the sidewall forming step, and as the method of forming the oxidation resistant film formed in the second film forming step, etching is performed after once depositing the oxidation resistant film on the entire surface of the substrate. Exposing a part of the element isolation side wall by means of etching, and using etching with an etching solution having selectivity for the insulating film as the removing method in the side wall removing step. 4. A first film formed by depositing a film having oxidation resistance on the upper surface of a semiconductor substrate and then selectively removing the film to form a first film, An insulating film is deposited on the upper surface of the film formation and the exposed surface of the upper surface of the substrate, and the insulating film is removed while leaving the insulating film located on the side surface of the formed first film as a side wall for element isolation, On the exposed upper surface of the substrate, a second film having oxidation resistance is deposited while exposing a part of the element isolation sidewall, and the element isolation sidewall is left with the first film and the second film being left. Is removed, the upper surface of the substrate is exposed, and the exposed upper surface of the substrate is oxidized to form an oxide layer, which is then separated into a plurality of element formation regions.