JP5533914B2 - 多層基板 - Google Patents
多層基板 Download PDFInfo
- Publication number
- JP5533914B2 JP5533914B2 JP2012048300A JP2012048300A JP5533914B2 JP 5533914 B2 JP5533914 B2 JP 5533914B2 JP 2012048300 A JP2012048300 A JP 2012048300A JP 2012048300 A JP2012048300 A JP 2012048300A JP 5533914 B2 JP5533914 B2 JP 5533914B2
- Authority
- JP
- Japan
- Prior art keywords
- conductive pattern
- resin film
- electronic component
- hole
- multilayer substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 229920005989 resin Polymers 0.000 claims description 135
- 239000011347 resin Substances 0.000 claims description 135
- 239000000758 substrate Substances 0.000 claims description 89
- 238000006116 polymerization reaction Methods 0.000 claims description 27
- 229920005992 thermoplastic resin Polymers 0.000 claims description 22
- 238000010030 laminating Methods 0.000 claims description 10
- 238000003825 pressing Methods 0.000 claims description 10
- 239000010410 layer Substances 0.000 description 12
- 230000000052 comparative effect Effects 0.000 description 9
- 238000003475 lamination Methods 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 8
- 239000000463 material Substances 0.000 description 8
- 238000010438 heat treatment Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 238000007731 hot pressing Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 239000004696 Poly ether ether ketone Substances 0.000 description 4
- 239000004697 Polyetherimide Substances 0.000 description 4
- 239000011889 copper foil Substances 0.000 description 4
- 229920002530 polyetherether ketone Polymers 0.000 description 4
- 229920001601 polyetherimide Polymers 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 3
- 239000002923 metal particle Substances 0.000 description 3
- 239000011241 protective layer Substances 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 3
- 230000002411 adverse Effects 0.000 description 2
- 239000011256 inorganic filler Substances 0.000 description 2
- 229910003475 inorganic filler Inorganic materials 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 230000000379 polymerizing effect Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
- H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/061—Lamination of previously made multilayered subassemblies
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
以上、本発明の実施形態について説明したが、本発明はこれに限定されるものではなく、各請求項に記載した範囲を逸脱しない限り、各請求項の記載文言に限定されず、当業者がそれらから容易に置き換えられる範囲にも及び、かつ、当業者が通常有する知識に基づく改良を適宜付加することができる。例えば、以下のように種々変形可能である。
10a 積層体
101 部品搭載部位
101a 重合部位
101b 非重合部位
11 ベースフィルム
111 端子接続用貫通穴
12 第1樹脂フィルム(低流動性樹脂フィルム)
12a 端部樹脂フィルム
13 第2樹脂フィルム(熱可塑性樹脂フィルム)
2 電子部品
2a 電極端子
Claims (3)
- 所定温度に加熱すると軟化する複数の熱可塑性樹脂フィルム(13)、および前記熱可塑性樹脂フィルム(13)よりも前記所定温度における流動性が低く、少なくとも一方の面に導電パターン(121)が形成された複数の低流動性樹脂フィルム(12)を交互に積層した積層体(10a)と、電子部品(2)を搭載するための樹脂製のベースフィルム(11)とを前記積層体(10a)の積層方向に加熱プレスすることで形成される多層基板であって、
前記積層体(10a)は、前記複数の低流動性樹脂フィルム(12)のうち、前記積層方向の一端側に配置された端部樹脂フィルム(12a)が前記ベースフィルム(11)と隣接するように構成され、
前記ベースフィルム(11)には、前記端部樹脂フィルム(12a)に形成された前記導電パターン(121)と前記電子部品(2)に設けられて前記積層方向に突出する電極端子(2a)とを接続するための端子接続用貫通穴(111)が形成されており、
前記積層体(10a)における前記積層方向から見たときに前記電子部品(2)と重合する部品搭載部位(101)は、前記端子接続用貫通穴(111)と重合する重合部位(101a)における前記積層方向に存在する前記導電パターン(121)自体の層数が、前記端子接続用貫通穴(111)と非重合となる非重合部位(101b)における前記積層方向に存在する前記導電パターン(121)自体の層数よりも多くなるように構成されていることを特徴とする多層基板。 - 前記複数の低流動性樹脂フィルム(12)それぞれは、前記積層方向において前記端子接続用貫通穴(111)と重合する重合部位(101a)に前記導電パターン(121)が形成されていることを特徴とする請求項1に記載の多層基板。
- 前記複数の低流動性樹脂フィルム(12)のうち、少なくとも前記端部樹脂フィルム(12a)は、前記部品搭載部位(101)のうち、前記積層方向において前記端子接続用貫通穴(111)と重合する重合部位(101a)にだけ前記導電パターン(121)が形成されていることを特徴とする請求項1または2に記載の多層基板。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012048300A JP5533914B2 (ja) | 2011-08-31 | 2012-03-05 | 多層基板 |
US13/595,060 US8963017B2 (en) | 2011-08-31 | 2012-08-27 | Multilayer board |
CN201210314472.5A CN102970819B (zh) | 2011-08-31 | 2012-08-30 | 多层板 |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011189217 | 2011-08-31 | ||
JP2011189217 | 2011-08-31 | ||
JP2012048300A JP5533914B2 (ja) | 2011-08-31 | 2012-03-05 | 多層基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013065810A JP2013065810A (ja) | 2013-04-11 |
JP5533914B2 true JP5533914B2 (ja) | 2014-06-25 |
Family
ID=47741994
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012048300A Active JP5533914B2 (ja) | 2011-08-31 | 2012-03-05 | 多層基板 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8963017B2 (ja) |
JP (1) | JP5533914B2 (ja) |
CN (1) | CN102970819B (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015090894A (ja) * | 2013-11-05 | 2015-05-11 | イビデン株式会社 | プリント配線板 |
WO2015194373A1 (ja) * | 2014-06-18 | 2015-12-23 | 株式会社村田製作所 | 部品内蔵多層基板 |
WO2016080141A1 (ja) * | 2014-11-17 | 2016-05-26 | 株式会社村田製作所 | 部品内蔵基板および部品内蔵基板の製造方法 |
CN208159008U (zh) * | 2015-08-10 | 2018-11-27 | 株式会社村田制作所 | 树脂多层基板 |
WO2018037628A1 (ja) * | 2016-08-23 | 2018-03-01 | 株式会社村田製作所 | 樹脂多層基板 |
JP6497487B2 (ja) * | 2016-12-02 | 2019-04-10 | 株式会社村田製作所 | 多層配線基板 |
JP7119583B2 (ja) * | 2018-05-29 | 2022-08-17 | Tdk株式会社 | プリント配線板およびその製造方法 |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
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US5102718A (en) * | 1990-07-27 | 1992-04-07 | Minnesota Mining And Manufacturing Company | Multi-chip substrate |
JPH09321390A (ja) * | 1996-05-31 | 1997-12-12 | Olympus Optical Co Ltd | 両面フレキシブル配線板 |
JP3610999B2 (ja) * | 1996-06-07 | 2005-01-19 | 松下電器産業株式会社 | 半導体素子の実装方法 |
US5848466A (en) * | 1996-11-19 | 1998-12-15 | Motorola, Inc. | Method for forming a microelectronic assembly |
US6565954B2 (en) * | 1998-05-14 | 2003-05-20 | Matsushita Electric Industrial Co., Ltd. | Circuit board and method of manufacturing the same |
JP2001223469A (ja) | 1999-11-30 | 2001-08-17 | Hitachi Chem Co Ltd | ビルドアップ配線板及びその製造方法 |
US6370013B1 (en) * | 1999-11-30 | 2002-04-09 | Kyocera Corporation | Electric element incorporating wiring board |
US6459046B1 (en) * | 2000-08-28 | 2002-10-01 | Matsushita Electric Industrial Co., Ltd. | Printed circuit board and method for producing the same |
JP3407737B2 (ja) * | 2000-12-14 | 2003-05-19 | 株式会社デンソー | 多層基板の製造方法およびその製造方法によって形成される多層基板 |
TW200505304A (en) * | 2003-05-20 | 2005-02-01 | Matsushita Electric Ind Co Ltd | Multilayer circuit board and method for manufacturing the same |
JP3933094B2 (ja) * | 2003-05-27 | 2007-06-20 | セイコーエプソン株式会社 | 電子部品の実装方法 |
JP2005072187A (ja) * | 2003-08-22 | 2005-03-17 | Denso Corp | 多層回路基板およびその製造方法 |
JP2005129727A (ja) | 2003-10-23 | 2005-05-19 | Sony Corp | 多層配線基板及びその製造方法 |
EP1538640B1 (en) * | 2003-12-05 | 2016-11-16 | NGK Spark Plug Co., Ltd. | Capacitor and method for manufacturing the same |
JP2005294615A (ja) * | 2004-04-01 | 2005-10-20 | Matsushita Electric Ind Co Ltd | 配線基板 |
JP2006203114A (ja) | 2005-01-24 | 2006-08-03 | Mitsubishi Plastics Ind Ltd | 多層プリント配線基板 |
JP2007129017A (ja) * | 2005-11-02 | 2007-05-24 | Fujikura Ltd | 多層配線基板用基材、多層配線基板及びその製造方法 |
JP2007317806A (ja) * | 2006-05-24 | 2007-12-06 | Fujitsu Ltd | プリント基板ユニット |
JP5168838B2 (ja) * | 2006-07-28 | 2013-03-27 | 大日本印刷株式会社 | 多層プリント配線板及びその製造方法 |
JP2009064909A (ja) * | 2007-09-05 | 2009-03-26 | Alps Electric Co Ltd | 多層セラミック配線板およびその製造方法 |
JP5359940B2 (ja) | 2010-03-10 | 2013-12-04 | 株式会社デンソー | 多層回路基板の製造方法 |
JP2011222553A (ja) | 2010-04-02 | 2011-11-04 | Denso Corp | 半導体チップ内蔵配線基板及びその製造方法 |
JP2011249745A (ja) | 2010-04-28 | 2011-12-08 | Denso Corp | 多層基板 |
-
2012
- 2012-03-05 JP JP2012048300A patent/JP5533914B2/ja active Active
- 2012-08-27 US US13/595,060 patent/US8963017B2/en active Active
- 2012-08-30 CN CN201210314472.5A patent/CN102970819B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
CN102970819A (zh) | 2013-03-13 |
CN102970819B (zh) | 2015-07-08 |
JP2013065810A (ja) | 2013-04-11 |
US20130048345A1 (en) | 2013-02-28 |
US8963017B2 (en) | 2015-02-24 |
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