JP2000039451A - Multilayer printed-circuit board for burn-in board and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer printed-circuit board in which a contact resistance between adjacent wiring layers can be lowered and in which the reliability of the electrical and physical connection of contact holes can be increased. SOLUTION: A board is a multilayer printed-circuit board which constitutes a part of a burn-in board which is used to collectively make the burn-in test of many semiconductor devices formed on a wafer. At this time, the board has a structure in which wiring layers 2 and wiring layers 4 which have a multilayer structure and insulating layers 3 are laminated alternately on a glass board 3 or the like, and it has a structure in which the adjacent wiring layers are connected electrically via respective contact holes 5 formed in the insulating layers 3. The adjacent wiring layers 2, 4 are connected via metal layers (Au layers or the like) whose oxidation resistance is high.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board for a burn-in board, which constitutes a part of a burn-in board used for performing a burn-in test on a large number of semiconductor devices formed on a wafer, and a method of manufacturing the same. Method etc.

[0002]

2. Description of the Related Art Inspection of a large number of semiconductor devices formed on a wafer is roughly classified into a product inspection (electrical characteristic test) using a probe card and a burn-in test which is a reliability test performed thereafter. The burn-in test is one of screening tests performed to remove a semiconductor device having an intrinsic defect or a device which causes a time- and stress-dependent failure from manufacturing variations. The burn-in test can be said to be a thermal acceleration test, while the inspection with a probe card is an electrical characteristic test of the manufactured device.

[0003] The burn-in test is an ordinary method (one chip) in which a wafer is cut into chips by dicing after a electrical characteristic test performed for each chip by a probe card, and the packaged products are subjected to a burn-in test one by one. Burn-in systems are not feasible in terms of cost. Accordingly, a burn-in board (contact board) for performing a burn-in test on a large number of semiconductor devices formed on a wafer at once is being developed and put into practical use (Japanese Patent Application Laid-Open No. Hei 7-231019). The wafer / batch burn-in system using a burn-in board is an important technology for realizing the latest technical flow such as bare chip shipping and mounting, in addition to being highly feasible in terms of cost.

FIG. 7 shows a specific example of a burn-in board.
As shown in FIG. 7, the burn-in board has a structure in which a membrane ring 30 with bumps is fixed on a multilayer wiring board 10 via an anisotropic conductive rubber sheet 20. The membrane ring 30 with a bump serves as a contact portion that directly contacts the device under test. In the membrane ring 30 with bumps, a bump 33 is formed on one surface of a membrane 32 stretched over the ring 31 and a pad 34 is formed on the other surface. In the membrane ring 30 with bumps, pads formed on the periphery or center line of each semiconductor chip on the wafer 40 (approximately 6
The number of bumps 33 obtained by multiplying this number by the number of chips is formed on the membrane 32 corresponding to the number of pins (about 00 to 1000 pins). The multilayer wiring board 10 has a wiring for applying a predetermined burn-in test signal via a pad 34 to each bump 33 isolated on the membrane 32 on a ceramic substrate or the like. The multilayer wiring board 10 has a multilayer wiring structure because the wiring is complicated. The anisotropic conductive rubber sheet 20
An elastic body that has conductivity only in the direction perpendicular to the main surface,
The terminals on the multilayer wiring board 10 and the pads 34 on the membrane 32 are electrically connected. Anisotropic conductive rubber sheet 20
The bumps on the surface of the semiconductor wafer 40 absorb irregularities on the surface of the semiconductor wafer 40 and variations in the height of the bumps 33 by contacting the pads 34 on the membrane 32 with the projections formed on the surface thereof. Is securely connected to the bump 33.

[0005]

Conventionally, Cr, Cu, and the like generally used as wiring materials for a multilayer wiring board and the like have been used.
Since Ni and the like have a property of easily forming an oxide film, when they are simply applied to manufacture a multilayer wiring board,
Since an oxide film removing step is required, the manufacturing process becomes complicated. Particularly, in a multilayer wiring board for a burn-in board, since thousands to tens of thousands or more contact holes are formed in one multilayer wiring board, even if one of the contact holes has a conduction failure due to oxidation, it cannot be used. .
Although the problem of contact hole conduction is very important as described above, even when an oxide film removing step is used, a multilayer wiring board for a burn-in board is manufactured without any single defect due to oxidation of the contact hole. It is very difficult. The conduction failure due to the oxidation of the contact hole can be repaired, but the operation is complicated. In addition, when the oxide film removal process is used, the conduction failure due to oxidation of the contact holes may occur. Therefore, the reliability of the electrical conduction is low for all the contact holes, and the reliability of the manufacturing process itself is low. Is also low.

SUMMARY OF THE INVENTION The present invention has been made under the above-mentioned background, and can reduce the contact resistance between adjacent wiring layers, thereby improving the reliability of electrical and physical connection of contact holes. A first object is to provide a multilayer wiring board for a burn-in board that can be used. In addition, the multi-layer wiring for a burn-in board can be used without oxidizing the outermost surface of the multi-layer wiring board, improving the reliability as a multi-layer wiring board, and without impairing the performance under any environment. A second object is to provide a substrate. Further, an oxide film removing step is not required, and the manufacturing process can be simplified, and the manufacturing method has no fear of oxidizing the inside of the contact hole, thereby improving not only the electrical reliability of the multilayer wiring board but also the manufacturing process itself. A third object is to provide a method of manufacturing a multilayer wiring board for a burn-in board that can improve reliability.

[0007]

Means for Solving the Problems To achieve the above object, the present invention has the following configuration.

(Structure 1) A multilayer wiring board which constitutes a part of a burn-in board used for performing a burn-in test on a large number of semiconductor devices formed on a wafer at one time. While having a structure in which wiring layers having a multilayer structure and insulating layers are alternately laminated,
Having a structure in which adjacent wiring layers are electrically connected to each other via contact holes formed in the insulating layer, and adjacent wiring layers are connected to each other via a metal layer having high oxidation resistance. A multilayer wiring board for a burn-in board.

(Structure 2) The multilayer wiring board for a burn-in board according to Structure 1, wherein a metal layer having high oxidation resistance is formed on the uppermost layer of the wiring layer located below the insulating layer.

(Structure 3) Structure 1 in which a metal layer having high oxidation resistance is formed at the bottom of the contact hole.
The multilayer wiring board for the burn-in board described in the above.

(Structure 4) A multilayer wiring board for a burn-in board according to structures 1 to 3, wherein a metal layer having high oxidation resistance is formed on the uppermost layer of the wiring layer located on the outermost surface of the multilayer wiring board. .

(Structure 5) The metal layer having high oxidation resistance is
The multilayer wiring board for a burn-in board according to any one of Configurations 1 to 4, wherein the multilayer wiring board is made of any one of gold, platinum, silver, rhodium, palladium, and an alloy containing these metals.

(Structure 6) The wiring layer having the multilayer structure is formed of a metal having low oxidation resistance except for the uppermost layer in the case where a metal layer having high oxidation resistance is formed on the uppermost layer. 6. The multilayer wiring board for a burn-in board according to Configurations 1 to 5.

(Structure 7) The multilayer wiring for a burn-in board according to Structure 6, wherein the wiring layer having a multilayer structure formed of a metal having low oxidation resistance has a multilayer structure of Ni / Cu / Cr. substrate.

(Structure 8) The multilayer wiring board for a burn-in board according to Structures 1 to 7, wherein the insulating layer is made of polyimide.

(Structure 9) A method of manufacturing a multilayer wiring board constituting a part of a burn-in board used for performing a burn-in test on a large number of semiconductor devices formed on a wafer at one time, comprising: On top, a conductive layer having a multilayer structure and a conductive layer having a high oxidation-resistant metal layer formed on the uppermost layer is formed, and the conductive layer is patterned,
Forming a first wiring layer having a multilayer structure, forming an insulating layer on the first wiring layer, forming a contact hole in the insulating layer, and forming a conductive layer having a multilayer structure on the insulating layer Forming a conductive layer in which a metal layer having high oxidation resistance is formed on the uppermost layer, and patterning the conductive layer,
Forming a second wiring layer having a multilayer structure, forming the insulating layer and the contact hole, and repeating a series of steps of forming the second wiring layer at least once or more. A method for producing a multilayer wiring board for a burn-in board.

(Structure 10) A method of manufacturing a multilayer wiring board which constitutes a part of a burn-in board used for collectively performing a burn-in test on a large number of semiconductor devices formed on a wafer, the method comprising: Forming a conductive layer having a multilayer structure thereon, and patterning the conductive layer to form a first wiring layer having a multilayer structure;
Forming an insulating layer on the wiring layer, forming a contact hole in the insulating layer, and at the bottom of the contact hole,
Forming a metal layer having high oxidation resistance, forming a conductive layer having a multilayer structure on the insulating layer, patterning the conductive layer, forming a second wiring layer having a multilayer structure, A step of forming the insulating layer and the contact hole, a step of forming a metal layer having high oxidation resistance at the bottom of the contact hole, and a step of repeating the step of forming the second wiring layer at least once or more And a method for manufacturing a multilayer wiring board for a burn-in board.

(Structure 11) Structure 9 or 10 characterized by comprising a step of forming a metal layer having high oxidation resistance on the uppermost layer of the wiring layer located on the outermost surface of the multilayer wiring board.
A method for manufacturing a multilayer wiring board for a burn-in board according to the above.

(Structure 12) The structures 9 to 11, wherein the metal layer having high oxidation resistance is made of any one of gold, platinum, silver, rhodium, palladium and an alloy containing these metals. Of manufacturing a multilayer wiring board for a burn-in board.

(Structure 13) Each of the metal layer constituting the conductive layer having the multilayer structure and the film forming method of the metal layer having high oxidation resistance are formed by electroless plating, electrolytic plating, sputtering, and vacuum deposition, respectively. 13. The method for manufacturing a multilayer wiring board for a burn-in board according to Configurations 9 to 12, wherein the method is selected from the following.

(Structure 14) In the step of forming a wiring layer having a multilayer structure, N
Structures 9 to 13 for forming a wiring layer having a multilayer structure of i / Cu / Cr, wherein the Cr and the Cu are formed by a sputtering method, and the Ni is formed by an electrolytic plating method. A method for manufacturing a multilayer wiring board for a burn-in board according to the above.

(Structure 15) In the step of forming the insulating layer, an insulating layer made of polyimide is formed as the insulating layer, and the method further comprises a step of exposing the polyimide precursor to polyimide and then exposing the polyimide precursor to oxygen plasma. 15. The method for manufacturing a multilayer wiring board for a burn-in board according to Configurations 9 to 14, wherein

[0023]

According to the configuration 1, by connecting adjacent wiring layers via a metal layer having high oxidation resistance, the contact resistance between adjacent wiring layers can be reduced.

Configuration 2 shows one embodiment of Configuration 1.
In addition to the effect of Configuration 1, oxidation of each wiring layer can be prevented.

Configuration 3 shows one embodiment of Configuration 1.
In addition to the effect of Configuration 1, the amount of metal having high oxidation resistance can be reduced.

According to the fourth aspect, the reliability of the multilayer wiring board can be improved without oxidizing the outermost surface of the multilayer wiring board, and the multilayer wiring board can be used in any environment without impairing the performance. It becomes possible.

According to the fifth aspect, these metals having high oxidation resistance do not oxidize or hardly form an oxide, are easy to process, and have strong adhesion, so that the electrical and physical properties of the contact holes can be improved. Reliability of the dynamic connection can be improved.

According to the configuration 6, the cost can be reduced by forming the wiring layer having the multilayer structure with a metal having low oxidation resistance.

According to the seventh aspect, the wiring layer having a multilayer structure has a multilayer structure of Ni / Cu / Cr, so that oxidation of Cu which is easily oxidized can be prevented (in particular, corrosion resistance is improved by Ni). Further, Ni and Cr have good adhesion to Cu and good adhesion to an adjacent layer other than Cu, so that the adhesion between layers can be improved.

According to the eighth aspect, since the insulating layer is made of polyimide, a multi-layer wiring board having improved heat resistance and excellent mechanical strength can be obtained.

According to the ninth aspect, after forming a conductive layer having a multilayer structure and a metal layer having high oxidation resistance formed on the uppermost layer, the conductive layer is patterned to form a multilayer structure. Since the wiring layers are formed, oxidation of each wiring layer can be prevented, and an oxide film removing step is not required. Also,
Since the metal layer having high oxidation resistance is formed on the outermost surface of the multilayer wiring board, the reliability of the multilayer wiring board can be improved without oxidizing the outermost surface of the multilayer wiring board.

According to the tenth aspect, since a metal layer having high oxidation resistance can be formed only at the bottom of the contact hole, a multilayer wiring board can be manufactured at low cost.

According to the eleventh aspect, for the wiring layer positioned at the outermost layer of the multilayer wiring board, a wiring pattern is formed of a metal having low oxidation resistance, and a high oxidation resistance is formed on the wiring pattern by electrolytic plating or the like. By forming the metal layer, defects in the wiring pattern located on the outermost layer of the multilayer wiring board can be reduced as compared with the case where the metal layer having high oxidation resistance is patterned by etching. For example, in the case of patterning by etching, a layer located below Au is undercut and burrs of Au are formed, and the burrs may be peeled off and affect the wiring pattern.

According to the structure 12, these metals having high oxidation resistance are suitable for the manufacturing method of the present invention because they are not oxidized or hardly form an oxide and are easily processed.

According to the thirteenth aspect, the characteristics can be improved, the cost can be reduced, and the throughput can be improved by appropriately selecting each film forming method.

According to the structure 14, when forming a wiring layer having a multilayer structure of Ni / Cu / Cr as a wiring layer having a multilayer structure, Cr and Cu are formed by sputtering, and Ni is formed by electrolytic plating. By forming, Ni can be formed into a thick film, particularly by the electrolytic plating method, so that the cost can be reduced. In addition, since the surface of Ni is rough, it is possible to improve adhesion of a film to be formed on Ni.
When forming a film on Ni, it is preferable to perform continuous plating or the like so as not to oxidize Ni.

According to the fifteenth aspect, by exposing the surface of the insulating layer to oxygen plasma, irregularities are formed on the surface of the polyimide insulating layer and the surface becomes rough, and the surface area is widened. The adhesion to the formed wiring layer can be increased, and organic substances such as polyimide and residues of the developer in the contact holes can be oxidized and removed.

[0038]

Embodiments of the present invention will be described below.

Embodiment 1 (1) Fabrication of Multilayer Wiring Board FIG. 1 shows a cross-sectional view of a main part of a multilayer wiring board according to Embodiment 1. In FIG. 1, the lamination of an intermediate insulating layer / wiring layer is omitted for ease of explanation. As shown in FIG. 1, A is placed on a glass substrate 1 having a thickness of about 3 mm to 5 mm.
First wiring layer 2 having a multilayer structure of u / Ni / Cu / Cr
Is formed, and a polyimide insulating layer 3 is formed on the first wiring layer 2.
Is formed, and on this polyimide insulating layer 3, Au / Ni
A second wiring layer 4 having a multilayer structure of / Cu / Cr is formed. The first wiring layer 2 and the second wiring layer 4 are electrically connected via a contact hole 5. Specifically, the Au film on the uppermost layer of the first wiring layer 2 and the Cr film on the lowermost layer of the second wiring layer 4 are connected via the contact hole 5.

As described above, in the multilayer wiring board of the first embodiment, the Au film is formed on the uppermost layer in the first wiring layer, and the first wiring layer and the second wiring layer are connected via the Au film. Since they are connected, the contact resistance can be reduced. In addition, due to the presence of Au, the adhesion between the first layer wiring and the second layer wiring can be increased, and the first wiring layer and the second wiring layer can be electrically connected well. High reliability can be ensured. Further, since the Au film is formed on the uppermost layer in the second wiring layer, the outermost surface of the final multilayer wiring board is not oxidized, and the reliability as the multilayer wiring board can be improved. It can be used in any environment without deteriorating performance.

Next, a method of manufacturing the multilayer wiring board shown in FIG. 1 will be described. FIG. 2 is a cross-sectional view of a main part for describing a manufacturing process of the multilayer wiring board shown in FIG.

As shown in FIG. 2A, one surface of a glass substrate 1 whose surface is polished flat (a glass substrate having the same or a similar expansion coefficient as Si) is sputtered on one surface.
Cr film about 300 Å, Cu film about 2.5
Each film is formed with a thickness of μm.

Next, as shown in FIG. 2B, a Ni film and an Au film are formed on the Cu film surface at a thickness of about 0.3 μm and about 0.3 μm, respectively.
Each is formed by electrolytic plating with a film thickness of. Note that N
The i film and the Au film can also be formed by sputtering, respectively.

Subsequently, a predetermined photolithography process (resist coating, exposure, development, etching) is performed.
The Au / Ni / Cu / Cr multilayer wiring layer is patterned as shown in FIG. 2C to form a first wiring layer 2 (first wiring pattern). Specifically, first, the Au film is etched using an aqueous solution of iodine and potassium iodide, washed well, and then the Ni / Cu / Cr multilayer film is etched using an etching solution such as an aqueous solution of ferric chloride. The resist is stripped using a resist stripper, washed with water and dried.

Thereafter, a polyimide insulating layer 3 is formed on the first wiring pattern using a photosensitive polyimide precursor,
A contact hole 5 is formed in the polyimide insulating layer 3 by photolithography as shown in FIG. Specifically, for the photosensitive polyimide precursor,
After baking, baking and heating are performed at 360 ° C. for 3 hours (cured) to completely polyimide the photosensitive polyimide precursor, the surface of the polyimide is lightly exposed to oxygen plasma. By this oxygen plasma treatment, irregularities are formed on the surface of the polyimide insulating layer, the surface is made to have a roughness of about 0.1 μm by dry etching, the surface area is increased, and the second surface formed in the next step is formed by the anchor effect. It can increase the adhesion to the wiring layer and oxidize organic substances such as polyimide in the contact hole and residues of the developer,
Can be removed.

Thereafter, the multilayer wiring board is soft-etched with an acid to remove the surface oxide layer obtained in the step of FIG.
Dry at ℃. At this time, the Au film formed on the outermost surface of the first wiring layer is not oxidized, so that high-temperature drying can be easily performed.

Next, as shown in FIG. 2E, the steps of FIGS. 2A to 2C are performed again for each metal film in the second wiring layer in the same manner as in the first wiring layer. By that, Au
By patterning / Ni / Cu / Cr into a predetermined pattern, the second wiring layer 4 is formed as shown in FIG.
To form

If necessary, the burn-in board multilayer having a desired number of layers (usually 2 to 5 layers) is repeated by the number of layers required to be stacked in the steps of FIGS. 2 (d) to 2 (f). Obtain a wiring board. The Cu layer in the wiring layer located at the outermost surface of the final multilayer wiring board (particularly, the peripheral terminal portion) may be formed by a mechanical contact method using a physical contact method such as pin contact with a pogo pin. The thickness is preferably 10 μm or more in consideration of the mechanical strength.

As described above, in the method of manufacturing the multilayer wiring board according to the first embodiment, since the Au film is formed on the uppermost layer of each wiring layer, each metal constituting each wiring layer during the manufacturing process. The film (a metal film that is easily oxidized) is not oxidized, so that the oxide film removing step can be omitted, and the manufacturing process of the multilayer wiring board can be shortened. More specifically, since an Au film is formed on the uppermost layer of each wiring layer, an oxide layer is not formed on the surface in a cleaning step (heat treatment, plasma treatment, acid treatment, drying, etc.), and therefore, The step of removing the oxide film immediately before forming the upper wiring layer by sputtering or the like can be omitted. Further, even if a drying step is added during the manufacturing process, the surface metal in the wiring layer is not oxidized during the manufacturing process, and high-temperature drying is possible, so that the insulating material such as polyimide is not absorbed in moisture during sputtering. Thus, evaporation of moisture can be reduced, and for example, a metal film such as Cr in the first wiring layer is not oxidized.

Evaluation The contact hole connection reliability of the glass multilayer wiring board formed by the method described in Embodiment 1 was evaluated by an automatic checker or prober (for example, a flying prober manufactured by IBM Corporation). A non-defective product could be extracted without defects at one of the 8,700 vias.

(2) Preparation of Membrane Ring A method of preparing a membrane ring will be described with reference to FIG.

First, as shown in FIG. 5A, a silicon rubber sheet 36 having a uniform thickness of 5 mm is placed on an aluminum plate 35 having high flatness. On the other hand, for example,
Film 37 in which copper is formed to a thickness of 18 μm on a polyimide film having a thickness of 25 μm by sputtering or plating.
Prepare The material, forming method, thickness, and the like of the film 37 can be appropriately selected. For example, a thickness of 25 μm (12 to
50μm) polyimide film or 0.3m thick
m (0.1 to 0.5 mm) silicone rubber sheet can be used. The film can be formed by a coating method or a commercially available film or sheet can be used. Further, after the polyimide precursor is cast on the copper foil, the polyimide precursor is heated, dried and cured to form a film having a structure in which the copper foil and the polyimide film are bonded. Alternatively, a film having a structure in which a plurality of conductive metals are sequentially formed on one surface of a film and a conductive metal layer having a laminated structure is formed on one surface of the film may be used. Also, polyimide and Cu
In order to improve the adhesion between them and to prevent film contamination, a thin N
An i film may be formed.

Next, a film 37 having a structure in which copper and a polyimide film are bonded to each other is adsorbed onto the silicon rubber sheet 36 in a state where the film 37 is uniformly spread with the copper side down. At this time, by utilizing the property that the film 37 is adsorbed to the silicon rubber sheet 36, the air layer is adsorbed while being expelled so as not to cause wrinkling or bending, so that the air layer is adsorbed in a uniformly developed state.

Next, a thermosetting adhesive 38 is thinly and uniformly applied to the bonding surface of the circular SiC ring 31 having a diameter of about 8 inches and a thickness of about 2 mm in a thickness of about 50 to 100 μm. Put on. Here, as the thermosetting adhesive 38, an adhesive that cures at a temperature 0 to 50 ° C. higher than the set temperature of the burn-in test of 80 to 150 ° C. is used. In the present embodiment, the bond high chip HT-100L (base agent:
Curing agent = 4: 1) (manufactured by Konishi Co., Ltd.) was used. Furthermore, a highly flat aluminum plate (weighing about 2.5k
g) is placed on the ring 31 as a weight (not shown).

After the above-mentioned preparation step, the temperature (80 to 150 ° C.) or higher (for example, 2
(00 ° C., 2.5 hours) to bond the film 37 to the ring 31 (FIG. 5B). At this time, since the coefficient of thermal expansion of the silicon rubber sheet 36 is larger than the coefficient of thermal expansion of the film 37, the film 37 adsorbed on the silicon rubber sheet 36 expands by the same amount as the silicon rubber sheet 36. That is, the thermal expansion of the silicon rubber sheet is greater than when the film 37 is simply heated at a temperature equal to or higher than the set temperature (80 to 150 ° C.) in the burn-in test, and the polyimide film expands more due to this stress. When the tension is large, the thermosetting adhesive 3
8 is cured, and the film 37 and the ring 31 are bonded.
Further, since the film 37 on the silicon rubber sheet 36 is adsorbed in a state where the film 37 is uniformly spread without wrinkles, deflections, or looseness, the film 37 can be bonded to the ring 31 without wrinkles, deflection, or looseness. it can. Furthermore, the silicon rubber sheet 36 has high flatness,
Since it has elasticity, the film 37 can be uniformly and uniformly bonded to the bonding surface of the ring 31. When the thermosetting adhesive is not used, the film shrinks and the tension is weakened, and the curing time of the adhesive varies depending on the location, so that the adhesive cannot be uniformly and evenly adhered to the bonding surface of the ring.

After completion of the heating and bonding step, the product is cooled to room temperature and contracted to a state before heating. Thereafter, the film 37 outside the ring 31 is cut and removed along the outer periphery of the ring 31 with a cutter to produce a membrane ring (FIG. 5C).

Next, a process of forming the bumps and pads by processing the above membrane ring will be described.

First, on the copper foil (Cu) of the film 37 having a structure in which the copper foil and the polyimide film in the membrane ring prepared as shown in FIG. Then, Ni was added to the substrate by electroplating.
After plating 2 to 0.5 μm (preferable range is 0.1 to 3 μm), Au is formed thereon at 0.1 to 0.5 μm (preferable range is 0.5 to 2 μm), and Au / Ni / C
A u / polyimide film laminated film structure is formed.

Next, as shown in FIG. 6 (c), an excimer laser is used to
A bump hole having a diameter of about 30 μm is formed.

Next, as shown in FIG. 6D, in order to prevent the surface of the uppermost Au film from being plated, a protective film such as a resist is partially replaced with a part of the Au film used as an electrode. It is applied to a thickness of about 2 to 3 μm on the entire surface except for protecting the Au film.

Then, one of the electrodes is connected to the uppermost Au film, and Ni or Ni alloy is electroplated on the polyimide film side. By this electroplating, the plating grows so as to fill the bump holes shown in FIG. 6D, and then spreads isotropically and grows almost hemispherically when it reaches the surface of the polyimide film, and Ni or Ni alloy Is formed. Subsequently, an electroplating layer made of Au having a thickness of 1 to 2 μm is formed on the surface of the bump. Thereafter, although not particularly shown, the protective film is peeled off.

Then, a new resist is applied to the entire surface of the uppermost layer of Au, and the resist other than the portion where the pad is to be formed is removed by exposure and development.
As shown in (e), a resist pattern is formed.

Next, as shown in FIG. 6F, the Au film was etched with an aqueous solution of iodine / potassium iodide.
After etching the thin Ni film and Cu film existing between u and Cu with an aqueous solution of ferric chloride and rinsing well,
The resist is peeled off, and as shown in FIG.
A pad made of u / Ni / Cu is formed. At this time, it is preferable to use a spray method for etching, since side etching is small.

Through the above steps, the membrane ring
Bumps and pads are formed.

(3) Burn-in test Next, the burn-in test will be described. In the burn-in test, as shown in FIG. 7, a membrane ring 30, an anisotropic conductive rubber sheet 20, and a multilayer wiring board 10 are placed in this order on a Si wafer 40 placed on a vacuum chuck (not shown). Each device on the wafer 40 is fixed by suction and evaluated by a tester connected to the multilayer wiring board 10 via a printed board (not shown). As a result, since it is composed of three parts, a multilayer wiring board, an anisotropic conductive rubber sheet and a membrane ring, not only is the structure simple and the connection reliability is high, but it is also excellent in cost and durability, It was confirmed that it was sufficiently practical. Further, since the contact method is not a needle method using pogo pins or the like but a membrane method, the interval between bumps in the membrane ring can be reduced. Also, high density,
A multi-pin structure was achieved.

[0066] multilayer circuit board according to Embodiment 2 Embodiment 2, while ensuring the reliability, realizes the multilayer wiring board can be manufactured at a low cost without increasing the manufacturing steps. In the second embodiment, a method for forming a membrane ring and a wafer burn-in test are the same as those in the first embodiment, and a description thereof will be omitted.

FIG. 3 is a sectional view of a main part of a multilayer wiring board according to the second embodiment. In FIG. 3, the lamination of an intermediate insulating layer / wiring layer is omitted for ease of explanation. FIG.
As shown in the figure, on a glass substrate 1 having a thickness of about 3 to 7 mm,
A first wiring layer 2 having a Ni / Cu / Cr multilayer structure is formed, a polyimide insulating layer 3 is formed on the first wiring layer 2, and an Au film is formed on the bottom of the contact hole 5 in the polyimide insulating layer 3. It is formed with a thickness of 0.5 μm. Further, on the polyimide insulating layer 3, Au / Ni /
A second wiring layer 4 made of Cu / Cr is formed.

In the second embodiment, the Ni film formed on the uppermost layer of the first wiring layer and the Cr film formed on the lowermost layer of the second wiring layer are formed on the bottom of the contact hole. Through the Au film (the Au film partially formed on the uppermost Ni film of the first wiring layer). In such a structure, since the Au film is partially formed at the bottom of the contact hole, not only can the contact resistance be reduced, but also the first wiring can be reduced as compared with the multilayer wiring board of the first embodiment. Since the amount of plating of the Au film formed between the layer and the second wiring layer can be small, the manufacturing cost can be reduced. Further, as in the first embodiment, since the Au film is provided on the uppermost layer in the second wiring layer, the surface of the multilayer wiring board is not oxidized, and the reliability as the multilayer wiring board is improved. It can be used under any environment without deteriorating performance.

Next, a method of manufacturing the multilayer wiring board shown in FIG. 3 will be described. FIG. 4 is a cross-sectional view of a main part for describing a manufacturing process of the multilayer wiring board shown in FIG.

First, as shown in FIG. 4A, one surface of a glass substrate 1 (a glass substrate having the same expansion coefficient as that of Si or having a similar expansion coefficient to Si) whose surface is polished flat is sputtered. , Cr about 300 Å and Cu about 2.
Each film is formed with a thickness of 5 μm. Next, a Ni film is formed on the Cu surface by electrolytic plating to a thickness of about 0.3 μm. Note that a Ni film can be formed by sputtering.

Subsequently, a predetermined photolithography process (resist coating, exposure, development, etching) is performed.
The Ni / Cu / Cr multilayer wiring layer is patterned as shown in FIG. 4B to form a first wiring layer 2 (first wiring pattern). Specifically, the resist is stripped off using an aqueous ferric chloride solution, and the Ni / Cu / Cr multilayer film is patterned by etching, followed by drying.

Next, a polyimide insulating layer 3 is formed on the first wiring pattern using a photosensitive polyimide precursor,
A contact hole 5 is formed on the polyimide insulating layer 3 by photolithography as shown in FIG. Specifically, the polyimide precursor is baked, baked, and heated at 350 ° C. for 3 hours (cured), and after the polyimide precursor is completely polyimide, the surface is lightly exposed to oxygen plasma. . As a result, irregularities are formed on the surface of the polyimide insulating layer.
By increasing the roughness to about m, the surface area is increased, the adhesion to the second wiring layer formed in the next step is increased by the anchor effect, and the residual polyimide, developer and the like in the contact holes are removed. And the like can be oxidized and removed.

Then, the multi-layer wiring board is, for example, 98%
After immersing in a 1/10 sulfuric acid aqueous solution prepared by mixing sulfuric acid: water = 1: 10 using sulfuric acid to remove oxides present on the surface of the Ni film exposed at the bottom of the contact hole, the Ni film is removed. Electroless plating was performed as a catalyst.
As shown in (d), Au is formed at the bottom of the contact hole 5.
Is formed to a thickness of about 0.1 μm. That is, in the formation of an Au film by electroless plating, there is a merit that Au is selectively deposited on the surface of the Ni film and is not deposited on other portions. Utilizing this property, Au is deposited only on the bottom of the contact hole. It is deposited and then dried.

Thereafter, the multilayer wiring board is washed with water,
Drying is performed at 00 ° C. At this time, since the Au film formed at the bottom of the contact hole has high oxidation resistance, it can be dried by performing the oxidation step.

Next, as shown in FIG. 4E, a metal film having a multilayer structure of Ni / Cu / Cr in the second wiring layer is formed in the same manner as in the first wiring layer 2 as shown in FIG. Is performed again, and an Au film is formed to a thickness of about 0.5 μm by electrolytic plating.

Finally, Au / Ni /
By patterning the Cu / Cr multilayer film into a predetermined pattern, the second wiring layer 4 is formed as shown in FIG.

As described above, according to the multilayer wiring board of the second embodiment, the Au film is formed only at the bottom of the contact hole connecting the first wiring layer and the second wiring layer.
A multilayer wiring board having low contact resistance and low cost can be manufactured. Further, since Au is formed on the outermost surface of the final multilayer wiring board, the oxidation resistance is strong, and the reliability of the multilayer wiring board can be improved. Since Au on the outermost surface is formed by electrolytic plating,
Since it can be formed of an alloy, the hardness can be further increased. Even when used as a contactor, the strength is high, so that the reliability can be improved.

Evaluation The contact hole connection reliability of the glass multilayer wiring board formed by the method described in Embodiment 2 was evaluated using an automatic checker or prober (for example, a flying prober manufactured by IBM Corporation). A non-defective product could be extracted without defects in one of the 8,700 contact holes.

The present invention is not limited to the above-described embodiment, and can be appropriately modified within the scope of the present invention.

For example, in Embodiments 1 and 2,
The case where Au is used as the metal formed inside the contact hole has been described. However, the present invention is not limited to this. Any metal having high oxidation resistance (a metal that does not oxidize or a metal that hardly forms an oxide) is used. If appropriate, it can be applied as appropriate. For example, as a metal having high oxidation resistance, Pt, Ag, rhodium, palladium, an alloy containing these metals, or the like can be used.

In the method of manufacturing a multilayer wiring board, in the case of forming a metal having high oxidation resistance such as Au, particularly, the forming method is the same as that described in the first and second embodiments. The present invention is not limited to this, and can be selected according to various conditions such as an etching rate. For example, physical and chemical thin film deposition methods such as electroless plating, electrolytic plating, sputtering, and vacuum evaporation can be applied.
Various film formation methods can be selected according to conditions such as an etching amount.

Further, instead of the glass substrate, a ceramics substrate, a glass ceramics substrate, or the like having the same expansion coefficient as that of Si or having a similar expansion coefficient to Si can be used.
Note that the glass substrate is inexpensive, easy to process, can be polished flat, can control the thermal expansion depending on the material, and has excellent electrical insulation.

[0083]

According to the multilayer wiring board for a burn-in board of the present invention, the contact resistance between adjacent wiring layers can be reduced, and the reliability of the electrical and physical connection of the contact holes can be improved. it can. Further, according to the multilayer wiring board for a burn-in board of the present invention, the reliability of the multilayer wiring board can be improved without oxidizing the outermost surface of the multilayer wiring board, and the performance is impaired under any environment. It can be used without.

Further, according to the method of manufacturing a multilayer wiring board for a burn-in board of the present invention, an oxide film removing step is not required, the manufacturing step can be simplified, and there is no fear of oxidation in the contact hole. This can improve not only the electrical reliability of the multilayer wiring board but also the reliability of the manufacturing process itself.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a main part of a multilayer wiring board for a burn-in board according to an embodiment of the present invention.

FIG. 2 is a fragmentary cross-sectional view for explaining a manufacturing step of the multilayer wiring board for a burn-in board according to the embodiment of the present invention.

FIG. 3 is a cross-sectional view of a principal part showing a multilayer wiring board for a burn-in board according to an embodiment of the present invention.

FIG. 4 is a fragmentary cross-sectional view for explaining a manufacturing step of the multilayer wiring board for a burn-in board according to the embodiment of the present invention.

FIG. 5 is a cross-sectional view illustrating a step of forming a membrane ring according to the embodiment of the present invention.

FIG. 6 is a fragmentary cross-sectional view for describing a processing step of the membrane ring in the embodiment of the present invention.

FIG. 7 is a diagram schematically showing a burn-in board.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Glass substrate 2 1st wiring layer 3 Insulating layer 4 2nd wiring layer 5 Contact hole 10 Multilayer wiring board 20 Anisotropic conductive rubber sheet 30 Membrane ring with a bump 31 Ring 32 Membrane 33 Bump 34 Pad 35 Aluminum plate 36 Silicon rubber sheet 37 Film 38 Thermosetting adhesive 40 Silicon wafer

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2G011 AA16 AA21 AB06 AB08 AC14 AE03 AF04 4M106 AA01 AA02 BA14 CA56 DH01 DJ33

Claims (15)

[Claims] 1. A multilayer wiring board which constitutes a part of a burn-in board used for performing a burn-in test of a large number of semiconductor devices formed on a wafer at one time, wherein a multilayer structure is formed on an insulating substrate. And a structure in which insulating layers are alternately stacked, and a structure in which adjacent wiring layers are electrically connected to each other through a contact hole formed in the insulating layer, and A multilayer wiring board for a burn-in board, wherein wiring layers are connected via a metal layer having high oxidation resistance. 2. The multilayer wiring board for a burn-in board according to claim 1, wherein a metal layer having high oxidation resistance is formed on the uppermost layer of the wiring layer located below the insulating layer. 3. The multilayer wiring board for a burn-in board according to claim 1, wherein a metal layer having high oxidation resistance is formed at the bottom of the contact hole. 4. The multilayer wiring board for a burn-in board according to claim 1, wherein a metal layer having high oxidation resistance is formed on the uppermost layer of the wiring layer located on the outermost surface of the multilayer wiring board. 5. The method according to claim 1, wherein the metal layer having high oxidation resistance is made of one of gold, platinum, silver, rhodium, palladium, and an alloy containing these metals. Multilayer wiring board for burn-in board. 6. A wiring layer having a multilayer structure, wherein the wiring layer is formed of a metal having low oxidation resistance, except for an uppermost layer in the case where a metal layer having high oxidation resistance is formed on the uppermost layer. A multilayer wiring board for a burn-in board according to claim 1. 7. The multilayer wiring board for a burn-in board according to claim 6, wherein the wiring layer having a multilayer structure formed of a metal having low oxidation resistance has a multilayer structure of Ni / Cu / Cr. . 8. The multilayer wiring board for a burn-in board according to claim 1, wherein said insulating layer is made of polyimide. 9. A method for manufacturing a multilayer wiring board which constitutes a part of a burn-in board used for collectively performing a burn-in test of a large number of semiconductor devices formed on a wafer, the method comprising the steps of: Forming a conductive layer having a multilayer structure and a metal layer having high oxidation resistance formed on the uppermost layer, and patterning the conductive layer to form a first wiring layer having a multilayer structure Forming an insulating layer on the first wiring layer and forming a contact hole in the insulating layer; a conductive layer having a multilayer structure on the insulating layer, and a metal having high oxidation resistance as an uppermost layer Forming a conductive layer on which the layer is formed,
At least one series of a step of patterning the conductive layer to form a second wiring layer having a multilayer structure, a step of forming the insulating layer and the contact hole, and a step of forming the second wiring layer A method for manufacturing a multilayer wiring board for a burn-in board, comprising: 10. A method for manufacturing a multilayer wiring board which constitutes a part of a burn-in board used for collectively performing a burn-in test of a large number of semiconductor devices formed on a wafer, comprising the steps of: Forming a conductive layer having a multilayer structure, patterning the conductive layer to form a first wiring layer having a multilayer structure; forming an insulating layer on the first wiring layer; Forming a contact hole; forming a metal layer having high oxidation resistance at the bottom of the contact hole; forming a conductive layer having a multilayer structure on the insulating layer; and patterning the conductive layer. Forming a second wiring layer having a multilayer structure; forming the insulating layer and the contact hole; forming a metal layer having high oxidation resistance at the bottom of the contact hole; Method for manufacturing a multilayer wiring board for burn-in board, characterized in that and a step of repeating at least once a series of steps of forming a second wiring layer. 11. The burn-in board multilayer according to claim 9, further comprising a step of forming a metal layer having high oxidation resistance on the uppermost layer of the wiring layer located on the outermost surface of the multilayer wiring board. Manufacturing method of wiring board. 12. The method according to claim 9, wherein the metal layer having high oxidation resistance is made of any one of gold, platinum, silver, rhodium, palladium and an alloy containing these metals. A method for manufacturing a multilayer wiring board for a burn-in board. 13. A method for forming a metal layer constituting a conductive layer having a multilayer structure and a method for forming a metal layer having high oxidation resistance, respectively, include an electroless plating method, an electrolytic plating method, a sputtering method, a vacuum deposition method, 13. The method for manufacturing a multilayer wiring board for a burn-in board according to claim 9, wherein the method is selected from the following. 14. A method for forming a wiring layer having a multilayer structure, comprising the steps of:
/ Cr to form a wiring layer having a multilayer structure, wherein the Cr and the Cu are formed by a sputtering method,
14. The method for manufacturing a multilayer wiring board for a burn-in board according to claim 9, wherein said Ni is formed by an electrolytic plating method. 15. In the step of forming the insulating layer,
15. The multilayer wiring for a burn-in board according to claim 9, wherein an insulating layer made of polyimide is formed as the insulating layer, and the method further comprises a step of exposing the polyimide precursor to polyimide and then exposing the polyimide precursor to oxygen plasma. Substrate manufacturing method.