DE69526460D1 - Halbleiterspeicheranordnung - Google Patents

Halbleiterspeicheranordnung

Info

Publication number: DE69526460D1
Authority: DE; Germany
Prior art keywords: memory device; semiconductor memory; semiconductor; memory
Prior art date: 1994-01-31
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE69526460T

Other languages

English (en)

Other versions

DE69526460T2 (de

Inventor

Fumihiro Kohno

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Toshiba Corp

Original Assignee

Toshiba Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1994-01-31

Filing date

1995-01-31

Publication date

2002-05-23

1995-01-31 Application filed by Toshiba Corp filed Critical Toshiba Corp

2002-05-23 Application granted granted Critical

2002-05-23 Publication of DE69526460D1 publication Critical patent/DE69526460D1/de

2002-11-07 Publication of DE69526460T2 publication Critical patent/DE69526460T2/de

2015-02-01 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders

Landscapes

Engineering & Computer Science (AREA)
Microelectronics & Electronic Packaging (AREA)
Computer Hardware Design (AREA)
Dram (AREA)
Semiconductor Memories (AREA)
Static Random-Access Memory (AREA)

DE69526460T 1994-01-31 1995-01-31 Halbleiterspeicheranordnung Expired - Lifetime DE69526460T2 (de)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
JP892194		1994-01-31
JP7008471A JPH07254275A (ja)	1994-01-31	1995-01-23	半導体記憶装置

Publications (2)

Publication Number	Publication Date
DE69526460D1 true DE69526460D1 (de)	2002-05-23
DE69526460T2 DE69526460T2 (de)	2002-11-07

Family

ID=26342986

Family Applications (4)

Application Number	Title	Priority Date	Filing Date
DE69510834T Expired - Lifetime DE69510834T2 (de)	1994-01-31	1995-01-31	Halbleiterspeicheranordnung
DE69518343T Expired - Lifetime DE69518343T2 (de)	1994-01-31	1995-01-31	Halbleiterspeicheranordnung
DE69526460T Expired - Lifetime DE69526460T2 (de)	1994-01-31	1995-01-31	Halbleiterspeicheranordnung
DE69509931T Expired - Lifetime DE69509931T2 (de)	1994-01-31	1995-01-31	Halbleiterspeicheranordnung

Family Applications Before (2)

Application Number	Title	Priority Date	Filing Date
DE69510834T Expired - Lifetime DE69510834T2 (de)	1994-01-31	1995-01-31	Halbleiterspeicheranordnung
DE69518343T Expired - Lifetime DE69518343T2 (de)	1994-01-31	1995-01-31	Halbleiterspeicheranordnung

Family Applications After (1)

Application Number	Title	Priority Date	Filing Date
DE69509931T Expired - Lifetime DE69509931T2 (de)	1994-01-31	1995-01-31	Halbleiterspeicheranordnung

Country Status (6)

Country	Link
US (7)	US5825714A (de)
EP (5)	EP0665555B1 (de)
JP (1)	JPH07254275A (de)
KR (1)	KR100201723B1 (de)
CN (1)	CN1044526C (de)
DE (4)	DE69510834T2 (de)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPH07254275A (ja) *	1994-01-31	1995-10-03	Toshiba Corp	半導体記憶装置
JP3134798B2 (ja) *	1996-11-15	2001-02-13	日本電気株式会社	電圧発生回路
KR100234878B1 (ko) *	1997-01-13	1999-12-15	윤종용	반도체 메모리 장치
JPH10241364A (ja) *	1997-02-28	1998-09-11	Toshiba Corp	Ｄｒａｍ装置及びロジック混載ｌｓｉ
US6009037A (en) *	1997-09-25	1999-12-28	Texas Instruments Incorporated	Dynamic logic memory addressing circuits, systems, and methods with reduced capacitively loaded predecoders
JPH11306751A (ja) *	1998-04-22	1999-11-05	Toshiba Corp	半導体記憶装置
US6321296B1 (en) *	1998-08-04	2001-11-20	International Business Machines Corporation	SDRAM L3 cache using speculative loads with command aborts to lower latency
JP4398551B2 (ja)	1998-12-25	2010-01-13	株式会社東芝	半導体装置
DE69927364D1 (de)	1999-07-28	2005-10-27	St Microelectronics Srl	Einzige Speisespannungsschaltung für nichtflüchtigen Speicher mit hierarchischem Reihendekodierer
JP3566608B2 (ja) *	1999-12-28	2004-09-15	Ｎｅｃエレクトロニクス株式会社	半導体集積回路
JP3534681B2 (ja)	2000-06-01	2004-06-07	松下電器産業株式会社	半導体記憶装置
DE10038925A1 (de) *	2000-08-09	2002-03-14	Infineon Technologies Ag	Elektronische Treiberschaltung für Wortleitungen einer Speichermatrix und Speichervorrichtung
JP2002298579A (ja) *	2001-03-29	2002-10-11	Toshiba Corp	半導体記憶装置
DE10116358A1 (de)	2001-04-02	2002-11-07	Micronas Gmbh	Vorrichtung und Verfahren zur Erfassung und Unterdrückung von Störungen
US6426914B1 (en) *	2001-04-20	2002-07-30	International Business Machines Corporation	Floating wordline using a dynamic row decoder and bitline VDD precharge
US6597623B2 (en) *	2001-06-28	2003-07-22	Intel Corporation	Low power architecture for register files
KR100477040B1 (ko) *	2001-09-10	2005-03-18	가부시끼가이샤 도시바	반도체 기억 장치
US6628565B2 (en)	2001-11-05	2003-09-30	Micron Technology, Inc.	Predecode column architecture and method
US6785186B2 (en) *	2002-08-21	2004-08-31	Micron Technology, Inc.	Design of an high speed xdecoder driving a large wordline load consuming less switching current for use in high speed syncflash memory
JP4439185B2 (ja) *	2003-02-07	2010-03-24	パナソニック株式会社	半導体記憶装置
US7200050B2 (en) *	2003-05-26	2007-04-03	Semiconductor Energy Laboratory Co., Ltd.	Memory unit and semiconductor device
JP2005025907A (ja) *	2003-07-03	2005-01-27	Hitachi Ltd	半導体集積回路装置
US7016233B2 (en) *	2004-05-17	2006-03-21	Taiwan Semiconductor Manufacturing Co., Ltd.	Wordline decoder and memory device
KR100634439B1 (ko) *	2004-10-26	2006-10-16	삼성전자주식회사	퓨즈프리 회로, 퓨즈프리 반도체 집적회로 및 퓨즈프리불휘발성 메모리 장치, 그리고 퓨즈프리 방법
US7151711B2 (en) *	2005-02-23	2006-12-19	United Memories, Inc.	Self-addressed subarray precharge
US7355905B2 (en)	2005-07-01	2008-04-08	P.A. Semi, Inc.	Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage
US7884645B2 (en) *	2008-01-31	2011-02-08	Qualcomm Incorporated	Voltage level shifting circuit and method
JP2009238323A (ja) *	2008-03-27	2009-10-15	Fujitsu Microelectronics Ltd	半導体記憶装置、画像処理システムおよび画像処理方法
US8139426B2 (en) *	2008-08-15	2012-03-20	Qualcomm Incorporated	Dual power scheme in memory circuit
US7924633B2 (en) *	2009-02-20	2011-04-12	International Business Machines Corporation	Implementing boosted wordline voltage in memories
JP4913878B2 (ja) *	2009-05-27	2012-04-11	ルネサスエレクトロニクス株式会社	ワード線選択回路、ロウデコーダ
JP2011034658A (ja) *	2009-08-06	2011-02-17	Fujitsu Semiconductor Ltd	半導体記憶装置、ワード線の昇圧方法、及びシステム
JP5300709B2 (ja) *	2009-12-14	2013-09-25	株式会社東芝	半導体記憶装置
JP2011198445A (ja) *	2010-03-24	2011-10-06	Toshiba Corp	半導体記憶装置
US8737137B1 (en) *	2013-01-22	2014-05-27	Freescale Semiconductor, Inc.	Flash memory with bias voltage for word line/row driver
WO2015162682A1 (ja) *	2014-04-22	2015-10-29	ユニサンティスエレクトロニクスシンガポールプライベートリミテッド	半導体装置
CN104506180A (zh) *	2014-12-12	2015-04-08	长沙景嘉微电子股份有限公司	一种高速电平转换电路
KR102569408B1 (ko) *	2015-07-27	2023-08-22	파워 다운 세미컨덕터 아이엔씨	공진 구동 회로를 이용한 저전력 디코더
KR102637709B1 (ko)	2015-07-27	2024-02-19	파워 다운 세미컨덕터 아이엔씨	공진 구동 회로를 이용한 저전력 sram 비트셀
US10109365B2 (en) *	2016-11-28	2018-10-23	Taiwan Semiconductor Manufacturing Company Limited	Word line driver
US10658026B2 (en)	2017-05-26	2020-05-19	Taiwan Semiconductor Manufacturing Company Limited	Word line pulse width control circuit in static random access memory
KR20230109003A (ko) *	2022-01-12	2023-07-19	에스케이하이닉스 주식회사	반도체장치 및 반도체시스템

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4344005A (en) *	1978-07-18	1982-08-10	Rca Corporation	Power gated decoding
JPS583325A (ja) *	1981-06-29	1983-01-10	Fujitsu Ltd	インバ−タ回路
JPS5979488A (ja) *	1982-10-28	1984-05-08	Nec Corp	Ｍｏｓメモリ回路
EP0210454B1 (de) *	1985-07-01	1991-01-30	Nec Corporation	Speicherschaltung mit Wortzeilenrauschunterdrückungsschaltungen
US5448517A (en) *	1987-06-29	1995-09-05	Kabushiki Kaisha Toshiba	Electrically programmable nonvolatile semiconductor memory device with NAND cell structure
JPH0821849B2 (ja) *	1988-10-25	1996-03-04	富士通株式会社	半導体記憶装置
JP2911918B2 (ja) *	1989-08-30	1999-06-28	富士通株式会社	半導体記憶装置
US5214602A (en) *	1990-04-06	1993-05-25	Mosaid Inc.	Dynamic memory word line driver scheme
JPH0438790A (ja) *	1990-06-01	1992-02-07	Toshiba Corp	ダイナミック型半導体記憶装置
US5103113A (en) *	1990-06-13	1992-04-07	Texas Instruments Incorporated	Driving circuit for providing a voltage boasted over the power supply voltage source as a driving signal
JPH04106794A (ja) *	1990-08-27	1992-04-08	Fujitsu Ltd	半導体記憶装置
JP2564695B2 (ja) *	1990-09-14	1996-12-18	富士通株式会社	半導体記憶装置
JPH04225182A (ja) *	1990-12-26	1992-08-14	Toshiba Corp	半導体記憶装置
JP2829135B2 (ja) *	1990-12-27	1998-11-25	株式会社東芝	半導体記憶装置
US5202855A (en) *	1991-01-14	1993-04-13	Motorola, Inc.	DRAM with a controlled boosted voltage level shifting driver
US5253202A (en) *	1991-02-05	1993-10-12	International Business Machines Corporation	Word line driver circuit for dynamic random access memories
JP2835215B2 (ja) *	1991-07-25	1998-12-14	株式会社東芝	不揮発性半導体記憶装置
KR0113252Y1 (ko) *	1991-12-24	1998-04-14	문정환	워드라인 전압 공급회로
JPH0817231B2 (ja) *	1992-01-29	1996-02-21	東京工業大学長	組織ドープ構造半導体装置
JPH0684354A (ja) *	1992-05-26	1994-03-25	Nec Corp	行デコーダ回路
KR960006373B1 (ko) *	1992-10-31	1996-05-15	삼성전자주식회사	반도체 메모리 장치의 워드라인 구동회로
JP3267436B2 (ja) *	1993-04-19	2002-03-18	三菱電機株式会社	半導体装置
JPH07254275A (ja) *	1994-01-31	1995-10-03	Toshiba Corp	半導体記憶装置
JP3080829B2 (ja) *	1994-02-17	2000-08-28	株式会社東芝	カスケード型メモリセル構造を有した多バンクシンクロナスメモリシステム
JP3667787B2 (ja) *	1994-05-11	2005-07-06	株式会社ルネサステクノロジ	半導体記憶装置
US5637229A (en) *	1995-02-17	1997-06-10	Enviroguard, Inc.	Self flocculating separation medium and method
US5615164A (en) *	1995-06-07	1997-03-25	International Business Machines Corporation	Latched row decoder for a random access memory
JP3159359B2 (ja) *	1995-06-22	2001-04-23	日本電気株式会社	半導体装置
JPH09134591A (ja) *	1995-11-07	1997-05-20	Oki Micro Design Miyazaki:Kk	半導体メモリ装置
KR0179553B1 (ko) *	1995-12-29	1999-04-15	김주용	로오 디코더 및 컬럼 디코더 회로
JP3759648B2 (ja) *	1996-03-04	2006-03-29	株式会社ルネサステクノロジ	半導体記憶装置
KR100246311B1 (ko) *	1996-09-17	2000-03-15	김영환	반도체 메모리소자
US6009023A (en) *	1998-05-26	1999-12-28	Etron Technology, Inc.	High performance DRAM structure employing multiple thickness gate oxide

1995
- 1995-01-23 JP JP7008471A patent/JPH07254275A/ja not_active Abandoned
- 1995-01-27 US US08/379,290 patent/US5825714A/en not_active Expired - Lifetime
- 1995-01-28 CN CN95100739A patent/CN1044526C/zh not_active Expired - Lifetime
- 1995-01-30 KR KR1019950001885A patent/KR100201723B1/ko not_active IP Right Cessation
- 1995-01-31 DE DE69510834T patent/DE69510834T2/de not_active Expired - Lifetime
- 1995-01-31 EP EP95101292A patent/EP0665555B1/de not_active Expired - Lifetime
- 1995-01-31 EP EP00101652A patent/EP1005046A3/de not_active Withdrawn
- 1995-01-31 EP EP95101295A patent/EP0665557B1/de not_active Expired - Lifetime
- 1995-01-31 DE DE69518343T patent/DE69518343T2/de not_active Expired - Lifetime
- 1995-01-31 EP EP99124040A patent/EP0991077B1/de not_active Expired - Lifetime
- 1995-01-31 EP EP95101293A patent/EP0665556B1/de not_active Expired - Lifetime
- 1995-01-31 DE DE69526460T patent/DE69526460T2/de not_active Expired - Lifetime
- 1995-01-31 DE DE69509931T patent/DE69509931T2/de not_active Expired - Lifetime
1996
- 1996-08-14 US US08/696,738 patent/US5793695A/en not_active Expired - Lifetime
1997
- 1997-08-06 US US08/907,030 patent/US5838629A/en not_active Expired - Lifetime
1998
- 1998-10-09 US US09/168,673 patent/US6044035A/en not_active Expired - Lifetime
1999
- 1999-10-25 US US09/425,291 patent/US6141291A/en not_active Expired - Lifetime
- 1999-12-02 US US09/453,086 patent/US6160752A/en not_active Expired - Lifetime
2000
- 2000-07-17 US US09/618,163 patent/US6269047B1/en not_active Expired - Fee Related

Also Published As

Publication number	Publication date
DE69510834T2 (de)	1999-12-02
US5793695A (en)	1998-08-11
EP0991077A3 (de)	2000-07-05
DE69518343D1 (de)	2000-09-21
DE69509931T2 (de)	1999-10-28
EP0991077A2 (de)	2000-04-05
EP0665556A3 (de)	1995-10-11
DE69526460T2 (de)	2002-11-07
JPH07254275A (ja)	1995-10-03
EP1005046A2 (de)	2000-05-31
EP0991077B1 (de)	2002-04-17
EP0665557A3 (de)	1995-10-11
EP0665557B1 (de)	1999-06-02
US6044035A (en)	2000-03-28
EP0665557A2 (de)	1995-08-02
US6160752A (en)	2000-12-12
EP0665555B1 (de)	1999-07-21
EP0665555A2 (de)	1995-08-02
KR950024217A (ko)	1995-08-21
DE69510834D1 (de)	1999-08-26
CN1117645A (zh)	1996-02-28
EP0665556B1 (de)	2000-08-16
CN1044526C (zh)	1999-08-04
EP1005046A3 (de)	2000-07-05
EP0665556A2 (de)	1995-08-02
DE69518343T2 (de)	2001-02-01
EP0665555A3 (de)	1995-10-11
DE69509931D1 (de)	1999-07-08
US5838629A (en)	1998-11-17
US6141291A (en)	2000-10-31
US6269047B1 (en)	2001-07-31
KR100201723B1 (ko)	1999-06-15
US5825714A (en)	1998-10-20

Publication	Publication Date	Title
DE69526460D1 (de)	2002-05-23	Halbleiterspeicheranordnung
DE69623832D1 (de)	2002-10-31	Halbleiterspeicheranordnung
DE69430683D1 (de)	2002-07-04	Halbleiterspeicheranordnung
DE69521159D1 (de)	2001-07-12	Halbleiterspeicheranordnung
DE69623376D1 (de)	2002-10-10	Halbleiterspeicheranordnung
DE69422901D1 (de)	2000-03-09	Halbleiterspeicheranordnung
DE69603632D1 (de)	1999-09-16	Halbleiter-Speicheranordnung
DE69520902D1 (de)	2001-06-21	Nichtflüchtige Halbleiterspeicheranordnung
DE69620149D1 (de)	2002-05-02	Halbleiteranordnung
DE69512700D1 (de)	1999-11-18	Halbleiterspeicheranordnung
DE69629068D1 (de)	2003-08-21	Halbleiterspeicheranordnung
DE69615783D1 (de)	2001-11-15	Halbleiterspeicheranordnung
DE69331562D1 (de)	2002-03-21	Halbleiterspeicheranordnung
DE69617391D1 (de)	2002-01-10	Halbleiterspeicheranordnung
KR960012510A (ko)	1996-04-20	반도체 메모리 장치
DE69432882D1 (de)	2003-08-07	Halbleiterspeicheranordnung
DE69600591D1 (de)	1998-10-08	Halbleiterspeicheranordnung
DE69525583D1 (de)	2002-04-04	Halbleiterspeicheranordnung
DE69624297D1 (de)	2002-11-21	Halbleiterspeicheranordnung
DE69731015D1 (de)	2004-11-11	Halbleiterspeicheranordnung
DE69530266D1 (de)	2003-05-15	Halbleiterspeicheranordnung
DE69823427D1 (de)	2004-06-03	Halbleiterspeicheranordnung
DE69430944D1 (de)	2002-08-14	Halbleiterspeicheranordnung
DE69534964D1 (de)	2006-06-01	Halbleiterspeicheranordnung
DE69721210D1 (de)	2003-05-28	Halbleiterspeicheranordnung

Legal Events

Date	Code	Title	Description
2003-05-15	8364	No opposition during term of opposition