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DE69721210D1 - Halbleiterspeicheranordnung - Google Patents

Halbleiterspeicheranordnung

Info

Publication number
DE69721210D1
DE69721210D1 DE69721210T DE69721210T DE69721210D1 DE 69721210 D1 DE69721210 D1 DE 69721210D1 DE 69721210 T DE69721210 T DE 69721210T DE 69721210 T DE69721210 T DE 69721210T DE 69721210 D1 DE69721210 D1 DE 69721210D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69721210T
Other languages
English (en)
Other versions
DE69721210T2 (de
Inventor
Yoshiji Ohta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of DE69721210D1 publication Critical patent/DE69721210D1/de
Application granted granted Critical
Publication of DE69721210T2 publication Critical patent/DE69721210T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
DE69721210T 1996-12-25 1997-12-19 Halbleiterspeicheranordnung Expired - Lifetime DE69721210T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP34551796 1996-12-25
JP34551796 1996-12-25
JP6782997 1997-03-21
JP06782997A JP3299910B2 (ja) 1996-12-25 1997-03-21 半導体記憶装置およびその読み出し方法

Publications (2)

Publication Number Publication Date
DE69721210D1 true DE69721210D1 (de) 2003-05-28
DE69721210T2 DE69721210T2 (de) 2004-02-12

Family

ID=26409033

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69721210T Expired - Lifetime DE69721210T2 (de) 1996-12-25 1997-12-19 Halbleiterspeicheranordnung

Country Status (6)

Country Link
US (1) US5917767A (de)
EP (1) EP0851430B1 (de)
JP (1) JP3299910B2 (de)
KR (1) KR100264255B1 (de)
DE (1) DE69721210T2 (de)
TW (1) TW358940B (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3481817B2 (ja) * 1997-04-07 2003-12-22 株式会社東芝 半導体記憶装置
US6134140A (en) 1997-05-14 2000-10-17 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device with soft-programming to adjust erased state of memory cells
JP4550855B2 (ja) * 2000-03-08 2010-09-22 株式会社東芝 不揮発性半導体記憶装置
US6515902B1 (en) * 2001-06-04 2003-02-04 Advanced Micro Devices, Inc. Method and apparatus for boosting bitlines for low VCC read
JP2004310812A (ja) * 2003-04-02 2004-11-04 Renesas Technology Corp 半導体メモリ
US6992939B2 (en) * 2004-01-26 2006-01-31 Micron Technology, Inc. Method and apparatus for identifying short circuits in an integrated circuit device
US7580287B2 (en) 2005-09-01 2009-08-25 Micron Technology, Inc. Program and read trim setting
US20160254060A1 (en) * 2013-03-15 2016-09-01 Taqua Wbh, Llc High Speed And Low Power Sense Amplifier
US10381054B1 (en) 2018-02-27 2019-08-13 Globalfoundries Inc. Common boosted assist
CN113129944A (zh) * 2019-12-31 2021-07-16 台湾积体电路制造股份有限公司 集成电路及其方法
JPWO2023166376A1 (de) * 2022-03-04 2023-09-07
WO2023242668A1 (ja) * 2022-06-16 2023-12-21 株式会社半導体エネルギー研究所 半導体装置、及び記憶装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07235195A (ja) * 1993-06-22 1995-09-05 Youzan:Kk メモリ回路
JPH0757466A (ja) * 1993-08-12 1995-03-03 Toshiba Corp 半導体集積回路
JP3476952B2 (ja) * 1994-03-15 2003-12-10 株式会社東芝 不揮発性半導体記憶装置
EP0724266B1 (de) * 1995-01-27 2001-12-12 STMicroelectronics S.r.l. Schnittweises Annäherungsverfahren zum Abtasten von nichtflüchtigen Mehrfachniveauspeicherzellen und dementsprechende Abtastschaltung
JPH0935474A (ja) * 1995-07-19 1997-02-07 Fujitsu Ltd 半導体記憶装置

Also Published As

Publication number Publication date
KR100264255B1 (ko) 2000-08-16
US5917767A (en) 1999-06-29
EP0851430B1 (de) 2003-04-23
EP0851430A2 (de) 1998-07-01
DE69721210T2 (de) 2004-02-12
TW358940B (en) 1999-05-21
KR19980064537A (ko) 1998-10-07
JP3299910B2 (ja) 2002-07-08
EP0851430A3 (de) 1999-05-26
JPH10241386A (ja) 1998-09-11

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