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research-article

Reproducible Evaluation of System Efficiency With a Model of Architecture: From Theory to Practice

Authors:

Alexandre Mercat,

Jean-Francois Nezan,

Wassim Hamidouche,

Shuvra S. BhattacharyyaAuthors Info & Claims

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 37, Issue 10

Pages 2050 - 2063

https://doi.org/10.1109/TCAD.2017.2774822

Published: 01 October 2018 Publication History

Abstract

Current trends in high performance and embedded computing include design of increasingly complex hardware architectures with high parallelism, heterogeneous processing elements, and nonuniform communication resources. In order to take hardware and software design decisions, early evaluations of the system nonfunctional properties are needed. These evaluations of system efficiency require electronic system-level information on both algorithms and architecture. Contrary to algorithm models for which a major body of work has been conducted on defining formal models of computation (MoCs), architecture models from the literature are mostly empirical models from which reproducible experimentation requires the accompanying software. In this paper, a precise definition of a model of architecture (MoA) is proposed that focuses on reproducibility and abstraction and removes the overlap previously existing between the notions of MoA and MoC. A first MoA, called the linear system-level architecture model (LSLA), is presented. To demonstrate the generic nature of the proposed new architecture modeling concepts, we show that the LSLA model can be integrated flexibly with different MoCs. LSLA is then used to model the energy consumption of a state-of-the-art multiprocessor system-on-chip (MPSoC) when running an application described using the synchronous dataflow MoC. A method to automatically learn LSLA model parameters from platform measurements is introduced. Despite the high complexity of the underlying hardware and software, a simple LSLA model is demonstrated to estimate the energy consumption of the MPSoC with a fidelity of 86%.

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Cited By

Carballo-Hernández WPelcat MBhattacharyya SGalán RBerry F(2023)Flydeling: Streamlined Performance Models for Hardware Acceleration of CNNs through System IdentificationACM Transactions on Modeling and Performance Evaluation of Computing Systems10.1145/35948708:3(1-33)Online publication date: 18-Jul-2023
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Zhang SWang SBai GZhang MChen PZhao CLi SZhou J(2022)Design of Threat Response Modeling Language for Attacker Profile Based on Probability DistributionWireless Communications & Mobile Computing10.1155/2022/23232282022Online publication date: 1-Jan-2022
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Rubattu CPalumbo FBhattacharyya SPelcat M(2022)PathTracer: Understanding Response Time of Signal Processing Applications on Heterogeneous MPSoCsACM Transactions on Modeling and Performance Evaluation of Computing Systems10.1145/35130036:4(1-30)Online publication date: 1-Apr-2022
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Reproducible Evaluation of System Efficiency With a Model of Architecture: From Theory to Practice
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cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Volume 37, Issue 10

October 2018

270 pages

ISSN:0278-0070

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Copyright © 2018.

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IEEE Press

Publication History

Published: 01 October 2018

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Cited By

Carballo-Hernández WPelcat MBhattacharyya SGalán RBerry F(2023)Flydeling: Streamlined Performance Models for Hardware Acceleration of CNNs through System IdentificationACM Transactions on Modeling and Performance Evaluation of Computing Systems10.1145/35948708:3(1-33)Online publication date: 18-Jul-2023
https://dl.acm.org/doi/10.1145/3594870
Zhang SWang SBai GZhang MChen PZhao CLi SZhou J(2022)Design of Threat Response Modeling Language for Attacker Profile Based on Probability DistributionWireless Communications & Mobile Computing10.1155/2022/23232282022Online publication date: 1-Jan-2022
https://dl.acm.org/doi/10.1155/2022/2323228
Rubattu CPalumbo FBhattacharyya SPelcat M(2022)PathTracer: Understanding Response Time of Signal Processing Applications on Heterogeneous MPSoCsACM Transactions on Modeling and Performance Evaluation of Computing Systems10.1145/35130036:4(1-30)Online publication date: 1-Apr-2022
https://dl.acm.org/doi/10.1145/3513003
Rubattu CPalumbo FBhattacharyya SPelcat M(2021)PathTracing: Raising the Level of Understanding of Processing Latency in Heterogeneous MPSoCsProceedings of the 2021 Drone Systems Engineering and Rapid Simulation and Performance Evaluation: Methods and Tools Proceedings10.1145/3444950.3447282(46-50)Online publication date: 18-Jan-2021
https://dl.acm.org/doi/10.1145/3444950.3447282
Voas J(2020)The "Patching" MentalityComputer10.1109/MC.2020.299127753:7(12-13)Online publication date: 1-Jul-2020
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Laplante P(2020)Contactless U: Higher Education in the Postcoronavirus WorldComputer10.1109/MC.2020.299036053:7(76-79)Online publication date: 30-Jun-2020
https://dl.acm.org/doi/10.1109/MC.2020.2990360
Bhattacharyya SWolf M(2020)Research Challenges for Heterogeneous Cyberphysical System DesignComputer10.1109/MC.2020.298895353:7(71-75)Online publication date: 1-Jul-2020
https://dl.acm.org/doi/10.1109/MC.2020.2988953
(2020)Computer Highlights Society MagazinesComputer10.1109/MC.2020.298487253:7(4-6)Online publication date: 30-Jun-2020
https://dl.acm.org/doi/10.1109/MC.2020.2984872
Palumbo FFanni TSau CRodríguez AMadroñal DDesnos KMorvan APelcat MRubattu CLazcano RRaffo Lde la Torre EJuárez ESanz CSánchez de Rojas P(2019)Hardware/Software Self-adaptation in CPS: The CERBERO Project ApproachEmbedded Computer Systems: Architectures, Modeling, and Simulation10.1007/978-3-030-27562-4_30(416-428)Online publication date: 7-Jul-2019
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