Article

Evaluating fault coverage of bulk built-in current sensor for soft errors in combinational and sequential logic

Authors:

Fernanda Lima KastensmidtAuthors Info & Claims

SBCCI '05: Proceedings of the 18th annual symposium on Integrated circuits and system design

Pages 62 - 67

https://doi.org/10.1145/1081081.1081103

Published: 04 September 2005 Publication History

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Abstract

In this paper, we propose a new approach for using Built-in Current Sensor (BICS) to detect not only transient upsets in sequential logic but also in combinational circuits. In this approach, the BICS is connected in the design bulk to increase its sensitivity to detect any current discrepancy that may occur during a charged particle strike. In addition, the proposed BICS can inform if the upset has occurred in the PMOS or NMOS transistors, which can generate a more precise evaluation of the corrupted region. The proposed approach was validated by Spice simulation. The BICS and the case-studied circuits were designed in the 100nm CMOS technology. The bulk BIC sensor detects various shapes of current pulses generated due to charged particle strike. Results show that the proposed bulk BICS presents minor penalties for the design in terms of area, performance and power consumption and it has high detection sensitivity.

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Cited By

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Bastos RTorres FBastos RTorres F(2019)Body Built-In Sensors for Testing Integrated Circuit Systems for Hardware TrojansOn-Chip Current Sensors for Reliable, Secure, and Low-Power Integrated Circuits10.1007/978-3-030-29353-6_8(133-143)Online publication date: 1-Oct-2019
https://doi.org/10.1007/978-3-030-29353-6_8
Bastos RTorres FBastos RTorres F(2019)Architectures of Body Built-In Current Sensors for Detection of Transient FaultsOn-Chip Current Sensors for Reliable, Secure, and Low-Power Integrated Circuits10.1007/978-3-030-29353-6_3(29-53)Online publication date: 1-Oct-2019
https://doi.org/10.1007/978-3-030-29353-6_3
Sharma VRajawat A(2018)Review of Approaches for Radiation Hardened Combinational Logic in CMOS Silicon TechnologyIETE Technical Review10.1080/02564602.2017.1343689(1-12)Online publication date: 21-Jun-2018
https://doi.org/10.1080/02564602.2017.1343689
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Index Terms

Evaluating fault coverage of bulk built-in current sensor for soft errors in combinational and sequential logic
1. Hardware
  1. Hardware test
  2. Robustness

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Information & Contributors

Information

Published In

SBCCI '05: Proceedings of the 18th annual symposium on Integrated circuits and system design

September 2005

271 pages

ISBN:1595931740

DOI:10.1145/1081081

General Chair:
Carlos Galup-Montoro
Federal University of Santa Catarina, Brazil
,
Program Chairs:
Sergio Bampi
Federal University of Rio Grande do Sul, Brazil
,
Alex Orailoglu
University of California, San Diego, CA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 04 September 2005

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SBCCI05

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SBCCI05: 18th Symposium on Integrated Circuits and System Design

September 4 - 7, 2005

Florianolpolis, Brazil

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Overall Acceptance Rate 133 of 347 submissions, 38%

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Cited By

View all

Bastos RTorres FBastos RTorres F(2019)Body Built-In Sensors for Testing Integrated Circuit Systems for Hardware TrojansOn-Chip Current Sensors for Reliable, Secure, and Low-Power Integrated Circuits10.1007/978-3-030-29353-6_8(133-143)Online publication date: 1-Oct-2019
https://doi.org/10.1007/978-3-030-29353-6_8
Bastos RTorres FBastos RTorres F(2019)Architectures of Body Built-In Current Sensors for Detection of Transient FaultsOn-Chip Current Sensors for Reliable, Secure, and Low-Power Integrated Circuits10.1007/978-3-030-29353-6_3(29-53)Online publication date: 1-Oct-2019
https://doi.org/10.1007/978-3-030-29353-6_3
Sharma VRajawat A(2018)Review of Approaches for Radiation Hardened Combinational Logic in CMOS Silicon TechnologyIETE Technical Review10.1080/02564602.2017.1343689(1-12)Online publication date: 21-Jun-2018
https://doi.org/10.1080/02564602.2017.1343689
Possamai Bastos RGuimares LSill Torres FFesquet L(2018)Architectures of bulk built-in current sensors for detection of transient faults in integrated circuitsMicroelectronics Journal10.1016/j.mejo.2017.11.00671:C(70-79)Online publication date: 1-Jan-2018
https://dl.acm.org/doi/10.1016/j.mejo.2017.11.006
Bastos RDutertre JTorres F(2014)Comparison of bulk built-in current sensors in terms of transient-fault detection sensitivity2014 5th European Workshop on CMOS Variability (VARI)10.1109/VARI.2014.6957089(1-6)Online publication date: Sep-2014
https://doi.org/10.1109/VARI.2014.6957089
Lanot ABalen T(2014)Fault mitigation strategies for Single Event Transients on SAR converters19th Annual International Mixed-Signals, Sensors, and Systems Test Workshop Proceedings10.1109/IMS3TW.2014.6997395(1-6)Online publication date: Sep-2014
https://doi.org/10.1109/IMS3TW.2014.6997395
Furuta JYamamoto RKobayashi KOnodera H(2013)Effects of Neutron-Induced Well Potential Perturbation for Multiple Cell Upset of Flip-Flops in 65 nmIEEE Transactions on Nuclear Science10.1109/TNS.2012.222971860:1(213-218)Online publication date: Feb-2013
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Bastos RTorres FDutertre JFlottes MDi Natale GRouzeyre B(2013)A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)10.1109/PATMOS.2013.6662169(157-163)Online publication date: Sep-2013
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Bastos RTorres FDutertre JFlottes MDi Natale GRouzeyre B(2013)A bulk built-in sensor for detection of fault attacks2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)10.1109/HST.2013.6581565(51-54)Online publication date: Jun-2013
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Furuta JYamamoto RKobayashi KOnodera H(2011)Correlations between well potential and SEUs measured by well-potential perturbation detectors in 65nmIEEE Asian Solid-State Circuits Conference 201110.1109/ASSCC.2011.6123639(209-212)Online publication date: Nov-2011
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