Cited By
View all- Velamala JLiVolsi RTorres MCao YStok LDutt NHassoun S(2011)Design sensitivity of single event transients in scaled logic circuitsProceedings of the 48th Design Automation Conference10.1145/2024724.2024881(694-699)Online publication date: 5-Jun-2011
- Shazli STahoori MLombardi FBhanja SMassoud YBahar R(2009)Soft error rate computation in early design stages using boolean satisfiabilityProceedings of the 19th ACM Great Lakes symposium on VLSI10.1145/1531542.1531568(101-104)Online publication date: 10-May-2009
- Petroli LLisboa CKastensmidt FCarro L(2008)Majority Logic Mapping for Soft Error DependabilityJournal of Electronic Testing: Theory and Applications10.1007/s10836-007-5044-024:1-3(83-92)Online publication date: 1-Jun-2008
- Show More Cited By