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An Efficient BICS Design for SEUs Detection and Correction in Semiconductor Memories

Published: 07 March 2005 Publication History

Abstract

In this paper we propose a new Built in Current Sensor (BICS) to detect single event upsets in SRAM. The BICS is designed and validated for 100nm process technology. The BICS reliability analysis for process, voltage, temperature, and power supply noise are provided. This BICS detect various shapes of current pulses generated due to particle strike. The BICS power consumption and area overhead are also provided. This BICS found to be very reliable for process, voltage and temperature variation and under stringent noise conditions.

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Cited By

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  • (2018)Architectures of bulk built-in current sensors for detection of transient faults in integrated circuitsMicroelectronics Journal10.1016/j.mejo.2017.11.00671:C(70-79)Online publication date: 1-Jan-2018
  • (2016)Low-cost soft error resilience with unified data verification and fine-grained recovery for acoustic sensor based detectionThe 49th Annual IEEE/ACM International Symposium on Microarchitecture10.5555/3195638.3195668(1-12)Online publication date: 15-Oct-2016
  • (2014)Avoiding core's DUE & SDC via acoustic wave detectors and tailored error containment and recoveryProceeding of the 41st annual international symposium on Computer architecuture10.5555/2665671.2665682(37-48)Online publication date: 14-Jun-2014
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        cover image ACM Conferences
        DATE '05: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
        March 2005
        630 pages
        ISBN:0769522882

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        Published: 07 March 2005

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        View all
        • (2018)Architectures of bulk built-in current sensors for detection of transient faults in integrated circuitsMicroelectronics Journal10.1016/j.mejo.2017.11.00671:C(70-79)Online publication date: 1-Jan-2018
        • (2016)Low-cost soft error resilience with unified data verification and fine-grained recovery for acoustic sensor based detectionThe 49th Annual IEEE/ACM International Symposium on Microarchitecture10.5555/3195638.3195668(1-12)Online publication date: 15-Oct-2016
        • (2014)Avoiding core's DUE & SDC via acoustic wave detectors and tailored error containment and recoveryProceeding of the 41st annual international symposium on Computer architecuture10.5555/2665671.2665682(37-48)Online publication date: 14-Jun-2014
        • (2014)Avoiding core's DUE & SDC via acoustic wave detectors and tailored error containment and recoveryACM SIGARCH Computer Architecture News10.1145/2678373.266568242:3(37-48)Online publication date: 14-Jun-2014
        • (2010)Reliability analysis of memories protected with BICS and a per-word parity bitACM Transactions on Design Automation of Electronic Systems10.1145/1698759.169876815:2(1-15)Online publication date: 2-Mar-2010
        • (2009)Efficient error detection codes for multiple-bit upset correction in SRAMs with BICSACM Transactions on Design Automation of Electronic Systems10.1145/1455229.145524714:1(1-10)Online publication date: 23-Jan-2009
        • (2009)Circuit-level design approaches for radiation-hard digital electronicsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.200679517:6(781-792)Online publication date: 1-Jun-2009
        • (2008)A delay-efficient radiation-hard digital design approach using CWSP elementsProceedings of the conference on Design, automation and test in Europe10.1145/1403375.1403460(354-359)Online publication date: 10-Mar-2008
        • (2006)A design approach for radiation-hard digital electronicsProceedings of the 43rd annual Design Automation Conference10.1145/1146909.1147105(773-778)Online publication date: 24-Jul-2006
        • (2006)Using Bulk Built-in Current Sensors to Detect Soft ErrorsIEEE Micro10.1109/MM.2006.10326:5(10-18)Online publication date: 1-Sep-2006
        • Show More Cited By

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