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Sukanta Dey
Person information
- affiliation: Indian Institute of Technology Guwahati, India
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2020 – today
- 2022
- [i2]Sukanta Dey, Jungmin Park, Nitin Pundir, Dipayan Saha
, Amit Mazumder Shuvo, Dhwani Mehta, Navid Asadi, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
Secure Physical Design. IACR Cryptol. ePrint Arch. 2022: 891 (2022) - 2021
- [j3]Sukanta Dey
PGOpt: Multi-objective design space exploration framework for large-Scale on-chip power grid design in VLSI SoC using evolutionary computing technique. Microprocess. Microsystems 81: 103440 (2021) - [c9]Sukanta Dey
Machine Learning for VLSI CAD: A Case Study in On-Chip Power Grid Design. ISVLSI 2021: 378-383 - 2020
- [j2]Sukanta Dey
Machine Learning Approach for Fast Electromigration Aware Aging Prediction in Incremental Design of Large Scale On-chip Power Grid Network. ACM Trans. Design Autom. Electr. Syst. 25(5): 42:1-42:29 (2020) - [c8]Sukanta Dey
PowerPlanningDL: Reliability-Aware Framework for On-Chip Power Grid Design using Deep Learning. DATE 2020: 1520-1525 - [c7]Sukanta Dey
ReFIT: Reliability Challenges and Failure Rate Mitigation Techniques for IoT Systems. I4CS 2020: 123-142 - [c6]Pradeepkumar Bhale
Energy Efficient Approach to Detect Sinkhole Attack Using Roving IDS in 6LoWPAN Network. I4CS 2020: 187-207 - [p2]Sukanta Dey
PGRDP: Reliability, Delay, and Power-Aware Area Minimization of Large-Scale VLSI Power Grid Network Using Cooperative Coevolution. Intelligent Computing Paradigm 2020: 69-84 - [i1]Sukanta Dey
PowerPlanningDL: Reliability-Aware Framework for On-Chip Power Grid Design using Deep Learning. CoRR abs/2005.01386 (2020)
2010 – 2019
- 2019
- [c5]Pranav Kumar Singh
JSpongeGen: A Pseudo Random Generator for Low Resource Devices. ICDCIT 2019: 410-421 - [c4]Satyabrata Dash, Sukanta Dey
RiverOpt: A Multiobjective Optimization Framework Based on Modified River Formation Dynamics Heuristic. VLSID 2019: 233-238 - [p1]Satyabrata Dash, Deepak Joshi, Sukanta Dey
StormOptimus: A Single Objective Constrained Optimizer Based on Brainstorming Process for VLSI Circuits. Brain Storm Optimization Algorithms 2019: 221-243 - 2018
- [j1]Satyabrata Dash, Sukanta Dey
Minimizing area of VLSI power distribution networks using river formation dynamics. J. Syst. Inf. Technol. 20(4): 417-429 (2018) - [c3]Sukanta Dey
EvadePDF: Towards Evading Machine Learning Based PDF Malware Classifiers. ISEA-ISAP 2018: 140-150 - [c2]Sukanta Dey
PGIREM: Reliability-Constrained IR Drop Minimization and Electromigration Assessment of VLSI Power Grid Networks Using Cooperative Coevolution. ISVLSI 2018: 40-45 - 2017
- [c1]Sukanta Dey
Markov Chain Model Using Lévy Flight for VLSI Power Grid Analysis. VLSID 2017: 107-112
Coauthor Index
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