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Jungmin Park
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2020 – today
- 2024
- [j13]Jungmin Park, Younghoon Lee:
Key attribute generation from review texts based on in-context learning for recommender systems. Appl. Intell. 54(20): 10194-10205 (2024) - [j12]Jungmin Park, Younghoon Lee:
Advanced pseudo-labeling approach in mixing-based text data augmentation method. Pattern Anal. Appl. 27(4): 129 (2024) - [c17]Wontaeck Jung, Hyunggon Kim, Do-Bin Kim, Tae-Hyun Kim, Nam-Hee Lee, Dongjin Shin, Minyoung Kim, Youngsik Rho, Hun-Jong Lee, Yujin Hyun, Jaeyoung Park, Taekyung Kim, Hwiwon Kim, Gyeongwon Lee, Jisang Lee, Joonsuc Jang, Jungmin Park, Sion Kim, Su Chang Jeon, Suyong Kim, Jung-Ho Song, Min-Seok Kim, Taesung Lee, Byung-Kwan Chun, Tongsung Kim, Young Gyu Lee, Hokil Lee, Soowoong Lee, Hwaseok Lee, Dooho Cho, Sangwan Nam, Yeomyung Kim, Kunyong Yoon, Yoonjae Lee, Sunghoon Kim, Jungseok Hwang, Raehyun Song, Hyunsik Jang, Jae-Ick Son, Hongsoo Jeon, Myunghun Lee, Mookyung Lee, Kisung Kim, Eungsuk Lee, Myeong-Woo Lee, Sungkyu Jo, Chan Ho Kim, Jong Chul Park, Kyunghwa Yun, Soonock Seol, Ji-Ho Cho, Seungjae Lee, Jin-Yub Lee, Sunghoi Hur:
13.3 A 280-Layer 1Tb 4b/cell 3D-NAND Flash Memory with a 28.5Gb/mm2 Areal Density and a 3.2GB/s High-Speed IO Rate. ISSCC 2024: 236-237 - 2023
- [j11]Min Seok Lee, Jungmin Park, Chan Gook Park:
Center-of-Rotation-Augmented Kalman Filter for Adaptive Attitude Reference System. IEEE Access 11: 55844-55860 (2023) - [c16]Yunkai Bai, Jungmin Park, Mark M. Tehranipoor, Domenic Forte:
Dual Channel EM/Power Attack Using Mutual Information and its Real-time Implementation. HOST 2023: 133-143 - [c15]Jaehun Jeong, Sanghyeon Lee, Sada-Aki Masuoka, Shincheol Min, Sanghoon Lee, Seungkwon Kim, Taehun Myung, Byungha Choi, Chang-Woo Sohn, Sung Won Kim, Jeongmin Choi, Jungmin Park, Hyungjong Lee, Taeyoung Kim, Seokhoon Kim, Yuri Yasuda-Masuoka, Ja-Hum Ku, Gitae Jeong:
World's First GAA 3nm Foundry platform Technology (SF3) with Novel Multi-Bridge-Channel-FET (MBCFET™) Process. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j10]Yunkai Bai, Jungmin Park, Mark M. Tehranipoor, Domenic Forte:
Real-time instruction-level verification of remote IoT/CPS devices via side channels. Discov. Internet Things 2(1) (2022) - [j9]Yunkai Bai, Andrew Stern, Jungmin Park, Mark M. Tehranipoor, Domenic Forte:
RASCv2: Enabling Remote Access to Side-Channels for Mission Critical and IoT Systems. ACM Trans. Design Autom. Electr. Syst. 27(6): 65:1-65:25 (2022) - [j8]Nitin Pundir, Jungmin Park, Farimah Farahmandi, Mark M. Tehranipoor:
Power Side-Channel Leakage Assessment Framework at Register-Transfer Level. IEEE Trans. Very Large Scale Integr. Syst. 30(9): 1207-1218 (2022) - [c14]Amit Mazumder Shuvo, Nitin Pundir, Jungmin Park, Farimah Farahmandi, Mark M. Tehranipoor:
LDTFI: Layout-aware Timing Fault-Injection Attack Assessment Against Differential Fault Analysis. ISVLSI 2022: 134-139 - [i3]Jungmin Park, N. Nalla Anandakumar, Dipayan Saha, Dhwani Mehta, Nitin Pundir, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
PQC-SEP: Power Side-channel Evaluation Platform for Post-Quantum Cryptography Algorithms. IACR Cryptol. ePrint Arch. 2022: 527 (2022) - [i2]Sukanta Dey, Jungmin Park, Nitin Pundir, Dipayan Saha, Amit Mazumder Shuvo, Dhwani Mehta, Navid Asadi, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
Secure Physical Design. IACR Cryptol. ePrint Arch. 2022: 891 (2022) - 2021
- [c13]Tao Zhang, Jungmin Park, Mark M. Tehranipoor, Farimah Farahmandi:
PSC-TG: RTL Power Side-Channel Leakage Assessment with Test Pattern Generation. DAC 2021: 709-714 - 2020
- [j7]Jungmin Park, Fahim Rahman, Apostol Vassilev, Domenic Forte, Mark M. Tehranipoor:
Leveraging Side-Channel Information for Disassembly and Security. ACM J. Emerg. Technol. Comput. Syst. 16(1): 6:1-6:21 (2020) - [j6]Younghoon Lee, Jungmin Park, Sungzoon Cho:
Extraction and prioritization of product attributes using an explainable neural network. Pattern Anal. Appl. 23(4): 1767-1777 (2020) - [j5]Jungmin Park, Yong-gonjong Park, Chan Gook Park:
Parameter Estimation of Radar Noise Model for Terrain Referenced Navigation Using a New EM Initialization Method. IEEE Trans. Aerosp. Electron. Syst. 56(1): 107-112 (2020) - [j4]Soyoung Park, Jungmin Park, Chan Gook Park:
Adaptive Attitude Estimation for Low-Cost MEMS IMU Using Ellipsoidal Method. IEEE Trans. Instrum. Meas. 69(9): 7082-7091 (2020) - [j3]Adib Nahiyan, Jungmin Park, Miao Tony He, Yousef Iskander, Farimah Farahmandi, Domenic Forte, Mark M. Tehranipoor:
SCRIPT: A CAD Framework for Power Side-channel Vulnerability Assessment Using Information Flow Tracking and Pattern Generation. ACM Trans. Design Autom. Electr. Syst. 25(3): 26:1-26:27 (2020) - [j2]Jungmin Park, Seongjoon Cho, Taejin Lim, Mark M. Tehranipoor:
QEC: A Quantum Entropy Chip and Its Applications. IEEE Trans. Very Large Scale Integr. Syst. 28(6): 1471-1484 (2020) - [c12]Doo-Hyun Kim, Hyunggon Kim, Sung-Won Yun, Youngsun Song, Jisu Kim, Sung-Min Joe, Kyung-Hwa Kang, Joonsuc Jang, Hyun-Jun Yoon, Kangbin Lee, Minseok Kim, Joonsoo Kwon, Jonghoo Jo, Sehwan Park, Jiyoon Park, Jisoo Cho, Sohyun Park, Garam Kim, Jinbae Bang, Heejin Kim, Jongeun Park, Deokwoo Lee, Seonyong Lee, Hwajun Jang, Hanjun Lee, Donghyun Shin, Jungmin Park, Jungkwan Kim, Jongmin Kim, Kichang Jang, II Han Park, Seung Hyun Moon, Myung-Hoon Choi, Pansuk Kwak, Joo-Yong Park, Youngdon Choi, Sanglok Kim, Seungjae Lee, Dongku Kang, Jeong-Don Lim, Dae-Seok Byeon, Ki-Whan Song, Jung-Hwan Choi, Sangjoon Hwang, Jaeheon Jeong:
13.1 A 1Tb 4b/cell NAND Flash Memory with tPROG=2ms, tR=110µs and 1.2Gb/s High-Speed IO Rate. ISSCC 2020: 218-220
2010 – 2019
- 2019
- [c11]Jungmin Park, Seongjoon Cho, Taejin Lim, Swarup Bhunia, Mark M. Tehranipoor:
SCR-QRNG: Side-Channel Resistant Design using Quantum Random Number Generator. ICCAD 2019: 1-8 - [c10]Miao Tony He, Jungmin Park, Adib Nahiyan, Apostol Vassilev, Yier Jin, Mark M. Tehranipoor:
RTL-PSC: Automated Power Side-Channel Leakage Assessment at Register-Transfer Level. VTS 2019: 1-6 - [i1]Miao Tony He, Jungmin Park, Adib Nahiyan, Apostol Vassilev, Yier Jin, Mark M. Tehranipoor:
RTL-PSC: Automated Power Side-Channel Leakage Assessment at Register-Transfer Level. CoRR abs/1901.05909 (2019) - 2018
- [c9]Jungmin Park, Xiaolin Xu, Yier Jin, Domenic Forte, Mark M. Tehranipoor:
Power-based side-channel instruction-level disassembler. DAC 2018: 119:1-119:6 - [c8]Kai Yang, Jungmin Park, Mark M. Tehranipoor, Swarup Bhunia:
Hardware virtualization for protection against power analysis attack. HOST 2018: 167-172 - [c7]Kai Yang, Jungmin Park, Mark M. Tehranipoor, Swarup Bhunia:
Robust Timing Attack Countermeasure on Virtual Hardware. ISVLSI 2018: 148-153 - 2017
- [j1]Jungmin Park, Akhilesh Tyagi:
Using Power Clues to Hack IoT Devices: The power side channel provides for instruction-level disassembly. IEEE Consumer Electron. Mag. 6(3): 92-102 (2017) - [c6]Jungmin Park, Massimiliano Corba, Antonio E. de la Sema, Richard L. Vigeant, Mark M. Tehranipoor, Swarup Bhunia:
ATAVE: A framework for automatic timing attack vulnerability evaluation. MWSCAS 2017: 559-562 - 2016
- [c5]Jungmin Park, Akhilesh Tyagi:
Security Metrics for Power Based SCA Resistant Hardware Implementation. VLSID 2016: 541-546 - 2014
- [c4]Jungmin Park, Akhilesh Tyagi:
Towards Making Private Circuits Practical: DPA Resistant Private Circuits. ISVLSI 2014: 528-533 - [c3]Jungmin Park, Akhilesh Tyagi:
t-Private Systems: Unified Private Memories and Computation. SPACE 2014: 285-302 - 2012
- [c2]Jungmin Park, Akhilesh Tyagi:
t-Private logic synthesis on FPGAs. HOST 2012: 63-68 - 2011
- [c1]Jungmin Park, Sung-Hwa Hong, Ingeol Chun:
Approach to Generating Monitoring Code toward Advanced Self-healing. FGIT-CA/CES3 2011: 138-148
Coauthor Index
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