WO2018010185A1

WO2018010185A1 - Dynamic equalization circuit of battery management system, and dynamic equalization method therefor

Info

Publication number: WO2018010185A1
Application number: PCT/CN2016/090230
Authority: WO
Inventors: 张志国; 胡运平; 张泱渊; 仝瑞军
Original assignee: 深圳市科列技术股份有限公司
Priority date: 2016-07-15
Filing date: 2016-07-15
Publication date: 2018-01-18
Also published as: CN106471699A; CN106471699B

Abstract

A dynamic equalization circuit of a battery management system, and a dynamic equalization method therefor. In the circuit, the first cell or the last cell in a group of cells connected in series is connected to a corresponding cell selection switch and a corresponding voltage sample switch by means of a sample wire and an equalization wire separated from each other, respectively; each of the remaining cells is connected to a corresponding cell selection switch and a corresponding voltage sample switch by means of a same wire; during normal operation, and on the basis of impedance values of the sample wires calculated according to a equalization test current condition, a CPU measures sample voltages of the cells and calculates the actual cell voltages by eliminating voltage drops on the wires from the sample voltages, and then performs dynamic equalization control according to the actual cell voltages. The present invention greatly reduces required wire harness cost, and can meet real-time cell voltage sample requirements while equalizing cells, prevent the sample precision from being affected by voltage drops on equalization wires, and make the cell voltage sample correct.

Description

Dynamic equalization circuit of battery management system and dynamic equalization method thereof

Technical field

The invention relates to a dynamic equalization circuit of a battery management system and a dynamic equalization method thereof.

Background technique

When a new type of battery such as a lithium-ion battery is used in series, in order to ensure the safe use of the battery, it is generally necessary to configure a battery management system (BMS). The role of BMS is mainly used to detect the voltage of the battery cells in real time. If the voltages of the individual cells in the series battery are inconsistent, it needs to be equalized. The equalization function refers to the voltage and capacity of the BMS and the charging and charging of each cell in the battery. A function in which the discharge characteristics tend to be uniform. There are two common methods: energy dissipative one-way equalization and energy transfer type bidirectional equalization.

Energy dissipative type unidirectional equalization: refers to a discharge resistor that can be switched in parallel on each string of batteries. BMS controls the discharge resistor to discharge the higher voltage unit, and the electric energy is dissipated as heat; this way can only be The high-voltage single-cell discharge cannot replenish the low-capacity monomer.

Energy transfer type bidirectional equalization: Controls a bidirectional high-frequency switching power converter inside the BMS, discharges the battery with higher voltage, and the energy released is used to charge the lower voltage monomer. The energy is mainly transferred rather than consumed. Dispersion, less energy loss, through the "cut high and low", energy transfer method to effectively compensate for battery differences. This method of transferring the excess amount to the high-energy cell, and transferring the excess energy of the discharge to the low-energy cell is called active equalization technology, and the energy transfer type bidirectional equalization method can minimize the loss and improve the energy efficiency management.

The energy transfer type bidirectional equalization can dynamically charge and discharge the voltage of each individual in real time, and the energy bidirectional transfer type active equalization "cutting high and low" realizes the static and dynamic consistency of the battery, and effectively prolongs the service life of the power battery.

The basic principle diagram of the energy transfer type bidirectional equalization circuit is shown in FIG. 1 , which includes a bidirectional DC/DC connected in series between the external power source and the sequentially connected single cells B1 B B4 (Direct Current, abbreviated as The DC) converter, the polarity commutator, and the battery selection switches K1 to K5 for controlling the gate cells of the corresponding single cells are one more than the number of cells of the batteries B1 to B4 which are sequentially connected in series, and include the connection. The number of successively cascaded switches between the serially connected single cells B1 to B4 and the A/D port of the CPU is equal to the number of battery selection switches for control selection. The voltage sampling switches S1 to S5 of the corresponding single cells, and the analog/digital (Analog/Digital, A/D) converter, one end of the odd number of battery selection switches K1, K3, K5 and the pole The negative output end of the commutator is the negative aggregate bus connection, and one end of the even number of battery selection switches K2 and K4 is connected with the positive output terminal of the polarity commutator, that is, the odd number of battery selection switches K1. The other end of K3 and K5 is connected to the positive pole of a single battery, and the other end of the even number of battery selection switches K2 and K4 with an odd number of one is connected to the negative pole of a single battery, and the odd number of voltage sampling switches S1 and S3 One end of S5 is connected to the positive input end of the A/D converter, and one end of the even number of voltage sampling switches S2 and S4 is connected to the negative input end of the A/D converter, and the odd number of voltage sampling switches S1 The other end of the S3, S5 is connected to the positive pole of a single battery, and the other end of the even number of voltage sampling switches S2 and S4 adjacent to the odd one is connected to the negative pole of the same single cell, the battery selection switch K1 ～K5 and the voltage sampling switches S1 S S5 are provided with embedded CPU control software for centralized control.

The dynamic equalization method includes the following steps:

1) detecting, by the embedded control software, the voltage of each of the cells B1 to B4 connected in series;

2) The bit number of the single battery that is judged to be too low or too high by the CPU to be charged or discharged separately;

3) The CPU issues a control command to control the corresponding voltage sampling switches S1 to S5, and sequentially selects each single cell to be connected to the input port of the A/D converter, and after the A/D conversion, the port A of the CPU /D port A/D1 sequentially collects the voltage parameters of each single cell. When the CPU detects that a certain cell voltage is inconsistent with the voltage of other single cells, the CPU starts the balanced battery management and controls the gating. Two adjacent ones of the battery selection switches K1 to K5 are closed, and the cells with inconsistent voltages are connected to the polarity commutator for polarity matching, and then transmitted to the bidirectional DC-DC converter. The CPU controls the working direction of the bidirectional DC/DC converter, and the single battery that needs to be charged or discharged separately is connected to the positive collecting bus and the negative collecting bus to be charged or discharged to realize energy transfer;

4) Steps 1) to 3) are repeated until the voltage of each of the cells B1 to B4 connected in series is within a set allowable error range, and the battery energy dynamic balance is achieved.

In order to realize the real-time sampling and active equalization functions of the module, there are two design schemes for the sampling and equalization lines: the sampling and equalization lines are separated separately, or the sampling lines and the equalization lines are collinear.

1. Individual sampling and equalization lines are separated separately

The scheme of independent sampling and equalization of separate lines is shown in Figures 2a and 2b. During normal operation, the CPU sequentially controls the switches S1 to S5 (S1 to S5 are generally high-speed signal electronic switches), which are sequentially selected. Select each battery to the input port of the AD converter. After AD conversion, the CPU can get the voltage parameters of each battery in turn. If the CPU finds that one battery voltage is inconsistent with other battery cells by comparison, it will Controlling that two adjacent switches in K1 to K5 (K1 to K5 are generally high current power switches) are closed, and the cells with inconsistent voltages are connected to the commutator (because the odd and even voltages have opposite polarities, Polarity commutation is required. After the commutator, the battery cells with inconsistent voltages are connected to the bidirectional DC-DC, and the CPU controls the bidirectional DC-DC to charge or discharge the battery. In the equalization process, The CPU continuously monitors the battery cell voltage through the S1 to S5 switches and the AD converter, and stops equalization once the voltage is found to be required.

Since the sampling and equalization use independent lines, the voltage drop on the equalization line during the equalization process does not affect the sampling accuracy problem, while ensuring real-time sampling, but the cost of the solution harness is at least twice that of the passive equalization mode.

2. Single sampling and equalization collinear scheme

The single sampling and equalization collinear scheme is shown in Figures 3a and 3b. In this mode of equalization, at the time of equalization, because of the voltage drop across the wiring harness, the cell voltage sampling is not accurate at this time.

Summary of the invention

The main object of the present invention is to overcome the deficiencies of the prior art, and to provide a dynamic equalization circuit of a battery management system and a dynamic equalization method thereof.

To achieve the above object, the present invention adopts the following technical solutions:

A dynamic equalization circuit of a battery management system, comprising a bidirectional DC-DC converter, a polarity commutator and a battery selection switch group connected in series between an external power source and a single battery pack connected in series; a voltage sampling switch group and an A/D converter which are sequentially cascaded between the serially connected single battery pack and the CPU, and the number of switches of the battery selection switch group and the voltage sampling switch group are both larger than the single battery The number is one, and is respectively used for controlling the corresponding single cells, wherein one end of the odd number of battery selection switches is connected with the negative output bus of the polarity commutator, that is, the negative collecting bus, and the even number of battery selecting switches One end is connected to the positive output terminal of the polarity commutator, that is, the positive collecting bus, and the other end of the odd number of battery selecting switches is connected to the positive pole of a single battery, and the other end of the adjacent even number of battery selecting switches is a negative electrode connection of the same single cell, wherein one end of the odd-numbered voltage sampling switches is connected to a positive input end of the A/D converter, and one end of the even-numbered voltage sampling switches is coupled to the A/D conversion The negative input terminal is connected, the other end of the odd-numbered voltage sampling switch is connected to the positive pole of a single battery, and the other end of the adjacent even-numbered voltage sampling switch is connected to the negative pole of the same single battery, wherein the battery selection The switch group and the voltage sampling switch group are controlled by a CPU, and the CPU detects each cell voltage, and Judging the bit number of the single battery that needs to be charged or discharged separately or too high, and issuing a corresponding control command to connect the single cell with a voltage that is too low or too high, which is required to be separately charged and discharged, to the positive collecting bus and the negative collecting bus. Charging or discharging,

The first single cell or the last single cell of the single battery cells serially connected in series is respectively connected to a corresponding battery selection switch and a voltage sampling switch through separate separate sampling lines and equalization lines, the single battery The remaining single cells in the group are connected to the corresponding battery selection switch and voltage sampling switch in a manner that the sampling line and the equalization line are collinear; the impedance value of each sampling line calculated by the CPU according to the equalization test current condition is in the normal operation process. In the middle, the sampling voltage of each single cell is detected and the actual cell voltage is calculated as the voltage drop on the sampling voltage rejection line, and then the dynamic equalization control is performed according to the actual cell voltage.

further:

The CPU is one of a single chip microcomputer, a digital signal processor, and a microprocessor.

The voltage sampling switch is a solid state relay.

The battery selection switch is a MOSFET.

The A/D converter is a differential operational amplifier for high precision instrumentation.

A dynamic equalization method for a dynamic equalization circuit of the battery management system includes the following steps:

S1, calculating or approximating the impedance value of the sampling line of each single cell based on the equalization test current condition;

S2. During normal operation, the sampling voltage of each single cell is detected, and the sampling voltage is removed according to the impedance value calculated by the sampling line and the equilibrium charging current value, and the actual cell voltage of each single cell is obtained. ;

S3. The CPU determines the bit number of the single-cell battery that needs to be charged or discharged separately or is too high;

S4, a control command is issued by the CPU, and the corresponding polarity selection switch group of the control strobe is used to perform polarity transformation on the tributary bus, and at the same time, the corresponding battery selection switch group of the strobe is controlled to perform polarity matching, and the working direction of the bidirectional isolation converter is controlled, A single-cell battery with a voltage that is too low or too high, which needs to be separately charged and discharged, is connected to a collecting bus to be charged or discharged to realize energy transfer;

Steps S2 to S4 are repeated until each single cell voltage in each of the sequentially connected battery packs is within a set allowable error range, and dynamic equalization is achieved.

further:

In the dynamic equalization circuit, the first single cells of the single battery cells connected in series are respectively separated from the corresponding battery selection switch and voltage sampling by separate sampling lines and equalization lines The switches are connected, and the remaining single cells in the single battery group are connected to the corresponding battery selection switch and the voltage sampling switch in a manner that the sampling line and the equalization line are collinear;

Step S1 includes the following steps:

1) Turn off the equalizer test, a total voltage of the N set of cell collection, sample values to obtain the single voltage U _{1n, N} is a natural number greater than 1, n is from 1 to N;

2) Given an equalized charging current value I, perform an equalization test, and record the voltage value U _{2n of} each single cell in the equalization process;

3) According to the voltage values U _1n and U _2n and the given equalized charging current value I, starting from the first single cell, iteratively calculating the individual according to the formula R _n =(U _1n -U _2n )/IR _n-1 The impedance value of the sample line of the body battery, where R ₀ =0.

In the dynamic equalization circuit, the last single cell in the unit battery group sequentially connected in series is respectively connected to a corresponding battery selection switch and a voltage sampling switch through separate sampling lines and equalization lines, the single battery The remaining single cells in the group are connected to the corresponding battery selection switch and voltage sampling switch in a manner that the sampling line and the equalization line are collinear;

Step S1 includes the following steps:

3) we are according to the voltage value U _1n and U _2n and given equalizing charging current value I, beginning from the last cell, the formula _{_{R n-1 = (U 1n}} -U 2n) / IR n iterative calculation based on the monomers The impedance value of the sample line, where R _N =0.

In step S2, the voltage of a group of N single cells is collected. If the current equalization channel is the nth single cell, the sampling voltage V _{1n of} the nth cell is detected, and the nth single is calculated. The actual cell voltage of the bulk cell V _2n = V _1n -(R _n + R _n1 )*I, N is a natural number greater than 1, n is from 1 to N, and R ₀ =0.

In step S2, the voltage of a group of N single cells is collected. If the current equalization channel is the n+1th cell, the sampling voltage V _{1n of} the nth cell is detected, and the nth is calculated. a cell actual cell voltage _{_{_{V 2n = V 1n + R n}}} * I, N is a natural number greater than 1, n is from 1 to N.

In step S2, the voltages of a group of N single cells are collected. If the current equalization channel is the nth single cell, the sampling voltage V _{1n of} the n+1th cell is detected, and the nth is calculated. The actual cell voltage of +1 cells is V _2(n+1) = V _1(n+1) + R _n *I, N is a natural number greater than 1, and n is from 1 to N.

The beneficial effects of the invention:

According to the dynamic equalization circuit and the dynamic equalization method of the present invention, except for the first single cell or the last single cell in the single cell group, the sample lines of the other single cells are passed through separate sampling lines and equalization lines. And the equalization line is collinear. For the battery collection and equalization of the batch unit, the cost of the system harness required by the invention is greatly reduced, and the cost of the BMS system is significantly reduced. Moreover, the present invention can satisfy the single cell balance while achieving single cell balance. The real-time sampling requirement of the body voltage eliminates or reduces the influence of the voltage drop on the equalization line on the sampling accuracy during the equalization process, so that the cell voltage sampling is accurate.

DRAWINGS

1 is a schematic block diagram of a dynamic equalization circuit of an existing active equalization battery management;

2a and 2b are respectively a schematic block diagram of a dynamic equalization circuit of the existing sampling line and the equalization line and a wiring diagram of the battery unit;

3a and 3b are respectively a schematic block diagram of a conventional dynamic equalization circuit of a sampling and equalization line and a wiring diagram of a battery cell;

4a and 4b are respectively a block diagram of a sampling and equalization collinear dynamic equalization circuit according to an embodiment of the present invention (the first single cell is connected to two lines, that is, the sampling and equalization line, and the sampling of the remaining single cells) And balanced collinear line) and battery unit wiring diagram;

Figure 4c is a schematic diagram of the equivalent circuit principle of the sampling and equalization of the first single cell, the sampling and equalization of the remaining single cells, and the equalization current;

5a and 5b are block diagrams of a dynamic equalization circuit of a sampling and equalization line collinear according to another embodiment of the present invention (the last single cell is connected to two lines, that is, a sampling and equalization line, and the remaining single cells are Sampling and equalization collinear);

Figure 5c is a schematic diagram of the equivalent circuit principle of the sampling and equalization of the last single cell, the sampling and equalization of the remaining cells, and the equalization current;

FIG. 6 corresponds to the circuit shown in FIG. 3a and FIG. 3b, which is a schematic diagram of the equivalent circuit principle of the circuit shown in FIG. 3a and FIG. 3b when all the single cell sampling and equalization are collinear.

detailed description

Embodiments of the invention are described in detail below. It should be emphasized that the following instructions are only It is intended to be illustrative, and not to limit the scope of the invention.

Referring to Figures 4a and 4b, in one embodiment, a dynamic equalization circuit of a battery management system includes a cascade of bidirectional DCs connected between an external power source and sequentially connected battery cells B1 - B4. The DC converter, the polarity commutator, and the battery selection switch group K1 to K5 are connected to the voltage sampling switch groups S1 to S5 and the A/D which are sequentially cascaded between the unit cells B1 to B4 and the CPU which are sequentially connected in series. The number of switches of the battery selection switch groups K1 - K5 and the voltage sampling switch groups S1 - S5 is one more than the number of the single cells, and is respectively used for controlling the corresponding single cells, wherein One end of the odd number of battery selection switches K1, K3, K5 is connected to the negative output bus of the polarity commutator, that is, the negative integration bus, and one end of the even number of battery selection switches K2, K4 and the polarity commutator The positive output is the positive bus connection, the other end of the odd number of battery selection switches K1, K3, K5 is connected to the positive pole of a single battery, and the other end of the adjacent even number of battery selection switches K2, K4 is the same The negative connection of the body battery, where the odd number of electricity One end of the sampling switches S1, S3, S5 is connected to the positive input end of the A/D converter, and one end of the even number of voltage sampling switches S2, S4 is connected to the negative input end of the A/D converter, the odd number The other ends of the voltage sampling switches S1, S3, and S5 are connected to the anode of a single battery, and the other ends of the adjacent even number of voltage sampling switches S2 and S4 are connected to the cathode of the same single cell, wherein the battery selection The switch group and the voltage sampling switch group are controlled by a CPU, and the CPU detects the voltage of each single cell, and determines the bit number of the single battery that needs to be separately charged or discharged, and sends a corresponding control command. A single cell that requires a separate charge or discharge voltage that is too low or too high is connected to the positive manifold and the negative bus is charged or discharged.

The first single cell B1 or the last single cell B4 of the single battery cells B1 B B4 sequentially connected in series are respectively connected to corresponding battery selection switches and voltage sampling switches through separate sampling lines and equalization lines. The remaining single cells in the single battery group are connected to the corresponding battery selection switch and the voltage sampling switch in a manner that the sampling line and the equalization line are collinear; the impedance values of the sampling lines calculated by the CPU according to the equalization test current condition are calculated by the CPU. In the normal operation process, the sampling voltage of each single cell is detected and the actual cell voltage is calculated as the voltage drop on the sampling voltage rejection line, and then the dynamic equalization control is performed according to the actual cell voltage.

In some embodiments, the CPU can be one of a microcontroller, a digital signal processor, and a microprocessor.

In some embodiments, the voltage sampling switch can be a solid state relay.

In some embodiments, the battery selection switch can be a MOSFET.

In some embodiments, the A/D converter can be a differential operation amplifier for high precision instrumentation. Device.

In one embodiment, a dynamic equalization method for a dynamic equalization circuit of the battery management system includes the following steps:

Example 1

As shown in Fig. 4a and Fig. 4b, the specific wiring is as follows: the first single cell is connected to two lines, the sampling and equalization are separated, and the other single cells are sampled and equalized and collinear. The equivalent circuit is shown in Figure 4c. Real-time single-cell voltage sampling and real-time equalization control can be realized. For batch single cell battery acquisition and equalization, the system harness cost is greatly reduced.

Using the dynamic equalization circuit shown in Figures 4a and 4b, the dynamic equalization method includes the following steps:

step 1:

When the equalization current is not started, the embedded control software detects each single cell voltage in each of the sequentially connected battery packs;

When the monomer equalization is initiated, the cell voltage value needs to be recalculated and the voltage drop of the line loss is removed, as follows:

1) Turn off the equalization current test first. At this time, collect the individual cell voltages to obtain a set of individual cell voltage acquisition values U ₁ .

2) Given equalization current, start each individual channel for equalization test (equalization current) I=2000), in the equalization process, quickly record the voltage value U2 of each individual.

3) the cell voltage values according to the two groups U ₁ and U ₂ and given equalizing charging current value I, the monomer line was calculated for each resistance value R ₁ based on R (U ₂ -U ₁₎ I principles = /, R _2, R _3, R _4, see the equivalent circuit 4c.

Sampling the first monomer: S1 and S2 are closed, the current is not balanced start, collection voltage U _11, when starting the balancing current I = 2000mA, collected voltage U _21;

Then R ₁ =(U ₁₁ -U ₂₁ )/I

And so on, calculate:

R ₂ =(U ₁₂ -U ₂₂ )/IR ₁

R ₃ =(U ₁₃ -U ₂₃ )/IR ₂

_{_{_{R 4 = (U 14 -U 24}}} ) / IR 3.

4) During normal operation, the calculated real cell voltage is the voltage drop on the sampling voltage rejection line.

The first monomer is collected voltage value:

The voltage collected by the CPU then removes the voltage drop across the resistor R1.

If the current equalization channel is the unit 1 start equalization, when the CPU acquisition voltage is V ₁₁ , the cell voltage value V ₂₁ = V _{11 -} R ₁ * I;

If the current channel equalization starts equalizer 2 is the monomer, when the CPU voltage is acquired V _11, at this time the cell voltage value _{_{_{V 21 = V 11 + R 1}}} * I.

The second cell collects the voltage value:

The voltage is collected by the CPU and the voltage drop across the resistors R ₁ and R ₂ is removed.

If the starting monomer a channel equalization, while the CPU is harvested voltage V _12, at this time the cell voltage value _{_{_{V 22 = V 12 + R 1}}} * I;

If the equalization unit 2 channel is started, the CPU acquisition voltage is V ₁₂ at this time, and the cell voltage value V ₂₂ =V ₁₂ -(R ₁ +R ₂ )*I;

If the equalization unit 3 channel is activated, the CPU acquisition voltage is V ₁₂ at this time, and the cell voltage value V ₂₂ = V ₁₂ + (R ₂ ) * I at this time.

And so on.

Step 2: The CPU determines the bit number of the single-cell battery that needs to be charged or discharged separately or is too high;

Step 3: The CPU issues a control command to control the strobe corresponding polarity selection switch group to change the polarity of the pooled bus, and simultaneously controls the strobe corresponding battery selection switch group for polarity matching, and Control the two-way isolation to change the working direction of the converter, and connect a single-cell battery that requires a single charge or discharge voltage to the charging bus to be charged or discharged to achieve energy transfer;

Repeat step 1 (step 4) to step 3 until the individual cell voltages in the battery packs in series are connected within the set tolerance range to achieve dynamic equalization. The number of components of the charge and discharge device and the circuit complexity of the battery management system can be significantly reduced.

As mentioned above, when the equalization current management is not started, the CPU collects the voltage as the single voltage. When the equalization voltage is started, the actual voltage of the individual needs the CPU to collect the voltage, and then the line loss voltage drop on the line is removed, and compared. Difference, finally arrange the highest number of single cells and the lowest number of cells, and control the discharge of the highest number of cells, charge the lowest number of cells, and pass the "cut high and low", high efficiency energy Transfer, so that the cell voltage tends to be consistent, to make up for the difference in the battery.

Specific circuit components and functional descriptions that can be used:

1) High-speed signal electronic switches S1～S5. In practical applications, the number of monomers can be much larger than 5 according to the specific application. The device model is a high-voltage solid-state relay.

The high-speed signal electronic switches S1 ~ S5, the specific function in the circuit is to switch the battery cells that need to collect channels.

2) AD converter can use high precision precision op amp conditioning circuit.

The specific function of the AD converter in the circuit converts the single-collected voltage collected and converted into a voltage that the CPU can collect. Here the CPU can collect voltages ranging from 0 to 3.3 vdc.

3) The CPU can be used but not limited to a single chip microcomputer, an MCU, a DSP, or the like.

Example 2

As shown in Figures 5a to 5c, the sampling and equalization wiring of the last single cell can also be divided, and the sampling and equalization of the remaining single cells are collinear. At this time, the sampling strategy is started from the last section, that is, the impedance R3 of the last sampling line of the last single cell is calculated first, and then the calculation is performed in descending order.

The fourth single cell sampling: S4 and S5 are closed, when the equalizing current is not started, the collecting voltage is U14, and when the equalizing current I=2000mA is started, the collecting voltage is U24;

_{_{_{R 3 = (U 14 -U 24}}} ) / I,

And so on:

R ₂ =(U ₁₃ -U ₂₃ )/IR ₃

R ₁ =(U ₁₂ -U ₂₂ )/IR ₂

R ₀ = (U ₁₁ - U ₂₁ ) / IR ₁ .

After calculating the impedance of each sampling line, the summation voltage of each cell is calculated similarly to Embodiment 1 when the equalization is started.

As shown in Fig. 3a-3b and Fig. 6a, another scheme for real-time cell voltage collection and dynamic equalization of the battery management system wiring is sampling and equalization line collinearity, and all the single terminals adopt a collinear scheme. At this time, R0, R1 and R3, R4 cannot be accurately calculated. Considering the actual system wiring, R0 and R1 are relatively close, and R3 and R4 are relatively close. In the actual calculation, R0 and R1 are approximately equal to the same value, that is, a variable, and R3 and R4 are approximately equal to the same value, that is, a variable. After calculating the impedance of each sampling line, the summation voltage of each cell is calculated similarly to Embodiment 1 when the equalization is started.

The above is a further detailed description of the present invention in combination with specific/preferred embodiments, and it is not intended that the specific embodiments of the invention are limited to the description. It will be apparent to those skilled in the art that <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; It belongs to the scope of protection of the present invention.

Claims

A dynamic equalization circuit of a battery management system, comprising a bidirectional DC-DC converter, a polarity commutator and a battery selection switch group connected in series between an external power source and a single battery pack connected in series; a voltage sampling switch group and an A/D converter which are sequentially cascaded between the serially connected single battery pack and the CPU, and the number of switches of the battery selection switch group and the voltage sampling switch group are both larger than the single battery The number is one, and is respectively used for controlling the corresponding single cells, wherein one end of the odd number of battery selection switches is connected with the negative output bus of the polarity commutator, that is, the negative collecting bus, and the even number of battery selecting switches One end is connected to the positive output terminal of the polarity commutator, that is, the positive collecting bus, and the other end of the odd number of battery selecting switches is connected to the positive pole of a single battery, and the other end of the adjacent even number of battery selecting switches is a negative electrode connection of the same single cell, wherein one end of the odd-numbered voltage sampling switches is connected to a positive input end of the A/D converter, and one end of the even-numbered voltage sampling switches is coupled to the A/D conversion The negative input terminal is connected, the other end of the odd-numbered voltage sampling switch is connected to the positive pole of a single battery, and the other end of the adjacent even-numbered voltage sampling switch is connected to the negative pole of the same single battery, wherein the battery selection The switch group and the voltage sampling switch group are controlled by a CPU, and the CPU detects the voltage of each single cell, and determines the bit number of the single battery that needs to be separately charged or discharged, and sends a corresponding control command. A single cell that requires a single charge or discharge voltage that is too low or too high is connected to a positive collector bus, a negative sink bus charge or discharge, and is characterized in that

The first single cell or the last single cell of the single battery cells serially connected in series is respectively connected to a corresponding battery selection switch and a voltage sampling switch through separate separate sampling lines and equalization lines, the single battery The remaining single cells in the group are connected to the corresponding battery selection switch and voltage sampling switch in a manner that the sampling line and the equalization line are collinear; the impedance value of each sampling line calculated by the CPU according to the equalization test current condition is in the normal operation process. In the middle, the sampling voltage of each single cell is detected and the actual cell voltage is calculated as the voltage drop on the sampling voltage rejection line, and then the dynamic equalization control is performed according to the actual cell voltage.
A dynamic equalization circuit for a battery management system according to claim 1, wherein said CPU is one of a single chip microcomputer, a digital signal processor, and a microprocessor.
A dynamic equalization circuit for a battery management system according to claim 1 or 2, wherein said voltage sampling switch is a solid state relay.
A dynamic equalization circuit for a battery management system according to any one of claims 1 to 3, wherein said battery selection switch is a MOSFET.
A dynamic equalization circuit for a battery management system according to any one of claims 1 to 4, It is characterized in that the A/D converter is a differential operational amplifier for high precision instrumentation.
A dynamic equalization method for a dynamic equalization circuit of a battery management system according to any one of claims 1 to 5, comprising the steps of:

S1, calculating or approximating the impedance value of the sampling line of each single cell based on the equalization test current condition;

S2. During normal operation, the sampling voltage of each single cell is detected, and the sampling voltage is removed according to the impedance value calculated by the sampling line and the equilibrium charging current value, and the actual cell voltage of each single cell is obtained. ;

S3. The CPU determines the bit number of the single-cell battery that needs to be charged or discharged separately or is too high;

S4, a control command is issued by the CPU, and the corresponding polarity selection switch group of the control strobe is used to perform polarity transformation on the tributary bus, and at the same time, the corresponding battery selection switch group of the strobe is controlled to perform polarity matching, and the working direction of the bidirectional isolation converter is controlled, A single-cell battery with a voltage that is too low or too high, which needs to be separately charged and discharged, is connected to a collecting bus to be charged or discharged to realize energy transfer;

Steps S2 to S4 are repeated until each single cell voltage in each of the sequentially connected battery packs is within a set allowable error range, and dynamic equalization is achieved.
A dynamic equalization method according to claim 6, wherein

In the dynamic equalization circuit, the first single cell in the unit battery group sequentially connected in series is respectively connected to a corresponding battery selection switch and a voltage sampling switch through separate sampling lines and equalization lines, the single unit The remaining single cells in the battery pack are connected to the corresponding battery selection switch and voltage sampling switch in a manner that the sampling line and the equalization line are collinear;

Step S1 includes the following steps:

1) Turn off the equalizer test, a total voltage of the N set of cell collection, sample values to obtain the single voltage U 1n, N is a natural number greater than 1, n is from 1 to N;

2) Given an equalized charging current value I, perform an equalization test, and record the voltage value U 2n of each single cell in the equalization process;

3) According to the voltage values U 1n and U 2n and the given equalized charging current value I, starting from the first single cell, iteratively calculating the individual according to the formula R n =(U 1n -U 2n )/IR n-1 The impedance value of the sample line of the body battery, where R 0 =0.
A dynamic equalization method according to claim 7, wherein

In the dynamic equalization circuit, the last single cell in the unit battery group sequentially connected in series is separated from the corresponding battery selection switch and voltage by separate sampling lines and equalization lines respectively. The sample switches are connected, and the remaining single cells in the single battery pack are connected to the corresponding battery selection switch and the voltage sampling switch in a manner that the sampling line and the equalization line are collinear;

Step S1 includes the following steps:

1) First turn off the equalization test, collect the voltage of a group of N single cells, and obtain the voltage sample U 1n of each cell, N is a natural number greater than 1, n from 1 to N;

2) Given an equalized charging current value I, perform an equalization test, and record the voltage value U 2n of each single cell in the equalization process;

3) according to the voltage value U 1n and U 2n and given equalizing charging current value I, beginning from the last cell, the formula R n-1 = (U 1n -U 2n) / IR n iterative calculation based on the monomers The impedance value of the sample line, where R N =0.
A dynamic equalization method according to any one of claims 6 to 8, wherein

In step S2, the voltage of a group of N single cells is collected. If the current equalization channel is the nth single cell, the sampling voltage V 1n of the nth cell is detected, and the nth single is calculated. The actual cell voltage of the bulk cell V 2n =V 1n -(R n +R n-1 )*I, N is a natural number greater than 1, n is from 1 to N, and R 0 =0.
A dynamic equalization method according to any one of claims 6 to 8, wherein

In step S2, the voltage of a group of N single cells is collected. If the current equalization channel is the n+1th cell, the sampling voltage V 1n of the nth cell is detected, and the nth is calculated. The actual cell voltage of the individual cells V 2n = V 1n + R n * I, N is a natural number greater than 1, n from 1 to N;

In step S2, the voltages of a group of N single cells are collected. If the current equalization channel is the nth single cell, the sampling voltage V 1n of the n+1th cell is detected, and the nth is calculated. The actual cell voltage of +1 cells is V 2(n+1) = V 1(n+1) + R n *I, N is a natural number greater than 1, and n is from 1 to N.