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WO2012004876A1 - Corps lié, dispositif semi-conducteur muni dudit corps lié, procédé de liaison et procédé de production utilisant ledit procédé de liaison - Google Patents

Corps lié, dispositif semi-conducteur muni dudit corps lié, procédé de liaison et procédé de production utilisant ledit procédé de liaison Download PDF

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Publication number
WO2012004876A1
WO2012004876A1 PCT/JP2010/061611 JP2010061611W WO2012004876A1 WO 2012004876 A1 WO2012004876 A1 WO 2012004876A1 JP 2010061611 W JP2010061611 W JP 2010061611W WO 2012004876 A1 WO2012004876 A1 WO 2012004876A1
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WO
WIPO (PCT)
Prior art keywords
porous body
metal porous
porosity
metal
semiconductor element
Prior art date
Application number
PCT/JP2010/061611
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English (en)
Japanese (ja)
Inventor
前田　晃
山田　朗
林　建一
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP2012523476A priority Critical patent/JP5420078B2/ja
Priority to PCT/JP2010/061611 priority patent/WO2012004876A1/fr
Publication of WO2012004876A1 publication Critical patent/WO2012004876A1/fr

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Definitions

  • the present invention relates to a semiconductor device such as a power module and a manufacturing method thereof.
  • the first member having a relatively small linear expansion coefficient corresponding to a semiconductor element and a circuit board and the first member corresponding to a heat sink and a cooler have a larger linear expansion coefficient.
  • a joining member for joining between the second member and the conductive porous body formed so that the porosity increases from the second member side toward the first member side in the thickness direction is disclosed (Patent Document 1: Japanese Patent Application Laid-Open No. 2009-277856).
  • the porous body described in Patent Document 1 has a high-porosity layer formed in a direction parallel to the main surface of the semiconductor element, and all the portions bonded to the wire are high-porosity layers having a low metal density. Therefore, the problem is that the wire bond strength is reduced.
  • a semiconductor heat dissipation substrate made of a Cu—W alloy in which copper (Cu) is infiltrated into the pores of a tungsten (W) porous body there is disclosed a semiconductor heat dissipation substrate characterized in that the pore diameter when the specific surface area is 95% is 0.3 ⁇ m or more and the pore diameter when the cumulative specific surface area is 5% is 30 ⁇ m or less (Patent Document) 2: JP 2003-152145 A).
  • the central portion of the semiconductor heat dissipation substrate is a low thermal conductive and low thermal expansion region with low W (high Cu) and high thermal conductivity and high thermal expansion region at the periphery and low thermal conductive and low thermal expansion portion with high W (low Cu). This improves the reliability of bonding with the semiconductor heat dissipation substrate.
  • the semiconductor element and the high thermal conductive plate are bonded with a bonding material such as solder through a porous metal body whose porosity is changed in the thickness direction as described in Patent Document 1. It is possible to do.
  • the semiconductor element itself is displaced by applying stress to the semiconductor element.
  • a layer having a stress relaxation effect (a layer like a cushion) is formed under the semiconductor element, the stress relaxation layer under the semiconductor element is deformed with respect to the stress from above the semiconductor element. Will move down. It also means attenuating the ultrasonic energy and the load applied when bonding the wire to the front surface of the semiconductor element.
  • the present invention relates to a bonded body of a semiconductor element and a substrate with improved wire bond strength while maintaining excellent heat cycle (stress relaxation) characteristics due to high ductility of a porous metal body such as foam metal, a bonding method, and
  • An object of the present invention is to provide a semiconductor device using them and a method for manufacturing the same.
  • the present invention is a joined body in which a semiconductor element and a substrate are joined via a metal porous body, and the metal porous body is sandwiched between the semiconductor element and the substrate.
  • One surface of the porous body is bonded to the semiconductor element via a bonding material, and the other surface of the metal porous body is bonded to the substrate via a bonding material, and the surface of the metal porous body
  • It is a joined body characterized in that the mechanical strength of the central portion in the inward direction is higher than that of the peripheral portion.
  • the porosity of the central portion in the in-plane direction of the metal porous body is smaller than that of the peripheral portion.
  • the present invention also relates to a semiconductor device including the above-described joined body. Further, the present invention is a bonding method for bonding a semiconductor element and a substrate through a metal porous body, wherein the metal porous body is sandwiched between the semiconductor element and the substrate, The semiconductor element is bonded to one surface of a porous body via a bonding material, the substrate is bonded to the other surface of the metal porous body via a bonding material, and the metal porous body is in-plane
  • the present invention also relates to a joining method, characterized in that the metallic porous body has a higher mechanical strength at the center in the direction than at the periphery.
  • the porosity of the central portion in the in-plane direction of the metal porous body is smaller than that of the peripheral portion.
  • the present invention also relates to a method for manufacturing a semiconductor device using the above bonding method.
  • a highly reliable semiconductor device with improved wire bond strength and excellent bonding reliability while maintaining the stress relaxation effect in the heat cycle can be obtained.
  • FIG. 3 is a schematic cross-sectional view showing the joined body of the first embodiment. It is a schematic diagram which shows an example of the foam metal body used for this invention. It is a schematic diagram which shows another example of the metal foam plate used for this invention. 3 is a schematic diagram for explaining a front surface of a joined body according to Embodiment 1.
  • FIG. 6 is a schematic diagram showing a joined body of Embodiment 2.
  • FIG. 6 is a diagram for explaining a crack progress degree of Test Example 1.
  • FIG. 1 is a schematic cross-sectional view of the joined body (Si die bond sample) of the present embodiment. The manufacturing method of the joined body of this embodiment is demonstrated using FIG.
  • the semiconductor element (Si chip) 1 shown in FIG. 1 can be manufactured as follows. First, an aluminum film with a thickness of 5 ⁇ m is formed on the front surface of a silicon wafer having a diameter of 5 inches and a thickness of 0.35 mm, and a Ti / Ni / Au film (thickness 100/500/50 nm) is formed on the back surface of the silicon wafer by sputtering. Film. Next, a 7 mm square (7 mm square) Si chip 1 is taken out from the wafer by dicing. The silicon wafer, the sputtering apparatus, and the dicing apparatus used here are common apparatuses and have no problem.
  • an oxygen-free copper plate (Cu block) of 10 mm ⁇ ⁇ thickness 1 mm is prepared as the substrate 2.
  • the surface of the Cu block 2 is subjected to electrolytic Ni plating with a thickness of 5 ⁇ m.
  • the sintered joining material by fine metal particles such as solder and Ag, a conductive adhesive, etc.
  • Silver solder, copper solder or the like can be used as a joining material other than solder.
  • solder is optimal for semiconductor applications, and is excellent in cost.
  • the solder paste (solder) 4a was printed with a stainless steel mask having a thickness of 0.1 mm having an opening of 8 mm ⁇ on the surface of the substrate 2.
  • the solder 4b was printed also on one surface of the metal porous body 3.
  • the metal porous body 3 is placed on the surface of the solder 4a printed on the substrate 2 so that the solder 4b is on the upper side, and the semiconductor element 1 is mounted on the surface of the solder 4b printed on the metal porous body 3.
  • the joined body (referred to as Si die bond sample) of the present embodiment can be obtained.
  • the mechanical strength of the central portion (at least including the center of the metal porous body) in the in-plane direction is higher than the peripheral portion (at least including the peripheral edge of the metal porous body). Is also expensive.
  • By using such a metal porous body it is possible to produce a bonded body with improved wire bond strength (wire bonding strength) and excellent bonding reliability while maintaining the stress relaxation effect in the heat cycle.
  • the metal porous body 3 has a lower porosity in the central portion (at least including the center of the metal porous body) in the in-plane direction than in the peripheral portion (at least including the periphery of the metal porous body). It is preferable.
  • the metal porous body 3 whose porosity in the central portion in the in-plane direction is smaller than that in the peripheral portion, the metal porosity whose porosity decreases from the central portion in the in-plane direction toward the peripheral portion side.
  • the portion 31 located at the center in the in-plane direction has the smallest porosity
  • the portion 32 has a larger porosity
  • the portion 33 has a larger porosity
  • the portion 34 There is a metal porous body 3 that has the largest porosity.
  • the porosity may be changed in multiple steps as shown in FIG. 2, or may be changed gradually in a stepless manner.
  • a metal porous body prepared in advance is slowly applied from the shear direction to the compression direction (from the peripheral side in the in-plane direction toward the central part).
  • the central portion is formed of a metal porous body having a low porosity (for example, a square foam metal plate of 4 mm ⁇ or less), and the peripheral portion has a porosity of A metal porous body whose porosity changes stepwise may be manufactured by forming it with a large metal porous body (for example, a foamed metal plate hollowed in a square ring shape).
  • the metal porous body 3 whose porosity in the central part in the in-plane direction is smaller than that in the peripheral part, a part (periphery) on the most peripheral side with respect to the most central part (central part) in the in-plane direction Part)), and the porosity is partially reduced and increased from the central part to the peripheral part.
  • a metal porous body in which two types of porous metal bodies having different porosity a high porosity metal porous body 301 and a low porosity metal foam plate 302 are alternately combined. The body is mentioned.
  • the metal porous body 301 having a high porosity for example, a copper foam metal plate (manufactured by Mitsubishi Materials Corporation) having a porosity of 95% and a pore diameter (nominal pore diameter) of 300 ⁇ m can be used.
  • a copper foam metal plate manufactured by Mitsubishi Materials Corporation
  • a porosity of 80% and a pore diameter of 50 ⁇ m can be used.
  • the porosity and pore diameter of the metal porous body can be measured in accordance with JIS K3832, etc., for example, a mercury intrusion method using a porosimeter, a bubble point method, or the like can be used. Further, a method for calculating the porosity based on the outer shape and the weight can also be used.
  • the metal porous body used in the present invention has a metal porous body having relatively high mechanical strength at the center for maintaining sufficient wire bond strength, and heat cycle resistance (stress relaxation characteristics) at the end. What is necessary is just to equip a peripheral part with the metal porous body with relatively low mechanical strength for providing a.
  • the porosity is uniform, but the pore diameter in the central portion in the in-plane direction is A metal porous body smaller than the peripheral part can also be used.
  • the material at the center is nickel (material with relatively high mechanical strength), and the material at the periphery is aluminum (material with relatively low mechanical strength) It is also possible to use a metal porous body such as
  • FIG. 5 is a schematic cross-sectional view for explaining the structure of the joined body of this embodiment.
  • the Si chip 1, the substrate 2, the metal porous bodies 3a and 3b, and the solders 4a, 4b, 4c and 4d can be the same as those prepared in the first embodiment.
  • electroless Ni—P plating having a thickness of 3 ⁇ m is applied on the front surface (metallized with aluminum) of the Si chip 1, and then electroless Au plating ( (Thickness aimed at 0.05 ⁇ m).
  • a stress buffer plate 6 is prepared.
  • a molybdenum plate manufactured by Niraco Co., Ltd.
  • the surface of the stress buffer plate 6 may be subjected to, for example, electrolytic Ni plating having a thickness of 2 ⁇ m or more, and may further be subjected to electrolytic Au plating having a thickness of 0.05 ⁇ m or more on the plating.
  • Solder paste is printed using a stainless steel mask on the substrate 2, the porous metal body 3a, the front surface of the Si chip 1, and the upper surface of the porous metal body 3b with a thickness of 0.1 mm in a range of 8 mm ⁇ .
  • the substrate 2 with solder printed on the upper surface
  • the metal porous body 3a with solder printed on the upper surface
  • the Si chip with solder printed on the upper surface
  • the metal porous body 3b Solder printed
  • molybdenum plate (stress buffer plate) 6 were mounted in this order, heated on a hot plate set at 280 ° C. for 1 minute, and then allowed to cool to the air to produce a sample.
  • An aluminum wire 7 having a diameter of 300 ⁇ m was bonded to the upper surface of the molybdenum plate (stress buffer plate) 6 under the same conditions as in the first embodiment.
  • Example 1 Examples 1 and 2 are specific examples of joined bodies corresponding to the first embodiment.
  • a joined body of the present invention was produced in the same manner as in Embodiment 1 except that the metal porous body thus produced was used.
  • Example 2 As shown in FIG. 3, a metal porous body in which two types of porous metal bodies having different porosity (a high porosity metal porous body 301 and a low porosity foamed metal plate 302) are alternately combined. A joined body was produced in the same manner as in Example 1 except that was used.
  • a metal porous body 301 having a high porosity for example, a copper foam metal plate (manufactured by Mitsubishi Materials Corporation) having a porosity of 95% and a pore diameter (nominal pore diameter) of 300 ⁇ m can be used.
  • the low porosity metal porous body 302 for example, a copper foam metal plate (manufactured by Mitsubishi Materials Corporation) having a porosity of 80% and a pore diameter of 50 ⁇ m can be used.
  • Example 1 Example 1 except that a conventional Cu foam metal plate having a uniform porosity (thickness 1 mm, 9 mm ⁇ , pore diameter 300 ⁇ , porosity 95%, manufactured by Mitsubishi Materials Corporation) was used as the metal porous body. In the same manner, a joined body (Si die bond sample) was prototyped.
  • Example 1 Ten bonded bodies of each of Example 1, Example 2, Comparative Example 1, and Comparative Example 2 were prepared, and nine 300 ⁇ m diameter aluminum wires were provided on the upper surface of the semiconductor element 1 as shown in FIG. Bonded to nine bonding pads 5 (outermost surface material: aluminum or gold). The maximum value and the minimum value of the pull strength by the wire pull test were measured for the joined body to which the wire bond was applied in this manner under the conditions optimized in the preliminary evaluation.
  • Table 1 shows nine average values of the maximum pull strength, the minimum pull strength, and the average pull strength for each example and comparative example.
  • the minimum pull strength and the average pull strength equal to or higher than the minimum pull strength (637 gf / wire) of Comparative Example 2 in which the foam metal body is not inserted are obtained, the case is not obtained. X was marked.
  • Example 2 Ten Si die bond samples of Example 1, Example 2, Comparative Example 1, and Comparative Example 2 were prototyped and subjected to a heat cycle treatment in which a temperature cycle reciprocating between ⁇ 40 ° C. and 175 ° C. was repeated 500 times.
  • Table 2 shows the results (maximum, minimum, average) of the ultrasonic wave observation of the solder joints under the Si chip and the measurement of the crack growth rate (%).
  • the crack growth rate was calculated as follows.
  • FIG. 6 shows an image obtained with an ultrasonic flaw detector for the solder under the Si chip for explaining a method of calculating the crack progress rate.
  • (A) is an image before a heat cycle
  • (b) is an image after a heat cycle.
  • the solder joint portion basically looks black, and the void portion like a void looks white.
  • the diagonal length x is calculated for the part where the white part progresses from the Si chip end toward the center and the white part advances at the four corners.
  • the diagonal length L of the entire joint is calculated. x / L (%) was used as crack progress (%).
  • Table 3 shows the results of wire pull strength measurement similar to Test Example 1 after heat cycle treatment.
  • Example 1 and Example 2 which are Si die bond samples using a metal porous body having a low porosity at the center portion are resistant to heat cycles due to the stress relaxation effect of the metal porous body. It can be confirmed that the characteristics are excellent and the aluminum wire bond strength is also good.
  • the Si die bond sample in which the metal porous body of Comparative Example 1 was inserted was excellent in heat cycle resistance, it was determined that the minimum pull strength and the average pull strength above the minimum pull strength of Comparative Example 2 were not obtained. It was done. This is presumably because the aluminum wire bond strength (pull strength) was low and the ultrasonic energy was dispersed by the insertion of the metal foam body, so that the aluminum wire bond could not be made soundly.
  • the wire bond strength is excellent as compared with the case where the metal porous body 3 is not inserted, but the heat cycle resistance is excellent. It can be easily analogized that it is about the middle between Comparative Example 1 and Comparative Example 2.
  • Example 3 As the metal porous bodies 3a and 3b, a metal porous body having a porosity in the central portion in the in-plane direction similar to that in Example 1 is smaller than that in the peripheral portion, and bonded by the method described in Embodiment 2 above. The body was made.
  • an electrolytic Ni plating with a thickness of 3 ⁇ m is formed on a molybdenum plate (manufactured by Niraco Co., Ltd.) having a thickness of 0.3 mm and 7 mm ⁇ , and a thickness of 0.08 ⁇ m is further formed thereon.
  • the one formed by electrolytic Au plating was used.
  • Example 4 A bonded body was manufactured in the same manner as in Example 3 except that the same metal porous body as in Example 2 was used as the metal porous bodies 3a and 3b.
  • Example 3 The same metal porous body as in Example 1 was used as the metal porous body 3a, and the same metal porous body as that used in Comparative Example 1 as the metal porous body 3b (the porosity changed in the in-plane direction). A joined body was produced in the same manner as in Example 3 except that a conventional foam metal plate) was used.
  • Comparative Example 4 Example 3 except that the same metal porous body (conventional foamed metal plate whose porosity does not change in the in-plane direction) used in Comparative Example 1 was used as the metal porous bodies 3a and 3b. A joined body was produced in the same manner as described above.
  • Table 4 shows the results of making 10 samples of each of Example 3, Example 4, Comparative Example 3 and Comparative Example 4 and measuring the initial wire pull strength in the same manner as in Test Example 1.
  • Table 5 shows the results of the wire pull strength investigation after the heat cycle treatment in which the temperature cycle reciprocating between ⁇ 40 ° C. and 175 ° C. is repeated 500 times.
  • Table 7 shows the results of the investigation of the degree of crack progress, and Table 6 (for the wire bonded to the upper surface of the chip).

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

L'invention concerne un corps lié qui est constitué d'un élément semi-conducteur (1) et d'un substrat (2) liés à un corps poreux métallique (3) se trouvant entre ces derniers. Le corps lié est caractérisé en ce qu'une surface dudit corps poreux métallique (3) est liée à l'élément semi-conducteur (1) mentionné ci-dessus par un matériau de liaison se trouvant entre ces derniers et que l'autre surface dudit corps poreux métallique (3) est liée au substrat (1) mentionné ci-dessus par un matériau de liaison se trouvant entre ces derniers lorsque le corps poreux métallique (3) mentionné ci-dessus est placé en sandwich entre l'élément semi-conducteur (1) mentionné ci-dessus et le substrat (2) mentionné ci-dessus. Le corps lié est par ailleurs caractérisé en ce que la résistance mécanique est plus élevée dans la partie centrale dans la direction du plan du corps poreux métallique (3) mentionné ci-dessus que dans la partie périphérique. L'invention concerne par ailleurs un dispositif semi-conducteur muni dudit corps lié.
PCT/JP2010/061611 2010-07-08 2010-07-08 Corps lié, dispositif semi-conducteur muni dudit corps lié, procédé de liaison et procédé de production utilisant ledit procédé de liaison WO2012004876A1 (fr)

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JP2012523476A JP5420078B2 (ja) 2010-07-08 2010-07-08 接合体およびそれを備えた半導体装置、ならびに、接合方法およびそれを用いた製造方法
PCT/JP2010/061611 WO2012004876A1 (fr) 2010-07-08 2010-07-08 Corps lié, dispositif semi-conducteur muni dudit corps lié, procédé de liaison et procédé de production utilisant ledit procédé de liaison

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015185559A (ja) * 2014-03-20 2015-10-22 三菱電機株式会社 半導体モジュールの製造方法および半導体モジュール
CN105537712A (zh) * 2016-01-28 2016-05-04 北京航空航天大学 一种陶瓷与金属钎焊复合构件及其制备方法
WO2018037992A1 (fr) * 2016-08-22 2018-03-01 千住金属工業株式会社 Corps de liaison fritté métallique et procédé de liaison de puce
JP2018043261A (ja) * 2016-09-13 2018-03-22 トヨタ自動車株式会社 半導体装置の電極に接合される接合材
CN108520901A (zh) * 2018-04-16 2018-09-11 江苏宜兴德融科技有限公司 薄膜太阳能电池及其制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005183637A (ja) * 2003-12-18 2005-07-07 Toyota Motor Corp 半導体装置及び半導体装置に用いられる電極部材
JP2008311273A (ja) * 2007-06-12 2008-12-25 Mitsubishi Electric Corp 接合体および電子モジュールならびに接合方法
JP2009059821A (ja) * 2007-08-30 2009-03-19 Toyota Motor Corp 半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005183637A (ja) * 2003-12-18 2005-07-07 Toyota Motor Corp 半導体装置及び半導体装置に用いられる電極部材
JP2008311273A (ja) * 2007-06-12 2008-12-25 Mitsubishi Electric Corp 接合体および電子モジュールならびに接合方法
JP2009059821A (ja) * 2007-08-30 2009-03-19 Toyota Motor Corp 半導体装置

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015185559A (ja) * 2014-03-20 2015-10-22 三菱電機株式会社 半導体モジュールの製造方法および半導体モジュール
CN105537712A (zh) * 2016-01-28 2016-05-04 北京航空航天大学 一种陶瓷与金属钎焊复合构件及其制备方法
WO2018037992A1 (fr) * 2016-08-22 2018-03-01 千住金属工業株式会社 Corps de liaison fritté métallique et procédé de liaison de puce
JPWO2018037992A1 (ja) * 2016-08-22 2018-08-23 千住金属工業株式会社 金属焼結接合体、およびダイ接合方法
KR20190022893A (ko) * 2016-08-22 2019-03-06 센주긴조쿠고교 가부시키가이샤 금속 소결 접합체 및 다이 접합 방법
CN109643663A (zh) * 2016-08-22 2019-04-16 千住金属工业株式会社 金属烧结接合体和芯片接合方法
KR101971416B1 (ko) 2016-08-22 2019-04-22 센주긴조쿠고교 가부시키가이샤 금속 소결 접합체 및 다이 접합 방법
AU2017317329B2 (en) * 2016-08-22 2019-05-02 Senju Metal Industry Co., Ltd. Metallic sintered bonding body and die bonding method
TWI689016B (zh) * 2016-08-22 2020-03-21 日商千住金屬工業股份有限公司 金屬燒結接合體、及晶片接合方法
US11024598B2 (en) 2016-08-22 2021-06-01 Senju Metal Industry Co., Ltd. Metallic sintered bonding body and die bonding method
JP2018043261A (ja) * 2016-09-13 2018-03-22 トヨタ自動車株式会社 半導体装置の電極に接合される接合材
CN108520901A (zh) * 2018-04-16 2018-09-11 江苏宜兴德融科技有限公司 薄膜太阳能电池及其制造方法

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