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WO2002021600A1 - Element de commutation a canal court et procede permettant de produire cet element - Google Patents

Element de commutation a canal court et procede permettant de produire cet element Download PDF

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Publication number
WO2002021600A1
WO2002021600A1 PCT/JP2001/007088 JP0107088W WO0221600A1 WO 2002021600 A1 WO2002021600 A1 WO 2002021600A1 JP 0107088 W JP0107088 W JP 0107088W WO 0221600 A1 WO0221600 A1 WO 0221600A1
Authority
WO
WIPO (PCT)
Prior art keywords
insulating layer
drain
switching element
channel switching
source
Prior art date
Application number
PCT/JP2001/007088
Other languages
English (en)
Japanese (ja)
Inventor
Shunri Oda
Katsuhiko Nishiguchi
Original Assignee
Japan Science And Technology Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Science And Technology Corporation filed Critical Japan Science And Technology Corporation
Publication of WO2002021600A1 publication Critical patent/WO2002021600A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66469—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with one- or zero-dimensional channel, e.g. quantum wire field-effect transistors, in-plane gate transistors [IPG], single electron transistors [SET], Coulomb blockade transistors, striped channel transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds

Definitions

  • the present invention relates to a switching element in which a drain current is switched by applying a gate voltage to a channel between a source and a drain, and more particularly to a short channel switching in which an interval between channels is 10 to: I00 nm. It concerns the element.
  • MOSFET MOSFET
  • switching element MOSFET
  • MOS FET MOS field-effect transistor
  • a MOSFET 1 has an n + -type source 4 and a drain 5 formed on a p-type semiconductor substrate 2 with a gap 3 therebetween, an insulating layer 6 is formed thereon, and furthermore, The gate electrode 7 is formed in a region corresponding to the gap 3. According to the MOSFET 1 having such a configuration, by applying a gate voltage to the gate 7, the p-type semiconductor layer immediately below the insulating layer 6 can be used as a carrier inversion layer or an empty layer to perform switching of drain current. ing.
  • an object of the present invention is to provide a short channel switching element and a method of manufacturing the same based on a new operation principle that does not cause a short channel effect. Disclosure of the invention
  • a short channel switching element comprises: a source and a drain facing each other by forming a minute gap on a first insulating layer; and a silicon quantum forming a channel in the minute gap. It is characterized by comprising a dot, a second insulating layer formed on the source, the drain and the minute gap, and a gate formed on the second insulating layer in a region corresponding to the minute gap. .
  • the interval between the minute gaps is preferably 10 to 100 nm.
  • the silicon quantum dots are preferably nanocrystalline silicon ultrafine particles having a particle size of 5 to 10 nm, and a thickness of 1 to 10 nm formed over the surface of the nanocrystalline silicon ultrafine particles.
  • the voids between the silicon quantum dots in the minute gaps are filled with an insulator constituting the second insulating layer.
  • the thickness of the second insulating layer is preferably
  • the first and second insulating layers are preferably silicon oxide films.
  • each silicon quantum dot forming the channel forms a potential well, and the oxide film barrier between each silicon quantum dot forms a potential barrier. If a voltage is applied between the source and the drain, and a gate is applied to the gate electrode, the probability of tunneling of conduction electrons through the potential barrier changes, and the drain current is applied to the gate electrode. I do. That is, the drain current can be switched by appropriately adjusting the ⁇ BE of the gate @@.
  • the method for manufacturing a short-channel switching element according to the present invention includes a step of forming a source and a drain on the first insulating layer, and a step of forming a channel made of silicon quantum dots in a minute gap between the source and the drain.
  • the SOI which is the surface Si layer of the SIMOX substrate
  • the SOI is etched to a predetermined thickness, and ion-implanted into this layer to perform a predetermined process.
  • a Si layer having resistivity is formed, and this layer is formed by etching with electron beam lithography and ECR-RIE.
  • the second insulating layer is preferably formed by depositing an insulator by a CVD method.
  • the step of forming 3 ⁇ 4 @ on the second edge layer is preferably by a lift-off method.
  • the short channel switching element of the present invention can be manufactured.
  • FIG. 1 is a schematic perspective view showing the configuration of a short channel switching element according to the present invention.
  • FIG. 2 is a partially enlarged plan view of the short channel switching element of FIG.
  • FIG. 3 is a schematic view of a quantum dot constituting the short channel switching element of the present invention.
  • FIG. 4 is a diagram for explaining a manufacturing process of the short channel switching element according to the present invention.
  • FIG. 5 is a schematic diagram showing the electron energy band of the channel of the short channel switching element of the present invention.
  • FIG. 6 is a schematic diagram showing an electron energy band of a channel when a positive voltage is applied to the gate of the short channel switching element of the present invention.
  • FIG. 5 is a diagram showing switching operation characteristics of the short channel switching element according to the present invention.
  • Fig. 8 ( ⁇ ) is a schematic diagram showing the operation state when the silicon quantum dot density in the channel of the short channel switching element is low, and ( ⁇ ) is a schematic view showing the operation state when the density is high.
  • FIG. 9 is a schematic cross-sectional view showing a configuration of an example of a conventional MOS FET. BEST MODE FOR CARRYING OUT THE INVENTION
  • FIG 1 and 2 show the configuration of an embodiment of the short channel switching device according to the present invention.
  • a short channel switching element 10 is composed of a substrate 11 as a first insulating layer and a source 1 formed on the substrate 11 so as to face each other so as to form a minute gap 12.
  • quantum dots 15, which are a large number of nanocrystalline silicon ultra-fine particles deposited in the minute gaps 12, deposited on these sources 13, drains 14 and minute gaps 12 a second S i 0 2 formed Ru oxide film 1 6 as an insulating layer which is at the surface of the oxide film 1 6, gate one sheet 1 which is formed in a region corresponding to the just above the minute gap 1 2 7 and.
  • Substrate 1 1 as the first insulating layer is composed of, for example, a S i 0 2, etc., are selected for example to a width of 2 0 0 nm.
  • the source 13 and the drain 14 are composed of, for example, Si, and are selected to have a thickness of, for example, 30 nm, and have a gap 12 with a length of 20 nm therebetween. Is formed.
  • the source 13 and the drain 14 are integrally formed with the substrate 11 by using a so-called SI 0 (Sion Insulator), and have an appropriate shape as described later. Formed by etching.
  • SI 0 Silicon Insulator
  • the silicon quantum dots 15 are, for example, Si single crystal fine particles 15a made of spherical nanocrystalline silicon ultrafine particles having a particle diameter of 10 nm or less, and a thickness covering the surface thereof. It is composed of an oxide film (S i 0 2 ) 15 b of l to 3 nm. Then, as shown in FIG. 2, the silicon quantum dots 15 are For example, while being deposited at a density of about 10 12 Zcm 2 , the gap between the silicon quantum dots 15 and the gap between the silicon quantum dots 15 and the drain 14 and the source 13 are filled with the oxide film 16 as the second insulating layer. ing.
  • the oxide film on the surface is formed, for example, by exposing to an O 2 or N 2 gas atmosphere or exposing to an O 2 or N 2 gas plasma.
  • the silicon quantum dots 15 form a tunnel junction between the adjacent silicon quantum dots 15 and the source 13 and the drain 14 via the oxide film 15b and the oxide film 16.
  • the silicon quantum dots 15 are intrinsic halves, electrons can be injected from the gate electrode 17 and operate as a semiconductor having a high carrier concentration.
  • the oxide film 16 as the second insulating layer is made of, for example, SiO 2 and has a thickness of, for example, 50 nm.
  • the gate 17 is made of, for example, metal or the like, and is formed slightly longer than the gap 12 so as to slightly overlap with the source 13 and the drain 14 as shown in the plan view of FIG. ing.
  • Such a short channel switching element 10 is manufactured by the manufacturing method according to the present invention shown in FIG.
  • a SIMOX substrate 20 is prepared.
  • the S IM OX substrate 20 is a commercially available product.
  • a 400 nm thick S i O 2 film 22 is laminated on a Si (100) substrate 21, and a 200 nm thick single crystal Si is further formed thereon. It is formed by stacking SOI 23 films.
  • silicon quantum dots 15 having a particle size of 5 to 10 nm are deposited at a density of 10 lz / cm 2 on the entire surface of the SiO 2 film 22.
  • silicon quantum dots 15 are deposited in the gap 12 between the source 13 and the drain 14.
  • the entire surface of the S i 0 2 film 22 is deposited an oxide layer 16 consisting of S i 0 2 in »5 onm.
  • the gap not occupied by the silicon quantum dots 15 in the gap 12 is filled with the oxide film 16.
  • a conductive film is formed on the surface of the oxide film 16, and the conductive film is patterned to form a gate 17 in the region above the gap 12.
  • a source electrode 13a and a drain electrode 14a are formed on the source 13 and the drain 14, respectively.
  • the short-channel switching element 10 is configured as described above and operates as follows.
  • the silicon quantum dots 15 of 3 ⁇ 4 are arranged between the source 13 and the drain 14.
  • the energy band structure shown in Fig. 1 is composed.
  • reference numeral 18 denotes a potential barrier of conduction electrons formed by the oxide film 15b and the oxide film 16 of the silicon quantum dot 15, and 15c is formed by the Si single crystal fine particles 15a of the quantum dot 15.
  • the drain voltage Vd is distributed to each potential barrier 18, and each potential barrier 18 has a gradient that decreases toward the drain side. This gradient of the potential barrier 18 is increased by increasing the drain voltage Vd, and the tunneling probability of the potential barrier 18 for conduction electrons is increased. Conversely, by decreasing the drain voltage Vd, this slope of the potential barrier 18 is reduced by / _ !, and the tunneling probability of the conduction electron potential barrier 18 is reduced. Therefore, the conduction electron current flowing from the source to the drain can be controlled by the drain voltage Vd.
  • the gradient of each potential barrier 18 changes as shown in FIG. 6 by applying a gate voltage V g to the gate 17.
  • a gate voltage V g When a positive gate voltage V g is applied to the gate 17, the gradient of each potential barrier 18 changes as shown by a dotted line B, and the potential from the source 14 side to the vicinity of the center of the gap 12 changes. Since the gradient of the barrier 18 becomes large, the tunneling probability of the potential barrier 18 of the conduction electrons in this part increases, and the conduction electron current flowing from the source to the drain increases.
  • the conduction electron current from the source 13 to the drain 14 is distributed to a plurality of sets of silicon quantum dots 15 and flows between the individual quantum dots 15. Even if the particle diameter or the thickness of the oxide film on the surface varies, the conduction electron current force is averaged, so that a short-channel switching device with little variation between devices can be obtained.
  • FIG. 7 shows the switching operation characteristics of the short-channel switching element 10, that is, the change of the drain current with respect to the gate voltage.
  • the gate voltage Vg varies from ⁇ 15 V to +10 V ⁇ (
  • the drain current I flowing from the drain 14 to the source 13 through the channel that is the silicon quantum dot 15 is about 1 when the drain voltage V DS is in the range of 0.1 to 10 OmV.
  • 0- 1 3 a to about 1 0 one 9 it can be seen that the Heni ⁇ to ⁇ 1 0 one 6 Ag ⁇ from. Therefore, on 'off ratio from 4-digit 7-digit ⁇ a switch Operation was confirmed.
  • the density of the silicon quantum dots 15 constituting the channel in the gap 12 is low, the number of silicon quantum dots 15 in the gap 12 decreases as shown in FIG. Since the oxide film between the quantum dots 15 becomes thicker, the tunneling probability of electrons is greatly reduced, and the switching characteristics are deteriorated.
  • the density of the silicon quantum dots 15 deposited in the gap 12 is high, the silicon quantum dots 15 are moved from the gap 12 to the gate electrode 1 as shown in FIG. 8 (B). Since the overflowed silicon quantum dots 15 have a shielding effect against the gate 3 ⁇ 4g 17, the gate 3 ⁇ 4EV g weakens the gate power given to the channel.
  • the silicon quantum dots 15 in the gap 12 need to be deposited in the gap 12 at a density of substantially 10 12 / cm 2 .
  • the length of the gap 12 is 20 nm
  • the particle size of the silicon quantum dot 15 is 10 nm or less
  • the thickness of the oxide film 16 as the second insulating layer is 50 nm.
  • the thickness of nm, the thickness of the source 13 and the thickness of the drain 14 are set to 30 nm, these are merely examples.
  • the thickness of the oxide film 16 and the thicknesses of the source 13 and the drain 14 are preferably as thin as possible.
  • the length of the gap 12 is 10 to: L 0 nm
  • the particle size of the silicon quantum dots 15 is 5 to: L 0 nm
  • the thickness of the oxide film 16 It is possible to select a thickness between 10 and 50 nm.
  • each silicon quantum dot constituting a channel constitutes a potential well, and an oxide film barrier between each silicon quantum dot constitutes a potential barrier.
  • a gate voltage is applied to the gate electrode by applying a voltage between the source and the drain, the tunnel probability of conduction electrons passing through the potential barrier changes, and the drain current is changed by the voltage applied to the gate electrode. Change. That is, the drain current can be switched by appropriately adjusting 3 ⁇ 4 ⁇ of the gate Wf3 ⁇ 4.
  • the source and drain of the short-channel switching element 10 are formed by, for example, electron beam lithography and ECR-RIE, and
  • the fe edge layer (oxide film) can be formed by CVD and lift-off, respectively.
  • the gap between the source electrode and the drain electrode is, for example, 10 to 100 nm, and nanocrystalline silicon quantum dots having a particle size of 5 to 10 nm are deposited in the gap, thereby providing a short channel.
  • a switching element when 3 ⁇ 4JE is applied to the gate electrode, a depletion layer is not generated unlike the conventional MOSFET, so that a short channel effect does not occur and the gate electrode voltage
  • a short-channel switching element based on a new operation principle which does not cause a short-channel effect.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
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  • Crystallography & Structural Chemistry (AREA)
  • Thin Film Transistor (AREA)

Abstract

L'invention concerne un élément de commutation à canal court fonctionnant selon un principe permettant de ne pas produire d'effet de canal court. Cet élément commutateur à canal court comprend une couche (11) isolante, une source (13) formée sur cette couche (11) isolante, un drain (14) formé sur la couche (11) isolante, opposé à la source et séparé de celle-ci par un espace (12) réduit d'une longueur inférieure à 20 nm, des points (15) quantiques de silicium déposés dans cet espace (12) réduit, et une grille (17) formée sur la seconde couche isolante dans la région correspondant à cet espace réduit. L'invention concerne également un procédé permettant de produire un tel élément de commutation à canal court.
PCT/JP2001/007088 2000-09-01 2001-08-17 Element de commutation a canal court et procede permettant de produire cet element WO2002021600A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000265680A JP2002076358A (ja) 2000-09-01 2000-09-01 短チャネルスイッチング素子及びその製造方法
JP2000-265680 2000-09-01

Publications (1)

Publication Number Publication Date
WO2002021600A1 true WO2002021600A1 (fr) 2002-03-14

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PCT/JP2001/007088 WO2002021600A1 (fr) 2000-09-01 2001-08-17 Element de commutation a canal court et procede permettant de produire cet element

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WO (1) WO2002021600A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101018559A (zh) * 2004-06-17 2007-08-15 安姆根山景公司 c－MET激酶结合蛋白
US8227300B2 (en) 2009-03-18 2012-07-24 International Business Machines Corporation Semiconductor switching circuit employing quantum dot structures
US8242542B2 (en) 2009-02-24 2012-08-14 International Business Machines Corporation Semiconductor switching device employing a quantum dot structure

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KR100558287B1 (ko) 2002-12-10 2006-03-10 한국전자통신연구원 단전자 소자, 그 제조 방법 및 단전자 소자와 ｍｏｓ트랜지스터를 동시에 형성하는 제조방법
JP2006019672A (ja) 2004-06-02 2006-01-19 Seiko Epson Corp トランジスタの製造方法、電気光学装置の製造方法、および電子デバイスの製造方法
JP4853607B2 (ja) 2004-07-09 2012-01-11 セイコーエプソン株式会社 薄膜トランジスタの製造方法
JP4966486B2 (ja) 2004-09-27 2012-07-04 国立大学法人電気通信大学 結晶質シリコン内在ＳｉＯｘ成形体の製造方法とその用途
JP2006286681A (ja) * 2005-03-31 2006-10-19 Kyushu Institute Of Technology 電界効果型トランジスタ及びその製造方法
JP2008166729A (ja) 2006-12-08 2008-07-17 Canon Anelva Corp 基板加熱処理装置及び半導体製造方法
JP2008288346A (ja) * 2007-05-16 2008-11-27 Hiroshima Univ 半導体素子
JP4550916B2 (ja) * 2007-05-29 2010-09-22 キヤノンアネルバ株式会社 ナノシリコン半導体基板を用いた半導体回路装置の製造方法
US7666763B2 (en) 2007-05-29 2010-02-23 Canon Anelva Corporation Nanosilicon semiconductor substrate manufacturing method and semiconductor circuit device using nanosilicon semiconductor substrate manufactured by the method

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JPH0982939A (ja) * 1995-09-19 1997-03-28 Toshiba Corp 微細構造素子およびその製造方法
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101018559A (zh) * 2004-06-17 2007-08-15 安姆根山景公司 c－MET激酶结合蛋白
US8242542B2 (en) 2009-02-24 2012-08-14 International Business Machines Corporation Semiconductor switching device employing a quantum dot structure
US8445967B2 (en) 2009-02-24 2013-05-21 International Business Machines Corporation Semiconductor switching device employing a quantum dot structure
US8227300B2 (en) 2009-03-18 2012-07-24 International Business Machines Corporation Semiconductor switching circuit employing quantum dot structures
US8624318B2 (en) 2009-03-18 2014-01-07 International Business Machines Corporation Semiconductor switching circuit employing quantum dot structures

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