TWI360211B - Wafer-level interconnect for high mechanical relia - Google Patents
Wafer-level interconnect for high mechanical relia Download PDFInfo
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- TWI360211B TWI360211B TW096137172A TW96137172A TWI360211B TW I360211 B TWI360211 B TW I360211B TW 096137172 A TW096137172 A TW 096137172A TW 96137172 A TW96137172 A TW 96137172A TW I360211 B TWI360211 B TW I360211B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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Description
1360211 九、發明說明: 【發明所屬之技術領域】 本揭示大體而言係有關於半導體元件之結構和方法, 並且更明確地說,係有關於電子晶圓級晶片尺寸封裝和覆 晶封裝及組件之結構和方法。 【先前技術】1360211 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD The present disclosure relates generally to structures and methods for semiconductor devices, and more particularly to electronic wafer level wafer size packages and flip chip packages and assemblies. Structure and method. [Prior Art]
電子封裝產業對於改善無鉛(Pb)焊料之機械效能的想 望存在已久,其係用於晶圓級晶片尺寸封裝和覆晶元件兩 者。先前努力包含微量添加或摻雜以各式元素,例如鈷和 鋅。先前努力也包含研究摻雜(例如,摻雜鈦,鐵、鈷、鉑、 銦和鎳)對於無鉛焊料之機械性質的影響。The electronics packaging industry has long had a desire to improve the mechanical performance of lead-free (Pb) solders for wafer-level wafer size packaging and flip chip components. Previous efforts have included minor additions or doping with various elements such as cobalt and zinc. Previous efforts have also included the study of the effects of doping (eg, doping titanium, iron, cobalt, platinum, indium, and nickel) on the mechanical properties of lead-free solders.
觀察到現存内連結構之一問題是來自個別、組合或一 系列的機械損壞事件的早期内連結構失效,例如掉落衝擊 (drop shock)、震動、和剪力。先前技藝解決此問題並增加 接合點機械強度的嘗試包含使用楊格係數(Young’s m 〇 d u 1 u s)及硬度較低的無紹焊料,以藉由使焊料更具撓性 來辅助降低脆弱的内連線結構斷裂(例如,銦基無鉛焊料、 錫一銅無錯焊料、或銀含量較少的錫一銀一銅合金)。這些 先前技藝嘗試並無法令人滿意地除去早期内連線失效。 據此,期望在使用焊料來製造晶圓級晶片尺寸封裝或 覆晶元件時擁有改善的接合點機械強度。 【發明内容】 5 1360211 在此所述之結構包含設置在隔開之電氣接觸之間的内 連結構。該内連結構含有實質上由鎳(Ni)、錫(sn)、銀(Ag) 和銅(Cu)所組成的無鉛(Pb)烊料合金。該無鉛(Pb)焊料合金 内的鎳(Ni)係在重量百分比(wt%)0.01至0.20範圍内。One of the problems observed with existing interconnected structures is the failure of early interconnect structures from individual, combined or a series of mechanical damage events, such as drop shock, shock, and shear. Previous attempts to solve this problem and increase the mechanical strength of the joint include the use of Young's m 〇du 1 us and lower hardness solder to aid in reducing the fragile interior by making the solder more flexible. The wiring structure is broken (for example, indium-based lead-free solder, tin-copper-free solder, or tin-silver-copper alloy with less silver content). These prior art attempts have not satisfactorily removed early interconnect failures. Accordingly, it is desirable to have improved joint mechanical strength when using solder to fabricate wafer level wafer scale packages or flip chip components. SUMMARY OF THE INVENTION 5 1360211 The structure described herein includes an interconnect structure disposed between spaced electrical contacts. The interconnect structure contains a lead-free (Pb) tantalum alloy consisting essentially of nickel (Ni), tin (sn), silver (Ag), and copper (Cu). The nickel (Ni) in the lead-free (Pb) solder alloy is in the range of 0.01 to 0.20 by weight (wt%).
在此所述之結構之一實施例係一元件,其含有基材、 設置在該基材上之第一金屬層、設置在該金屬層上之焊料塊 材主體;以及透過該焊料塊材主體與該金屬層連結的晶圓元 件。該焊料塊材主體係由鎳(Ni)、錫(Sn)、銀(Ag)和鋼(Cu) 所組成。鎳(Ni)係在重量百分比(wt%)〇.〇l至0.20範圍内。 【實施方式】 如下描述和圖式示出足以使熟知技藝者實施在此所述 之系統和方法的特定實施例。其它實施例可包含結構、邏 輯、製程和其他改變。範例僅代表可能的變異。An embodiment of the structure described herein is an element comprising a substrate, a first metal layer disposed on the substrate, a solder block body disposed on the metal layer, and a body of the solder block A wafer element coupled to the metal layer. The solder block main system is composed of nickel (Ni), tin (Sn), silver (Ag), and steel (Cu). Nickel (Ni) is in the range of weight percent (wt%) 〇.〇l to 0.20. [Embodiment] The following description and drawings illustrate specific embodiments of the systems and methods described herein. Other embodiments may include structural, logical, process, and other changes. The examples represent only possible variations.
下面描述執行本結構和方法之各實施例的元件。可用 熟知結構來配置許多元件。也應了解本結構和方法的技術 可運用多種技巧來執行》 本發明大體而言係有關於一種改善的内連結構,其使 用含有比例相當低的鎳之焊料合金。該改善的結構通常提 供’例如,用來生產晶圓級晶片尺寸封裝(chip-scale package,CSP)或覆晶内連結構之無鉛焊料改善的接合點 機械強度而擁有長效機械可靠度。在一實施例中,使用重 量百分比(wt°/〇)0.〇1至〇.20的鎳輔助無鉛焊料合金。例 如,無鉛焊料合金較佳地實質上由錫一銀一銅和 0.01至 6 0.2 0 wt%的鎳組成。一般可以習知比例使用錫、銀、和銅。 該焊料合金可以,例如,回流並連接至球下金屬層 (under bump metal) »其可,例如’形成為真空沉積薄膜或 電鍍膜。可用其他習知製造技術來製造如下所述之内連结 構。 咸信鎳輔助無鉛合金與球下金属層 (under-bump-metallurgy, UBM)的組合一般會提供改善的 接合點機械強度,藉由控制焊料塊材内焊料/ UBM介面以 及錫晶粒邊界(内部樹枝狀結構)之介金屬形成。這由發明 人在改善的高速剪力狀態中觀察到並透過掉落測試結果得 到證實,與使用無鎳輔助之無鉛合金的相同結構比較》此 接合點強度的改善對於使用晶圓級C S P或覆晶内連結構的 電子元件來說是有益的,其中該元件易於掉落’特別是行 動物件,例如行動電話、個人數位助理、Mp3播放器、遊 戲機等。 現在將在後方更詳細討論可執行該鎳輔助焊料合金内 連結構之結構的更具體實施例。在第一實施例中,焊料係 用來在兩個不同基材之間形成内連結構。該内連結構通常 包含焊料塊材組成’以及金屬互化物(intermetallic compound, IMC)在該焊料塊材和該晶圓上之金屬結構(例 如UBM)介面處。該IMC係利用冶金反應形成在該焊料和 該UBM之間。 UBM通常被歸類為薄膜或厚膜。薄膜UBM通常係由 真空沉積形成(例如濺鑛沉積或蒸锻)。厚膜UBM通常是利 1360211 用電鍵形成。適合的UBM結構之範例是以鋼接觸該焊科 之銘-錄(鈒)—鋼。其他可能的選擇包含,但不限:如 下合金:欽/錄叙/飼、欽/錄/銅、鈦鴿/鋼欽鎮/ 錄/銅、欽鎮/鎳釩/銅、鉻/鎳/銅或鉻/鎳訊/銅。 ϋ合的厚膜刪t範例可使用如下合金形成:銅錄磷 /金、鎳磷/鎳鈀/金、鈀磷/金、鈀磷、鎳/金或鋼 /鎳/金。 / 内連結構之接合點強度取決於該焊料塊材的延展性 (撓性)以及IMC在焊料/ UBM界面處的接合點機械強度。 雖然預期内連結構有增強的可靠性,但介面imc本身被視 為是相當脆弱的。 咸信無鉛焊料内連結構之改善的接合點機械效能可由 如下幾點之-或組合來輔助:改善焊料塊材微結構性質、 改善_結構的相容性(例如,咖膜應力水準或可溶 性)、以及藉由改善對於介面IMC成長和發展之控制。 藉由使用已知的尚速剪力和高速冷拉球試驗(㈣ ρ—υ來模擬機械掉落衝擊事件觀察到利用在晶圓級 和覆曰曰内連結構上使用擁有上述禪料合金内連結構之 焊料塊材所得到的改善。今封私—a Μ Λ 吾该4驗包含使用大範圍的測試條 件參數(例如,衝擊剪力、 w力拉逮'和衝擊剪力高度),以估 量使用鎳辅助焊料所得到的 又。使用已知掉落試驗設備 y他試驗測試以錦辅助焊料製成之結構的掉落測試可靠 度’其表現比可得的i妯雄撙Ss ,、他選擇顯者好許多。測試也包含擁 有加強的總薄膜應γ UBM選 寻膜愿力水準和可溶金屬厚度之各種 8 1360211 擇的相容性測試。 第1圊示出組裝至基材前的晶圓級晶片尺寸或覆晶封 裝100之一部分的剖面圖。提供一晶圓元件1〇2(例如,典 型的積逋電路(1C)晶粒)以進行隨後至基材的連接(見第2 圖)。一 UBM 108,形成在晶圓元件102上,在介面mc 114 處與焊料塊材106(例如,焊料凸塊或錫球)接觸。在實際 的封裝中,通常會使用大量的焊料凸塊或錫球。 第2圖示出組裝後的焊料内連结構2〇〇之一部分的剖 面圖。利用焊料塊材106將晶圓元件1〇2與基材104(例 如,印刷電路板)連接。 在基材104上形成習知金屬表面處理或層n〇,其對 於焊料附著具傳導性’並在介面IMC 112處與焊料塊材1〇6 接觸。焊料塊材106擁有在此所述之焊料合金成分。金屬 表面處理110可’例如,擁有與UBM類似的銅上層《但 並非總是如此。若金屬表面處理11〇擁有銅表面處理,其 厚度通常顯著大於晶圓側上的UBM者。基材104上的銅 表面處理範圍可在,例如,約2至5微米(pms)。 可使用各種基材104表面處理。例如,一種普遍的基 材表面處理是位於表面上之連同有機層的銅,以保護鋼不 受氧化’稱為”銅OSP’’。其它範例是鎳磷/金,或銀(有時 稱為浸鍍銀)。 介面IM C 1 1 4的厚度可以是,例如,低於約2 〇微米 (pms)。UBM 108的厚度可以是,例如,低於約2.〇微米 (pms) β這些厚度在其他實施例中可大幅度改變。 9 1360211Elements that perform various embodiments of the present structures and methods are described below. Many components can be configured with well-known structures. It should also be understood that the techniques of the present structures and methods can be performed using a variety of techniques. The present invention generally relates to an improved interconnect structure using a solder alloy containing a relatively low proportion of nickel. The improved structure typically provides, for example, a lead-free solder for wafer-scale package (CSP) or flip-chip interconnect structure with improved joint mechanical strength and long-term mechanical reliability. In one embodiment, a nickel assisted lead-free solder alloy having a weight percentage (wt ° / 〇) of 0. 〇 1 to 20 . 20 is used. For example, the lead-free solder alloy preferably consists essentially of tin-silver-copper and 0.01 to 60.20 wt% nickel. Tin, silver, and copper can generally be used in a conventional ratio. The solder alloy may, for example, be reflowed and attached to an under bump metal (which may be formed, for example, as a vacuum deposited film or a plated film). Other conventional manufacturing techniques can be used to make the inner structure as described below. The combination of a salt-free nickel-assisted lead-free alloy and an under-bump-metallurgy (UBM) generally provides improved joint mechanical strength by controlling the solder/UBM interface and tin grain boundaries within the solder block (internal The metal structure of the dendritic structure. This was confirmed by the inventors in the improved high-speed shear state and confirmed by the drop test results, compared to the same structure using a nickel-free lead-free alloy. This joint strength improvement is for the use of wafer level CSP or overlay. It is advantageous to have an electronic component of a crystal interconnect structure in which the component is susceptible to falling, particularly mobile objects such as mobile phones, personal digital assistants, Mp3 players, game consoles and the like. A more specific embodiment of the structure in which the nickel auxiliary solder alloy interconnect structure can be performed will now be discussed in more detail later. In the first embodiment, the solder is used to form an interconnect structure between two different substrates. The interconnect structure typically comprises a solder block composition' and an intermetallic compound (IMC) at the solder block and a metal structure (e.g., UBM) interface on the wafer. The IMC is formed between the solder and the UBM using a metallurgical reaction. UBM is usually classified as a film or a thick film. The film UBM is typically formed by vacuum deposition (e.g., splash deposition or steam forging). The thick film UBM is usually formed by a bond using the 1360211. An example of a suitable UBM structure is steel contact with the name of the welding company. Other possible options include, but are not limited to: the following alloys: Chin / Record / Feed, Chin / Record / Copper, Titanium / Steel Chin Town / Record / Copper, Chin Town / Nickel Vanadium / Copper, Chromium / Nickel / Copper Or chrome / nickel / copper. A composite thick film t-type can be formed using the following alloys: copper-phosphorus/gold, nickel-phosphorus/nickel-palladium/gold, palladium-phosphorus/gold, palladium-phosphorus, nickel/gold or steel/nickel/gold. The joint strength of the interconnect structure depends on the ductility (flexibility) of the solder block and the joint mechanical strength of the IMC at the solder/UBM interface. Although the interconnect structure is expected to have enhanced reliability, the interface imc itself is considered to be quite fragile. Improved joint mechanical performance of the lead-free solder interconnect structure can be assisted by: - or a combination of: improving the microstructure of the solder block, improving the compatibility of the structure (eg, stress level or solubility of the coffee film) And by improving control over the growth and development of the interface IMC. Using the known tempering shear and high-speed cold-drawn ball test ((iv) ρ-υ to simulate a mechanical drop impact event observed using the above-mentioned zen alloy within the wafer level and the overlay internal structure Improvements in the structure of the solder block. This is a test that uses a wide range of test conditions (eg, impact shear, w force pull and impact shear height) to Estimate the use of nickel-assisted solder. Using the known drop test equipment y, he tested the drop test reliability of the structure made of Jin-assisted solder, which is better than the available 妯S妯, he The choice is much better. The test also includes a compatibility test with a variety of 8 1360211 for the total film thickness of the γ UBM selected film and the thickness of the soluble metal. The first test shows the assembly before the substrate is assembled. A wafer-level wafer size or a cross-sectional view of a portion of a flip chip package 100. A wafer component 1〇2 (eg, a typical build-up circuit (1C) die) is provided for subsequent connection to the substrate (see section 2). Figure). A UBM 108, formed on wafer component 1 02, contact with solder bumps 106 (eg, solder bumps or solder balls) at interface mc 114. In actual packages, a large number of solder bumps or solder balls are typically used. Figure 2 shows the assembly A cross-sectional view of a portion of the solder interconnect structure 2. The wafer element 1〇2 is bonded to a substrate 104 (eg, a printed circuit board) by a solder block 106. A conventional metal surface treatment is formed on the substrate 104. Or layer n〇, which is conductive to solder adhesions and is in contact with solder bumps 1〇6 at interface IMC 112. Solder block 106 possesses the solder alloy composition described herein. Metal surface treatment 110 may 'for example, It has a copper upper layer similar to UBM. "But it is not always the case. If the metal surface treatment has a copper surface treatment, the thickness is usually significantly larger than the UBM on the wafer side. The copper surface treatment on the substrate 104 can be, For example, about 2 to 5 micrometers (pms). Various substrate 104 surface treatments can be used. For example, a common substrate surface treatment is copper on the surface along with the organic layer to protect the steel from oxidation 'called' Copper OSP''. Other Examples are nickel phosphorus/gold, or silver (sometimes referred to as immersion silver plating). The thickness of the interface IM C 1 1 4 can be, for example, less than about 2 〇 micrometers (pms). The thickness of the UBM 108 can be, for example, The thickness below about 2. pm (βs) β can vary greatly in other embodiments. 9 1360211
在此所述之内連結構和方法可在,例如,又其他類型 的晶片尺寸或晶圓級封裝中實施(例如,板上連接式晶片封 裝(chip-on-board,COB’)组件應用或用於覆晶封裝應用之 標準覆晶封裝)此類實施之範例在美國專利第6,441,487號 (2002年8月27號核准予Elenius等,標題為使用高延展 錫球之晶片尺寸封裝)和美國專利第5,844,304號(1998年 12月1號核准予Kata等,標題為製造半導體元件和半導 體晶圓之製程)、以及美國專利第5,547,740號(1 996年8 月20號核准予Higdon等,標題為覆晶積體電路元件之可 焊接觸)和美國專利第6,251,501號(2001年6月26號核准 予Higdon等,標題為表面黏著電路元件和其焊料凸塊方法) 中描述,每一者皆在此藉由引用其至少關於封裝應用、結 構和製造方法之教示的方式併入本文中。The interconnect structures and methods described herein can be implemented, for example, in other types of wafer size or wafer level packages (eg, on-chip-on-board (COB') component applications or Standard flip chip package for flip chip packaging applications. Examples of such implementations are disclosed in U.S. Patent No. 6,441,487 (issued to Alenius et al. on August 27, 2002, entitled to the use of high-stretch solder ball wafer size packages) and US patents. No. 5,844,304 (issued to Kata et al. on December 1, 1998, entitled Process for Manufacturing Semiconductor Components and Semiconductor Wafers), and U.S. Patent No. 5,547,740 (Approved to Higdon et al., August 20, 1996, titled The solderable contact of the crystallographic circuit component is described in U.S. Patent No. 6,251,501 (issued to Higdon et al., entitled: Surface Mounting Circuit Components and Solder Bump Methods, June 26, 2001), each of which is incorporated herein by reference. This is incorporated herein by reference in its entirety to the teachings of the application, structure, and method of manufacture.
現在在具體範例中更詳細討論該内連結構本身。在一 實施例中’一無鉛焊料合金實質上由錫—銀—鋼和〇.〇1至 〇·20 wt%的鎳組成。該無鉛焊料合金之一範例是98.4%錫 1·0/ό銀一0.5%銅一 0.1%錄。做為該錫一銀一銅組成之範 例’銀成分可以是約0.25至4.0 wt〇/〇,而銅約〇至2.0 wt0/〇。 錫成分可以是,例如,約99.75至94.5 wt%,或提供任何 上列成分的平衡。如在任何焊料組成中者,通常有微量元 素存在,其係不重要的並且當保持在習知標準内時預期不 會影響到該内連結構的性質。該焊料合金可以是,例如, 不連續焊料球體(即,錫球)或錫膏型態。該焊料可以,例 如’回流至利用真空沉積薄骐或電鍍膜形成的UBM處。 10 咸信上述焊料合金組成連同UBM的應用 料回流後於該UBM/焊料介面處提供較平滑、 屬厚度,其最小化此脆弱介面的異質成長。在 例中,該UBΜ的上層是銅,其與該焊料塊材 確地說,在一較佳實施例中,該UBM上表面 鋼在該回流製程期間形成為介金屬(IMC)層, UBM中之邊界錄層。相反地,若該UBM僅是 銅層,則其絕不會在製程中任何時點或介面處与 此外,咸信上述結構的使用可在焊料回流 塊材内圍繞該錫晶粒邊界處的内部樹枝狀焊接 低程度的介金屬。這協助使該焊料塊材比無錄 更具撓性。在一實施例中,該UBM結構擁有肩 因為某些封裝產業所需要之薄膜需求。這與僅 的電锻銅相悖,其無法適切符合UBM製造封 該較佳實施例中的U B Μ擁有其他薄膜金屬層 應在UBM上層中使用足夠的銅以將IMC形成 滑度。例如,該UBM中銅層的最小厚度應該是 在該較佳實施例中,該UBM内的銅與焊料中 形成該平滑的IMC層β該UBM内的錄也可在 對IMC形成產生貢獻。 在其他實施例中’該UBM中之不同金屬 與該焊料反應並對該IMC的形成及其性質產 如,在一鎳磷基UBM中’該UBM内的鎳可 錫而非銅反應而形成該平滑的IMC層。 可輔助在焊 較薄的介金 一較佳實施 反應。更明 内大部分的 這暴露出該 一相當厚的 皮完全消耗。 後在該焊料 區内提供較 摻雜的合金 限量的銅, 使用一薄層 裝的要求。 ’例如鎳銳β 至預期的平 約7,000埃。 的鎳反應而 .某些程度上 結構組合會 生貢獻。例 該焊料中的 1360211 在此間描述之預期的鎳摻雜範圍内,觀察到該介面 IMC厚度比相同的無鎳摻雜合金厚。進一步觀察到該介面 IMC之較平滑的微結構比沒有鎳的無鉛合金中普遍存在之 鋸齒狀、扇形邊的微結構更令人滿意。該較平滑的微結構 使該IMC内可以有平均的應力。該鋸齒狀、荷葉邊的微結 構擁有較高應力狀態的區域,因為該結構並不如較平滑的 微結構般同質。The interconnect structure itself is now discussed in more detail in a specific example. In one embodiment, a lead-free solder alloy consists essentially of tin-silver-steel and 〇.〇1 to 〇20 wt% nickel. An example of this lead-free solder alloy is 98.4% tin 1·0/ό silver-0.5% copper-0.1%. As an example of the composition of the tin-silver-copper composition, the silver component may be about 0.25 to 4.0 wt〇/〇, and the copper may be about 2.0 wt0/〇. The tin component can be, for example, from about 99.75 to 94.5 wt%, or provide a balance of any of the ingredients listed above. As in any solder composition, there are typically trace elements present which are not critical and are not expected to affect the properties of the interconnected structure while remaining within conventional standards. The solder alloy can be, for example, a discontinuous solder sphere (i.e., solder ball) or a solder paste type. The solder can, for example, be reflowed to a UBM formed by vacuum deposition of a thin crucible or a plated film. 10 The above solder alloy composition, together with the application of UBM, provides a smoother, thicker thickness at the UBM/solder interface that minimizes the heterogeneous growth of this fragile interface. In the example, the upper layer of the UB is copper, and the solder block is, in a preferred embodiment, the UBM upper surface steel is formed as a metal intermetallic (IMC) layer during the reflow process, in the UBM. The boundary layer. Conversely, if the UBM is only a copper layer, it will never be at any point or interface in the process. In addition, the use of the above structure can surround the internal branches of the tin grain boundary within the solder reflow block. Weld a low degree of intermetallic. This assists in making the solder block more flexible than unrecorded. In one embodiment, the UBM structure has a shoulder because of the film requirements required by certain packaging industries. This is in contrast to electro-forged copper only, which does not conform to the UBM fabrication seal. U B in the preferred embodiment. Other thin film metal layers should be used in the UBM upper layer to form the IMC. For example, the minimum thickness of the copper layer in the UBM should be such that in the preferred embodiment, the smoothing of the IMC layer in the copper and solder in the UBM can also contribute to the formation of the IMC. In other embodiments, the different metals in the UBM react with the solder and form the IMC and its properties, such as by reacting nickel tin in the UBM in a nickel-phosphorus-based UBM instead of copper. Smooth IMC layer. It can assist in the better implementation of the reaction of thinner metal. It is clear that most of this reveals that this rather thick skin is completely consumed. A limited amount of copper is then provided in the solder zone to limit the amount of copper used in a thin layer. For example, nickel sharp β is expected to be about 7,000 angstroms. The nickel reacts. To some extent, the structural combination contributes. Example 1360211 in the solder Within the expected nickel doping range described herein, it was observed that the interface IMC thickness was thicker than the same nickel-free doped alloy. It is further observed that the smoother microstructure of the interface IMC is more satisfactory than the zigzag, scalloped microstructures prevalent in lead-free alloys without nickel. This smoother microstructure allows for an average stress within the IMC. The jagged, ruffled microstructure has a region of higher stress because the structure is not as homogeneous as a smoother microstructure.
例如,第3圖示出無鎳摻雜之介面IMC構形300。構 形3 00顯示出不樂見的突波3 02。相反地,第4圖示出擁 有如上所述之鎳摻雜的介面IMC 1 14之構形。介面IMC 114的表面400在與無鎳摻雜之IMC相比較下實質上是平 滑.的。 關於該内連結構的製造本身,可使用習知晶圓級晶片 尺寸和覆晶製程。例如,可施加焊料至該UBM,並以達到 炫點的焊料回流以在焊料和UBΜ之間形成實體焊接。For example, Figure 3 shows a nickel-free doped interface IMC configuration 300. Configuration 300 shows a glitch 3 02 that is unpleasant. Conversely, Fig. 4 shows the configuration of the interface IMC 1 14 having the nickel doping as described above. The surface 400 of the interface IMC 114 is substantially smooth compared to the nickel-free doped IMC. Regarding the fabrication of the interconnect structure itself, conventional wafer level wafer size and flip chip process can be used. For example, solder can be applied to the UBM and solder reflow to achieve a dazzle to form a solid weld between the solder and the UB.
在另一實施例中,可使用厚膜銅UBM。焊料内的鎳會 在回流製程期間與銅反應而形成平滑的介面IMC 1 1 4層 (見第2圖)。. 藉由前面揭示,改善的内連結構和方法已經描述。上 述之結構及方法通常提供如下優勢》透過摻雜鎳之錫一銀 一銅合金焊料的使用,機械完整性在該焊料塊材的撓性和 該介面IMC厚度的異質成長及成形的最小化,其係該内連 結構中最脆弱的結構,兩者上獲得改善。整體結構比其他 可得選擇顯著地更具延展性,增加該結構吸收來自例如掉 12 1360211 落衝擊、震動和剪力之除此之外具破壞性之機械能量的能 力。 前面對於特定實施例的描述充分揭露本揭示之通則, 而使他人可,藉由應用本知識,輕易地將其修飾及/或改 變,並在不背離基本概念下用於各種應用。因此,此類改 變或修飾係落在所揭示實施例之等效物的涵義和範圍内。 在此所使用的措詞和術語係為了描述而非限制的目的。In another embodiment, a thick film copper UBM can be used. Nickel in the solder reacts with copper during the reflow process to form a smooth interface IMC 1 14 layer (see Figure 2). Improved interconnect structures and methods have been described by the foregoing disclosure. The above structures and methods generally provide the advantage of mechanical integrity through the use of nickel-doped tin-silver-copper alloy solders, the flexibility of the solder block and the heterogeneous growth and formation of the interface IMC thickness, It is the most vulnerable structure in the interconnected structure and both are improved. The overall structure is significantly more ductile than other available options, increasing the ability of the structure to absorb destructive mechanical energy from, for example, the impact of 12 1360211 drop shock, shock and shear. The above description of the specific embodiments fully discloses the general principles of the disclosure, and others can be easily modified and/or changed by applying the present knowledge and used in various applications without departing from the basic concepts. Therefore, such changes or modifications are within the meaning and range of equivalents of the disclosed embodiments. The words and terms used herein are for the purpose of description and not limitation.
【圖式簡單說明】 為了更完整了解本揭示,現在參考如下圖式,其中在 該等圖式中相似的元件符號表示相仿的物件: 第1圖示出根據本揭示之一例示'實施例之組裝至基材 前的晶圓級晶片尺寸或覆晶封裝之一部分的剖面圖。 第2圖示出根據本揭示之一例示實施例之組裝後的焊 料内連結構。 第3圖示出無鎳摻雜之介面IMC(金屬互化物)構形。BRIEF DESCRIPTION OF THE DRAWINGS For a fuller understanding of the present disclosure, reference is now made to the drawings, in which like reference A cross-sectional view of a wafer level wafer size or a portion of a flip chip package before assembly to a substrate. Figure 2 illustrates an assembled solder interconnect structure in accordance with an illustrative embodiment of the present disclosure. Figure 3 shows the interface of the nickel-free doped interface IMC (intermetallic compound).
第4圖示出根據本揭示之一例示實施例之含鎳摻雜之 介面IMC構形。 在此所提出的範例示出特定實施例,並且此範例不應 被視為以任何方式限制本發明。 【主要元件符號說明】 100 封裝 102 晶圓元件 104 基材 106 焊料塊材 13 1360211 108 UBM 110 金屬表面處理 112、 114 介面IMC 200 焊料内連結構 300 構形 302 突波 400 表面Figure 4 illustrates a nickel-doped interface IMC configuration in accordance with an illustrative embodiment of the present disclosure. The examples presented herein are illustrative of specific embodiments and are not to be considered as limiting the invention in any way. [Main component symbol description] 100 Package 102 Wafer component 104 Substrate 106 Solder block 13 1360211 108 UBM 110 Metal surface treatment 112, 114 Interface IMC 200 Solder interconnect structure 300 Configuration 302 Surge 400 Surface
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