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TW548584B - Fast write instruction for micro engine used in multithreaded parallel processor architecture - Google Patents

Fast write instruction for micro engine used in multithreaded parallel processor architecture Download PDF

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Publication number
TW548584B
TW548584B TW089117911A TW89117911A TW548584B TW 548584 B TW548584 B TW 548584B TW 089117911 A TW089117911 A TW 089117911A TW 89117911 A TW89117911 A TW 89117911A TW 548584 B TW548584 B TW 548584B
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Taiwan
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item
scope
patent application
bit
computer program
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TW089117911A
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English (en)
Inventor
Gilbert Wolrich
Matthew J Adiletta
William Wheeler
Debra Bernstein
Donald Hooper
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Intel Corp
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30058—Conditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/321—Program or instruction counter, e.g. incrementing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming

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  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
  • Image Processing (AREA)
  • Stored Programmes (AREA)
  • Fittings On The Vehicle Exterior For Carrying Loads, And Devices For Holding Or Mounting Articles (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Control Of Transmission Device (AREA)
  • Document Processing Apparatus (AREA)
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Description

548584
曰 I正 9.如申請專利範圍第8項所述之方法，其中該記號代 表優先合格者。 I 0 ·如申請專利範圍第8項所述之方法，其中該記號是 3 2 -位元字組。 II ·如申請專利範圍第1 0項所述之方法，其中記號格 式包括： 0V欄位，在位元3 i中； 微程式引擎（UENG ) ADDR欄位，在位元30 : 28中； 保留攔位，在位元2 7 : 1 6中；
OV欄位，在位元！ 5中； 决速寫入資料（fast write data)欄位，在位元14: 5中； 保留櫊位，在位元4 : 3中； OV欄位，在位元2中；以及 CTX欄位，在位元1 : 〇中。 1 2 ·如申請專利範圍第丨丨項所述之方法，其中假如位 元31被設定，微程式引擎位址優先於預設的微程式引擎位 址。
13·如申請專利範圍第n項所述之方法，其中位元3〇· 28指定關聯於控制與狀態暫存器（CSR )的微程式引擎。· 1 4·如申請專利範圍第丨丨項所述之方法，其中當讀取 時，位元27:16傳回〇。 1 5·如申請專利範圍第1 1項所述之方法，其中假如位 元15被設定，微程式引擎位址優先於預設的微程式引擎位
548584
案號8j^Ll 六、申請專利範圍 址。 、1 6 ·如申％專利範圍第11項所述之方法，其中位元1 4 : 5代表被寫入至控制與狀態暫存器（CSR )的有效資料。 1 7·如申請專利範圍第11項所述之方法，其中當讀取 時，位元4 : 3傳回〇。 …1 8·如申請專利範圍第11項所述之方法，其中假如位 το2被設定，内容（CTX )欄位優先於預設的内容。 1 9 ·如申明專利範圍第11項所述之方法，其中位元1 : 〇 指定關聯於控制與狀態暫存器（csr )參考的内容。 2 0. —種電腦程式產品，放置於電腦可讀媒體上，該 程式包括指令，其用於導致電腦： 及 接收貢料於具有處理執行緒編號的處理執行緒中；以 器 載入資料進入具有相對應該處理執行緒編號的暫存 & ^ ^ ^如申叫專利範圍第2 0項所述之電腦程式產品，盆 中忒暫存器攔位是控制與狀態暫存器（CSR)。 ’、 φ # 如/1專利乾圍第21項所述之電腦程式產品，其 中μ控制”狀態暫存器是被包含於64 出 (FIFO)匯流排中。 兀見^入先出 φ^ρη如申請專利範圍第22項所述之電腦程式產品，盆 中"FIFO匯流排界面至媒體存取控制器裝置。，、 中Λ4料如/Λ專丄利，圍第20項所述之電腦程式產品，其 中違貝枓代表十/、進位標記〇至十六進位標記〇乂3吓的數
1057-3417PF2.ptc 第25頁
25.如申請專利範圍第^項戶斤述之電腦程式產品，其 處；處理執行緒代表在多執行緒處理器的微程式引擎中的 中巧、申請專利範圍第20項所述之電腦程式產品，其 步地包括指令，用於導致電腦： ^ 移位該資料的第一部份等於該處理執行緒編號的數 里；以及 :位該資料的第二部份記入中斷，點（BP )暫存器2至 暫存器〇。 27·如申請專利範之電腦程式產品，其 中進-步地包括用於導致弟電〇腦員接收犯號的指令。 28·如申請專利範圍第27項所述之電腦程式產品，其 ^。己號代表優先合格者。 29·如申請專利範圍第27項所述之電腦程式產品，其 &兄號是3 2 -位元字組。 30·如申請專利範圍第27項所述之電腦程式產品，其 中έ己號格式包括： 〇V攔位，在位元31中； 微程式引擎（11£“）八00尺欄位，在位兀3〇:28中； 保留攔位，在位元2 7 : 1 6中； OV攔位，在位元1 5中； 快速寫入資料（fast write data)爛位，在位元14: 5中；
1057.3417PF2.ptc 第26頁 548584
保留搁位’在位元4 ·· 3中； 0V欄位，在位元2中；以及 C T X欄位，在位元〗·· 〇中。 31·如申請專利範圍第3〇項所述之電腦程式產品，其 :假如位元3 1被設定，微程式引擎位址優先於預設 式弓丨擎位址。 ^ 3_2·如申請專利範圍第30項所述之電腦程式產品，其 位兀30 : 28指定關聯於控制與狀態暫存器（CSR )的微程 式弓丨擎。 。 33·如申請專利範圍第30項所述之電腦程式產品，1 中當讀取時，位元27: 16傳回〇。 八 34·如申請專利範圍第30項所述之電腦程式產品，j： t假如位元15被設定，微程式引擎位址優先於預設的微程 式弓丨擎位址。 3 5 ·如申請專利範圍第3 0項所述之電腦程式產品，其 i伋凡1 4 : 5代表被寫入至控制與狀態暫存器（CS]R )的 六今 二欠 ^ 3 6 ·如申請專利範圍第3 〇項所述之電腦程式產品，其 中當讀取時，位元4 : 3傳回〇。 、 3 7 ·如申請專利範圍第3 0項所述之電腦程式產品，其 ^假如位元2被設定，内容（CTX )欄位優先於預設的内 3 8 ·如申請專利範圍第3 0項所述之電腦程式產品，其 中位元1 : 0指定關聯於控制與狀態暫存器（CSR )參考的内
548584
1057-3417PF2.ptc 第28頁
TW089117911A 1999-09-01 2000-10-18 Fast write instruction for micro engine used in multithreaded parallel processor architecture TW548584B (en)

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Family Applications (11)

Application Number Title Priority Date Filing Date
TW089117903A TW559729B (en) 1999-09-01 2000-09-01 Instruction for multithreaded parallel processor
TW089117906A TWI221251B (en) 1999-09-01 2000-10-18 Branch instruction for processor
TW089117900A TW486666B (en) 1999-09-01 2000-10-18 Register set used in multithreaded parallel processor architecture
TW089117911A TW548584B (en) 1999-09-01 2000-10-18 Fast write instruction for micro engine used in multithreaded parallel processor architecture
TW089117901A TWI220732B (en) 1999-09-01 2000-10-18 Local register instruction for micro engine used in multithreaded parallel processor architecture
TW089117904A TW475148B (en) 1999-09-01 2000-10-18 Branch instruction for processor architecture
TW089117910A TW486667B (en) 1999-09-01 2000-10-18 Memory reference instructions for micro engine used in multithreaded parallel processor architecture
TW089117912A TW546585B (en) 1999-09-01 2000-10-18 Method of operating a processor and computer program product
TW089117907A TW594562B (en) 1999-09-01 2000-10-18 Branch instruction for processor
TW089117905A TW569133B (en) 1999-09-01 2000-10-18 Branch instruction for processor
TW089117902A TW571239B (en) 1999-09-01 2000-10-18 Branch instruction for multithreaded processor

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TW089117903A TW559729B (en) 1999-09-01 2000-09-01 Instruction for multithreaded parallel processor
TW089117906A TWI221251B (en) 1999-09-01 2000-10-18 Branch instruction for processor
TW089117900A TW486666B (en) 1999-09-01 2000-10-18 Register set used in multithreaded parallel processor architecture

Family Applications After (7)

Application Number Title Priority Date Filing Date
TW089117901A TWI220732B (en) 1999-09-01 2000-10-18 Local register instruction for micro engine used in multithreaded parallel processor architecture
TW089117904A TW475148B (en) 1999-09-01 2000-10-18 Branch instruction for processor architecture
TW089117910A TW486667B (en) 1999-09-01 2000-10-18 Memory reference instructions for micro engine used in multithreaded parallel processor architecture
TW089117912A TW546585B (en) 1999-09-01 2000-10-18 Method of operating a processor and computer program product
TW089117907A TW594562B (en) 1999-09-01 2000-10-18 Branch instruction for processor
TW089117905A TW569133B (en) 1999-09-01 2000-10-18 Branch instruction for processor
TW089117902A TW571239B (en) 1999-09-01 2000-10-18 Branch instruction for multithreaded processor

Country Status (10)

Country Link
US (1) US7421572B1 (zh)
EP (7) EP1236088B9 (zh)
CN (7) CN1271513C (zh)
AT (2) ATE475930T1 (zh)
AU (11) AU7097900A (zh)
CA (7) CA2386558C (zh)
DE (2) DE60044752D1 (zh)
HK (8) HK1046049A1 (zh)
TW (11) TW559729B (zh)
WO (8) WO2001018646A1 (zh)

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