KR20070016567A - Liquid crystal display - Google Patents

Abstract

The liquid crystal display according to the present invention includes a plurality of gate lines transmitting a gate signal, a plurality of data lines crossing the gate lines and transmitting a data voltage, a plurality of thin film transistors connected to the gate lines and the data lines, A passivation layer formed on the gate line, the data line and the thin film transistor, a plurality of pixel electrodes formed on the passivation layer and connected to the thin film transistor, and a shielding electrode formed on the passivation layer and overlapping the data line. And the shielding electrode is equal to or smaller than the width of the data line. According to the present invention, the shielding electrode is formed to be equal to or narrower than the data line width, thereby increasing the transmittance of the liquid crystal display while reducing the parasitic capacitance between the data line and the pixel electrode.

Liquid crystal display, shielding electrode, data line, pixel electrode, transmittance

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

1 is a layout view of a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment of the present invention.

2 is a layout view of a common electrode display panel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention.

4 is a cross-sectional view taken along the line IV-IV of FIG. 3.

FIG. 5 is a cross-sectional view taken along the line VV of FIG. 3.

6 is a layout view of a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 7 is a cross-sectional view taken along the line VII-VII of FIG. 6.

8A to 8C are graphs showing light leakage between the pixel electrode and the gate line according to the arrangement of the shielding electrode.

9A to 9C are graphs showing light leakage between the gate line and the pixel electrode according to the arrangement of the gate line and the pixel electrode.

<Description of Drawing>

11, 21.Alignment film 12, 22.Polarizing plate

3.Liquid crystal layer

71, 72, 72a, 72b, 73, 73a, 73b, 74, 75, 75a, 75b ... incision

81, 82 ... contact aid member

91, 92, 93a, 93b, 94a, 94b, 95a, 95b ... incision

Thin Film Transistor Display ...

121, 129 ... gate line 124 ... gate electrode

131 Holding electrode 135 Holding electrode

140 Gate insulating film 151, 154 Semiconductor

161, 163, 165 ... resistive contact layers 171, 179 ... data lines

173 Source electrode 175 Drain electrode

180 ... Shield

181, 182, 185 contact holes 191 pixel electrode

200 ... color filter panel 210 ... substrate

220 ... light-shielding member 230 ... color filter

250 ... overcoat 270 ... common electrode

The present invention relates to a liquid crystal display device.

The liquid crystal display is one of the most widely used flat panel display devices, and includes two display panels on which electric field generating electrodes, such as a pixel electrode and a common electrode, are formed, and a liquid crystal layer interposed therebetween. The liquid crystal display generates an electric field in the liquid crystal layer by applying a voltage to the field generating electrode, thereby determining an orientation of liquid crystal molecules of the liquid crystal layer and controlling the polarization of incident light to display an image.

Among the liquid crystal display devices, a field generating electrode is provided on each of two display panels. Among them, a liquid crystal display device having a structure in which a plurality of pixel electrodes are arranged in a matrix form on one display panel and one common electrode covering the entire display panel on the other display panel is mainstream. The display of an image in this liquid crystal display device is performed by applying a separate voltage to each pixel electrode. To this end, a thin film transistor, which is a three-terminal element for switching a voltage applied to a pixel electrode, is connected to each pixel electrode, and a gate line for transmitting a signal for controlling the thin film transistor and a data line for transmitting a voltage to be applied to the pixel electrode are provided. Install on the display panel. In addition, the display panel includes a sustain electrode that stably maintains the voltage applied to the pixel electrode by forming a storage capacitor in overlap with the pixel electrode.

In such a liquid crystal display, it is important to secure an aperture ratio of a pixel. For this purpose, the pixel electrode and the data line are disposed to be adjacent to or overlap each other. As a result, parasitic capacitance is formed between the pixel electrode to which the pixel voltage is applied and the data line which continuously changes the data voltage, and various defects occur due to the parasitic capacitance.

In order to reduce the defects caused by the parasitic capacitance, a method of forming a shielding electrode to completely cover the upper portion of the data line and the upper portion of the gate line is used. When the shielding electrode is formed, the transmittance of the liquid crystal display is reduced.

An object of the present invention is to provide a liquid crystal display device having improved transmittance while reducing defects such as light leakage between the data line and the pixel electrode or between the gate line and the pixel electrode.

According to an aspect of the present invention, a liquid crystal display includes a plurality of gate lines transmitting a gate signal, a plurality of data lines crossing the gate lines, and transmitting a data voltage, and a plurality of thin films connected to the gate lines and the data lines. A passivation layer formed on the transistor, the gate line, the data line, and the thin film transistor, a plurality of pixel electrodes formed on the passivation layer and connected to the thin film transistor, and formed on the passivation layer, and overlapping the data line. And a shielding electrode, wherein the shielding electrode is equal to or smaller than the width of the data line.

The difference between the width of the shielding electrode and the width of the data line may be within an alignment error range of the exposure machine.

The pixel electrode may overlap the gate line.

The liquid crystal display may further include a storage electrode overlapping the pixel electrode or the drain electrode to form a storage capacitor.

The liquid crystal display may further include a common electrode facing the pixel electrode and to which a common voltage is applied.

A voltage substantially the same as the common voltage may be applied to the shielding electrode.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

Next, a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 to 5.

1 is a layout view of a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment of the present invention, FIG. 2 is a layout view of a common electrode display panel for a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. FIG. 4 is a layout view of a liquid crystal display including the thin film transistor array panel and the common electrode display panel of FIG. 2, and FIG. 4 is a cross-sectional view of the liquid crystal display of FIG. 3 taken along line IV-IV, and FIG. 5 is V- of FIG. 3. A cross-sectional view taken along the line V. FIG.

1 to 5, a liquid crystal display according to an exemplary embodiment of the present invention includes a thin film transistor array panel 100 and a common electrode panel 200 facing each other and between the two display panels 100 and 200. The liquid crystal layer 3 is included.

First, the thin film transistor array panel 100 will be described with reference to FIGS. 1 and 3 to 5.

A plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on an insulating substrate 110 made of transparent glass or plastic.

The gate line 121 transmits a gate signal and mainly extends in a horizontal direction. Each gate line 121 includes a plurality of gate electrodes 124 protruding upward and downward and a wide end portion 129 for connection with another layer or an external driving circuit. A gate driving circuit (not shown) for generating a gate signal may be mounted on a flexible printed circuit film (not shown) attached to the substrate 110 or directly mounted on the substrate 110, It may be integrated into the substrate 110. When the gate driving circuit is integrated on the substrate 110, the gate line 121 may extend to be directly connected to the gate driving circuit.

The storage electrode line 131 receives a predetermined voltage and almost extends in parallel with the gate line 121. Each storage electrode line 131 is positioned between two adjacent gate lines 121 and is substantially equal to the two gate lines 121. The storage electrode line 131 includes a storage electrode 137 extending up and down. However, the shape and arrangement of the storage electrode line 131 may be modified in various ways.

The gate line 121 and the storage electrode line 131 may be formed of aluminum-based metal such as aluminum (Al) or aluminum alloy, silver-based metal such as silver (Ag) or silver alloy, copper-based metal such as copper (Cu) or copper alloy, or molybdenum ( It may be made of molybdenum-based metals such as Mo) or molybdenum alloy, chromium (Cr), tantalum (Ta) and titanium (Ti). However, they may have a multilayer structure including two conductive films (not shown) having different physical properties. One of the conductive films is made of a metal having low resistivity, such as aluminum-based metal, silver-based metal, or copper-based metal, so as to reduce signal delay or voltage drop. In contrast, other conductive films are made of other materials, particularly materials having excellent physical, chemical, and electrical contact properties with indium tin oxide (ITO) and indium zinc oxide (IZO), such as molybdenum-based metals, chromium, tantalum, and titanium. Good examples of such a combination include a chromium bottom film, an aluminum (alloy) top film, and an aluminum (alloy) bottom film and a molybdenum (alloy) top film. However, the gate line 121 and the storage electrode line 131 may be made of various other metals or conductors.

Side surfaces of the gate line 121 and the storage electrode line 131 are inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30 ° to about 80 °.

A gate insulating layer 140 made of silicon nitride (SiN _x ) or silicon oxide (SiOx) is formed on the gate line 121 and the storage electrode line 131.

On the gate insulating layer 140, a plurality of island semiconductors 154 made of hydrogenated amorphous silicon (amorphous silicon is abbreviated as a-Si), polycrystalline silicon, or the like are formed. The semiconductor 154 is positioned on the gate electrode 124 and includes an extension covering the boundary of the gate line 121.

A plurality of island type ohmic contacts 163 and 165 are formed on the semiconductor 154. The ohmic contacts 163 and 165 may be made of a material such as n + hydrogenated amorphous silicon in which n-type impurities such as phosphorus are heavily doped, or may be made of silicide. The island-like ohmic contacts 163 and 165 are paired and disposed on the semiconductor 154 and face each other with respect to the gate electrode 124.

Side surfaces of the semiconductor 154 and the ohmic contacts 163 and 165 may also be inclined with respect to the surface of the substrate 110, and the inclination angle may be about 30 ° to about 80 °.

A plurality of data lines 171 and a plurality of drain electrodes 175 are formed on the ohmic contacts 163 and 165 and the gate insulating layer 140.

The data line 171 transmits a data voltage and mainly extends in the vertical direction to cross the gate line 121 and the storage electrode line 131. Each data line includes a plurality of source electrodes 173 extending toward the gate electrode 124 and bent in a U-shape, and a wide end portion 179 for connection with another layer or an external driving circuit. A data driving circuit (not shown) for generating a data voltage is mounted on a flexible printed circuit film (not shown) attached to the substrate 110, directly mounted on the substrate 110, or mounted on the substrate 110. Or may be integrated into the substrate 110. When the data driving circuit is integrated on the substrate 110, the data line 171 may be extended to be directly connected to the data driving circuit.

The drain electrode 175 is separated from the data line 171 and faces the source electrode 173 with respect to the gate electrode 124. Each drain electrode 175 includes one wide end 177 and the other end having a rod shape. The wide end portion 177 overlaps the storage electrode 137, and the rod-shaped end portion is partially surrounded by the source electrode 173.

One gate electrode 124, one source electrode 173, and one drain electrode 175 together with the semiconductor 154 form one thin film transistor (TFT), and a channel of the thin film transistor. ) Is formed in the protrusion 154 between the source electrode 173 and the drain electrode 175.

The data line 171 and the drain electrode 175 are preferably made of a refractory metal such as molybdenum, chromium, tantalum, and titanium, or an alloy thereof, and include a refractory metal film (not shown) and a low resistance conductive film. It may have a multilayer structure including (not shown). Examples of the multilayer structure include a double layer of chromium or molybdenum (alloy) lower layer and an aluminum (alloy) upper layer, and a triple layer of molybdenum (alloy) lower layer and aluminum (alloy) interlayer and molybdenum (alloy) upper layer. However, the data line 171 and the drain electrode 175 may be made of various other metals or conductors.

The side of the data line 171 and the drain electrode 175 may also be inclined at an inclination angle of about 30 ° to about 80 ° with respect to the surface of the substrate 110.

The ohmic contacts 161 and 165 exist only between the semiconductor 154 thereunder and the data line 171 and the drain electrode 175 thereon, thereby lowering the contact resistance. The semiconductor 154 has a portion exposed between the source electrode 173 and the drain electrode 175 and not covered by the data line 171 and the drain electrode 175.

A passivation layer 180 is formed on the data line 171, the drain electrode 175, and the exposed semiconductor 154. The passivation layer 180 may be made of an organic insulator, and may have a flat surface. The organic insulator may have photosensitivity and the dielectric constant is preferably about 4.0 or less. However, the passivation layer 180 may be made of an inorganic insulator. The passivation layer 180 may have a double layer structure of the lower inorganic layer and the upper organic layer so as not to damage the exposed portion of the semiconductor 151 while maintaining excellent insulating properties of the organic layer.

In the passivation layer 180, a plurality of contact holes 182 and 185 exposing the end portion 179 and the drain electrode 175 of the data line 171 are formed, respectively, and the passivation layer 180 and the gate insulating layer are formed. A plurality of contact holes 181 exposing the end portion 129 of the gate line 121 are formed at 140.

A plurality of pixel electrodes 191, a plurality of shielding electrodes 88, and a plurality of contact assistants 81 and 82 are formed on the passivation layer 180. They may be made of a transparent conductive material such as ITO or IZO or a reflective metal such as aluminum, silver, chromium or an alloy thereof.

The pixel electrode 191 is physically and electrically connected to the drain electrode 175 through the contact hole 185 and receives a data voltage from the drain electrode 175. The pixel electrode 191 to which the data voltage is applied is formed between the two electrodes 191 and 270 by generating an electric field together with the common electrode 270 of the common electrode display panel 200 to which the common voltage is applied. The direction of liquid crystal molecules (not shown) of the liquid crystal layer 3 is determined. The polarization of light passing through the liquid crystal layer 3 varies according to the direction of the liquid crystal molecules determined as described above. The pixel electrode 191 and the common electrode 270 form a capacitor (hereinafter, referred to as a "liquid crystal capacitor") to maintain an applied voltage even after the thin film transistor is turned off.

The end portion 177 of the pixel electrode 191 and the drain electrode 175 connected to the pixel electrode 191 overlaps the storage electrode line 131 including the storage electrode 137. A capacitor in which the pixel electrode 191 and the drain electrode 175 electrically connected thereto overlap the storage electrode line 131 is called a "storage capacitor", and the storage capacitor enhances the voltage holding capability of the liquid crystal capacitor. . In addition, each pixel electrode 191 overlaps the gate line 121.

Each pixel electrode 191 has four peripheral sides substantially parallel to the gate line 121 or the data line 171 and has a substantially rectangular shape in which four corners are chamfered. The side of the pixel electrode 191 parallel to the gate line 121 overlaps the gate line 121. Pixel electrode 191 The oblique side of the pixel electrode 191 forms an angle of about 45 ° with respect to the gate line 121.

The center electrode 91, 92, lower cutouts 93a, 94a and 95a and upper cutouts 93b, 94b and 95b are formed in the pixel electrode 191, and the pixel electrode 191 includes these cutouts. By 91-95b, it is divided into a plurality of partitions. The cutouts 91-95b are almost inverted symmetric with respect to the sustain electrode line 131.

The lower and upper cutouts 93a-95b extend obliquely from the left side or the upper side of the pixel electrode 191 to the right side, and are positioned at the lower half and the upper half with respect to the storage electrode line 131, respectively. The lower and upper cutouts 93a-95b extend perpendicular to each other at an angle of about 45 ° with respect to the gate line 121.

The central cutouts 91 and 92 comprise a horizontal section and a pair of diagonal lines connected thereto. The horizontal portion extends shortly along the storage electrode line 131, and the pair of diagonal portions extends substantially parallel to the lower cut portion 93a and the upper cut portion 93b toward the right side of the pixel electrode 191 in the horizontal portion. have.

Accordingly, the pixel electrode 191 is divided into six regions by the cutouts 91-95a, and these regions have a symmetrical structure with respect to the storage electrode line 131. In this case, the number of regions or the number of cutouts may vary according to design factors such as the size of the pixel electrode 191, the length ratio of the horizontal side and the vertical side of the pixel electrode 191, and the type or characteristics of the liquid crystal layer 3.

The contact auxiliary members 81 and 82 are connected to the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 through the contact holes 181 and 182, respectively. The contact auxiliary members 81 and 82 compensate for and protect the adhesion between the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 and the external device.

The shielding electrode 88 receives a common voltage and extends along the data line 171. The shielding electrode 88 is connected to the storage electrode line through a contact hole (not shown) of the passivation layer 180 and the gate insulating layer 140, or transfers a common voltage from the thin film transistor array panel 100 to the common electrode display panel 200. It may be connected to a short point (not shown).

The shielding electrode 88 blocks electromagnetic interference between the data line 171 and the pixel electrode 191 and between the data line 171 and the common electrode 270 to prevent voltage distortion and the data line 171 of the pixel electrode 191. Reduces the signal delay of the data voltage delivered by

The pixel electrode 191 is separated from the shielding electrode 88 by a predetermined distance or more to prevent a short circuit between the two. Therefore, since the pixel electrode 191 is further away from the data line 171, the parasitic capacitance therebetween is reduced. In addition, the wider the width of the shielding electrode 88, the narrower the width of the pixel electrode 191.

In addition, since the permittivity of the liquid crystal layer 3 is higher than that of the passivation layer 180, when the parasitic capacitance between the data line 171 and the shielding electrode 88 is absent, the data line ( It is smaller than the parasitic capacitance between 171 and the common electrode 270.

In addition, since the pixel electrode 190 and the shielding electrode 88 are made of the same layer, the distance between them is kept constant so that the parasitic capacitance between them is constant.

On the other hand, since there is no electric field between the common electrode 270 and the shielding electrode 88, the liquid crystal molecules on the shielding electrode 88 maintains the initial orientation, thereby blocking incident light. Therefore, the shielding electrode 88 can function as the light blocking member. Therefore, the wider the width of the shielding electrode 88, the lower the transmittance of the liquid crystal display.

Next, the common electrode display panel 200 will be described with reference to FIGS. 2 to 4.

A light blocking member 220 is formed on an insulating substrate 210 made of transparent glass, plastic, or the like. The light blocking member 220 includes a linear portion 221 corresponding to the data line 171 and a planar portion 223 corresponding to the thin film transistor, and prevents light leakage between the pixel electrodes 191, and Define the facing opening area. However, the light blocking member 220 may have a plurality of openings (not shown) facing the pixel electrode 191 and having substantially the same shape as the pixel electrode 191.

A plurality of color filters 230 is also formed on the substrate 210. The color filter 230 is mostly present in an area surrounded by the light blocking member 230, and may extend in the vertical direction along the column of the pixel electrodes 191. Each color filter 230 may display one of primary colors such as three primary colors of red, green, and blue.

An overcoat 250 is formed on the color filter 230 and the light blocking member 220. The overcoat 250 may be made of an (organic) insulator, which prevents the color filter 230 from being exposed and provides a flat surface. The overcoat 250 may be omitted.

The common electrode 270 is formed on the overcoat 250. The common electrode 270 is made of a transparent conductor such as ITO and IZO, and the common electrode 270 has a plurality of cutouts 71, 72, 73a, 73b, 74a, 74b, 75a, and 75b.

One set of cutouts 71 to 75b faces the pixel electrode 191 and faces the center cutouts 71 and 72, the lower cutouts 73a, 74a, and 75a, and the upper cutouts 73b, 74b, and 75b. ). Each of the cutouts 71-75b is disposed between adjacent cutouts 91-95b of the pixel electrode 191 or between the cutouts 93a-95b and the chamfered hypotenuse of the pixel electrode 191. In addition, each cutout 71-75b includes at least one diagonal line extending in parallel with the lower cutouts 93a, 94a and 95a or the upper cutouts 93b, 94b and 95b of the pixel electrode 191.

The lower and upper incisions 74a, 75a, 74b, 75b each comprise an oblique section, a horizontal section and a longitudinal section. The diagonal portion extends from the upper side or the lower side of the pixel electrode 191 to the right side. The horizontal portion and the vertical portion extend along the sides of the pixel electrode 190 from each end of the diagonal portion and form an obtuse angle with the diagonal portion.

Each of the lower and upper incisions 73a and 73b includes an oblique portion and a pair of longitudinal portions. The diagonal portion extends from the left side of the pixel electrode 191 to the right side. The vertical portion extends along each side of the pixel electrode 191 from each end of the diagonal portion and forms an obtuse angle with the diagonal portion.

The central cutouts 71, 72 comprise a central transverse section, a pair of oblique sections and a pair of longitudinal longitudinal sections. The central horizontal portion extends to the left along the storage electrode line 131 from the right side or the center of the pixel electrode 191, and the diagonal portion forms an oblique angle with the central horizontal portion at the end of the central horizontal portion toward the left side of the pixel electrode 191. Stretches. The vertical vertical portion extends along each side of the pixel electrode 191 from each end of the diagonal portion and forms an obtuse angle with the diagonal portion.

The number and direction of the cutouts 71-75b may also vary according to design factors, and the light blocking member 220 may overlap the cutouts 71-75b to block light leakage near the cutouts 71-75b. .

Alignment layers 11 and 21 are coated on inner surfaces of the display panels 100 and 200, and they may be vertical alignment layers. Polarizers 12 and 22 are provided on the outer surfaces of the display panels 100 and 200, and the polarization axes of the two polarizers 12 and 22 are orthogonal and one of the polarization axes is parallel to the gate line 121. desirable. In the case of a reflective liquid crystal display, one of the two polarizers 12 and 22 may be omitted.

The liquid crystal display according to the present exemplary embodiment may further include a phase retardation film (not shown) for compensating for the delay of the liquid crystal layer 3. The liquid crystal display may also include a polarizer 12 and 22, a phase retardation film, display panels 100 and 200, and a backlight unit (not shown) for supplying light to the liquid crystal layer 3.

The liquid crystal layer 3 has negative dielectric anisotropy, and the liquid crystal molecules (not shown) of the liquid crystal layer 3 are aligned such that their major axes are perpendicular to the surfaces of the two display panels 100 and 200 in the absence of an electric field. It is. Therefore, incident light does not pass through the quadrature polarizers 12 and 22 and is blocked.

When a common voltage is applied to the common electrode 270 and a data voltage is applied to the pixel electrode 191, an electric field almost perpendicular to the surfaces of the display panels 100 and 200 is generated. In response to the electric field, the liquid crystal molecules attempt to change their long axis to be perpendicular to the direction of the electric field. In the future, the pixel electrode 191 and the common electrode 270 are collectively referred to as an electric field generating electrode.

The cutouts 71-75b and 91-95b of the field generating electrodes 191 and 270 and the sides of the pixel electrode 191 distort the electric field to create horizontal components that determine the inclination direction of the liquid crystal molecules. The horizontal component of the electric field is substantially perpendicular to the sides of the cutouts 71-75b and 91-95b and the sides of the pixel electrode 191.

Referring to FIG. 3, one set of cutouts 71-75b and 91-95b divides the pixel electrode 191 into a plurality of sub-areas, and each sub-region is a main portion of the pixel electrode 191. It has two primary edges that form an oblique side. The periphery of each subregion forms about 45 degrees with the polarization axis of the polarizers 12 and 22, in order to maximize the light efficiency.

Most of the liquid crystal molecules on each subregion are inclined in a direction perpendicular to the periphery thereof, and thus, the inclination directions are approximately four directions. As described above, when the liquid crystal molecules are inclined in various directions, the reference viewing angle of the liquid crystal display is increased.

At least one cutout 71-72b, 91-92b may be replaced by a protrusion (not shown) or depression (not shown). The protrusions may be made of organic or inorganic materials and may be disposed above or below the field generating electrodes 191 and 270.

At least one notch (not shown) may be formed in the oblique portions of the cutouts 71-72b and 91-92b. The shape and arrangement of the incisions 71-75b, 91-95b and notches can be modified.

As described above, the width of the shielding electrode 88 of the liquid crystal display according to the exemplary embodiment of the present invention may be equal to or smaller than the width of the data line 171. The difference may be within the alignment error range of the exposure machine used to form the shielding electrode 88. At this time, it is preferable to minimize the distance between the shielding electrode 88 and the pixel electrode 191 so that the aperture ratio decreases to a minimum. In addition, the pixel electrode 191 of the liquid crystal display according to the exemplary embodiment overlaps the gate line 121.

8A to 8C, light leakage between the data line 171 and the pixel electrode 191 according to the arrangement of the shielding electrode 88 and the data line 171 will be described by way of example. 8A to 8C are graphs illustrating light leakage of pixels according to the shielding electrode. 8A illustrates a case in which the shielding electrode 88 is formed on the data line 171 and completely covers the data line 171. In FIG. 8B, the shielding electrode is shifted to the left side as compared to FIG. 8A to shield the data line 171. The left boundary of the electrode 88 coincides with each other. In FIG. 8C, the left boundary of the data line 171 is outside the shielding electrode 88. The graphs shown above each of the figures show the magnitude of the light leakage, and the graph below shows the equipotential lines.

A voltage of 9V is applied to the data line 171, 0V and 12V are respectively applied to the adjacent pixel electrode 191, and the shielding electrode 88 and the common electrode 270 positioned between the adjacent pixel electrode 191 are applied to the data line 171. A voltage of 6V was applied. As shown, not only the shielding electrode 88 completely covers the data line 171, but also the boundary between the shielding electrode 88 and the data line 171 coincides or the data line 171 has the shielding electrode 88. Light does not leak between the data line 171 and the pixel electrode 191 even when it is slightly removed from the boundary of the &quot;

Next, referring to FIGS. 9A to 9C, an example of light leakage between the pixel electrode 191 and the gate line 121 according to the arrangement of the gate line 121, the pixel electrode 191, and the shielding electrode 88 is described. Let's explain.

9A to 9C are graphs illustrating light leakage between the pixel electrode 191 and the gate line 121 according to the arrangement of the gate line 121 and the pixel electrode 191. 9A illustrates a case in which the shielding electrode 88 is formed to completely cover the gate line 121 on the gate line 121, and FIG. 9B illustrates the pixel electrode 191 and the gate line (there is no shielding electrode 88). In the case where 121 is overlapped, FIG. 9C illustrates a case in which the shielding electrode 88 is not present and the gate line 121 and the pixel electrode 191 do not overlap. 9A to 9C illustrate a case where 24V is applied to the gate line 121 and 6V is applied to the pixel electrode 191, the shielding electrode 88, and the common electrode 270, and (b) ) Shows a case where -6V is applied to the gate line 121 and 6V is applied to the pixel electrode 191, the shielding electrode 88, and the common electrode 270. The graphs shown above each of the figures show the magnitude of the light leakage, and the graph below shows the equipotential lines.

9A and 9B, when the shielding electrode 88 is formed on the gate line 121, or when the pixel electrode 191 overlaps the gate line 121, the gate electrode 121 is interposed between the gate line 121 and the pixel electrode. In FIG. 9C, light does not leak, but when the pixel electrode 191 does not overlap the gate line 121, light leaks between the gate line 121 and the pixel electrode 191.

As described above, even if the boundary of the shielding electrode 88 formed on the data line 171 coincides with the boundary of the data line 171 or the data line 171 slightly deviates from the boundary of the shielding electrode 88, the data line Light does not leak between 171 and the pixel electrode 191. When the pixel electrode 191 overlaps the gate line 121, light does not leak between the pixel electrode 191 and the gate line 121.

Therefore, as in the liquid crystal display according to the exemplary embodiment of the present invention, the shielding electrode 88 is formed to be substantially equal to the width of the data line 171, and the pixel electrode 191 overlaps the gate line 121, thereby forming a data line ( Light will not leak between the 171 and the pixel electrode 191 and between the gate line 121 and the pixel electrode 191. In addition, when the width of the shielding electrode 88 is formed to be narrow, the width of the pixel electrode 191 may be formed to be wide and the transmittance of the liquid crystal display may be increased.

Next, a liquid crystal display according to another exemplary embodiment of the present invention will be described in detail with reference to FIGS. 6 and 7.

FIG. 6 is a layout view of a liquid crystal display according to another exemplary embodiment. FIG. 7 is a cross-sectional view of the liquid crystal display of FIG. 6 taken along the line VII-VII.

The liquid crystal display according to the present embodiment also includes the thin film transistor array panel 100, the common electrode display panel 200, and the liquid crystal layer 3 and the two display panels 100 and 200 inserted between the two display panels 100 and 200. It includes a pair of polarizers 12 and 22 attached to the outer surface.

The layered structure of the display panels 100 and 200 according to the present exemplary embodiment is substantially the same as those of FIGS. 1 to 5.

Referring to the thin film transistor array panel 100, a plurality of gate lines 121 including the gate electrode 124 and a plurality of storage electrode lines 131 including the storage electrode 135 are formed on the substrate 110. The gate insulating film 140, the semiconductor 154, and the ohmic contacts 163 and 165 are sequentially formed thereon. A plurality of data lines 171 including a source electrode 173 and a plurality of drain electrodes 175 including a plurality of extensions are formed on the ohmic contact member 161, and a passivation layer 180 is formed thereon. have. A plurality of contact holes 181, 182, and 185 are formed in the passivation layer 180 and the gate insulating layer 140, and a plurality of pixel electrodes 191, a plurality of shielding electrodes 88, and a plurality of contact auxiliary members are formed thereon. (81, 82) are formed and the alignment film 11 is apply | coated on it.

Referring to the common electrode display panel 200, the light blocking member 220, the plurality of color filters 230, the overcoat 250, the common electrode 270, and the alignment layer 21 are formed on the insulating substrate 210. have.

However, unlike the liquid crystal display of FIGS. 1 to 5, the island type semiconductor 154 is a protrusion of the linear semiconductor 151 extending to the lower portion of the data line 171 and the drain electrode 175, and has an island type ohmic contact member. The island-like ohmic contact 163 facing 165 is also a protrusion of the linear ohmic contact 161. At this time, the linear semiconductor 151 has substantially the same shape as the data line 171, the drain electrode 175, and the ohmic contacts 161 and 165 thereunder. However, the protrusion 154 of the linear semiconductor 151 has a portion not covered by the data line 171 and the drain electrode 175, such as a portion between the source electrode 173 and the drain electrode 175.

The width of the shielding electrode 88 of the liquid crystal display according to the present exemplary embodiment may also be equal to or smaller than the width of the data line 171. If the width of the shielding electrode 88 is narrow, the width of the shielding electrode 88 may be located inward from the boundary of the data line 171. can do.

Many features of the liquid crystal display shown in FIGS. 1 to 5 may correspond to the liquid crystal display shown in FIGS. 6 and 7.

As described above, in the present invention, by forming a shielding electrode overlapping the data line on the data line, while reducing the parasitic capacitance between the data line and the pixel electrode, the width of the shielding electrode is formed to be equal to the width of the data line or as narrow as the alignment error of the exposure machine. The transmittance of the liquid crystal display device can be optimized and light can be prevented from leaking between the pixel electrode and the gate line by forming the pixel electrode and the gate line overlapping each other.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (6)

A plurality of gate lines transferring gate signals, A plurality of data lines crossing the gate lines and transferring data voltages; A plurality of thin film transistors connected to the gate line and the data line, A passivation layer formed on the gate line, the data line, and the thin film transistor; A plurality of pixel electrodes formed on the passivation layer and connected to the thin film transistors, and A shielding electrode formed on the passivation layer and overlapping the data line; Including; The shielding electrode is equal to or narrower than the width of the data line. Liquid crystal display. In claim 1, And a difference between the width of the shielding electrode and the width of the data line is within an alignment error range of the exposure machine. In claim 1, The pixel electrode overlaps the gate line. In claim 1, And a storage electrode overlapping the pixel electrode or the drain electrode to form a storage capacitor. In claim 1, And a common electrode facing the pixel electrode and to which a common voltage is applied. In claim 5, And a voltage substantially equal to the common voltage is applied to the shielding electrode.

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