KR100947921B1 - 연성인쇄회로기판의 고연성 Au 표면처리 도금방법 - Google Patents
연성인쇄회로기판의 고연성 Au 표면처리 도금방법 Download PDFInfo
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- KR100947921B1 KR100947921B1 KR1020080042504A KR20080042504A KR100947921B1 KR 100947921 B1 KR100947921 B1 KR 100947921B1 KR 1020080042504 A KR1020080042504 A KR 1020080042504A KR 20080042504 A KR20080042504 A KR 20080042504A KR 100947921 B1 KR100947921 B1 KR 100947921B1
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- circuit board
- printed circuit
- weight
- flexible printed
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/43—Manufacturing methods
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85439—Silver (Ag) as principal constituent
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemically Coating (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
Claims (5)
- 반도체 실장을 위한 와이어본딩부 및 연성인쇄회로기판이 직접 외부 부품과의 결합되거나 부품이 실장되는 솔더링부로 이루어진 표면처리부를 구비하고, 일정한 회로패턴이 형성된 연성인쇄회로기판의 도금방법에 있어서,a)상기 연성인쇄회로기판을 탈지, 산세 및 연마하는 단계;b)상기 와이어본딩부 및 솔더링부에 무전해 니켈도금액을 이용하여 무전해 니켈도금층을 형성하는 단계;c)상기 무전해 니켈도금층 위에 금도금층을 형성하는 단계; 및d)인산염 유화제(Phosphate surfactant), 폴리아민계 환고리형 화합물 및 물이 함유된 봉공 처리제를 금도금층 위에 흡착 또는 코팅하는 단계를 포함하되,상기 봉공 처리제를 40~80℃에서 10~100초 동안 침적하는 것을 특징으로 하는 연성인쇄회로기판의 고연성 Au 표면처리 도금방법.
- 삭제
- 제 1항에 있어서,상기 봉공 처리제는 인산염 유화제(Phosphate surfactant) 1~3중량%, 폴리아민계 환고리형 화합물 1~4중량% 및 물 93~98중량%가 함유된 것을 특징으로 하는 연 성인쇄회로기판의 고연성 Au 표면처리 도금방법.
- 제 1항에 있어서,상기 무전해 니켈도금액은 황산니켈 30~40중량%와, 이온교환수 60~70중량%가 혼합된 제1용액 및 치아인산나트륨 35~45중량%와, 암모늄 말레이트 5~15중량%와, 이온교환수 45~55중량%가 혼합된 제2용액이 함유된 것을 특징으로 하는 연성인쇄회로기판의 고연성 Au 표면처리 도금방법.
- 제 4항에 있어서,상기 무전해 니켈도금액은 수산화나트륨 10~20중량%와, 호박산이나트륨 1~10중량%와, 이온교환수 75~90중량%가 혼합된 제3용액 또는 치아인산나트륨 25~35중량%와, 젖산암모늄 10~25중량%와, 이온 교환수 45~55중량%가 혼합된 제4용액 중 하나 이상의 용액이 더 첨가된 것을 특징으로 하는 연성인쇄회로기판의 고연성 Au 표면처리 도금방법.
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KR1020080042504A KR100947921B1 (ko) | 2008-05-07 | 2008-05-07 | 연성인쇄회로기판의 고연성 Au 표면처리 도금방법 |
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KR1020080042504A KR100947921B1 (ko) | 2008-05-07 | 2008-05-07 | 연성인쇄회로기판의 고연성 Au 표면처리 도금방법 |
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KR20090116515A KR20090116515A (ko) | 2009-11-11 |
KR100947921B1 true KR100947921B1 (ko) | 2010-03-17 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102138341B1 (ko) | 2019-09-03 | 2020-07-27 | 주식회사 갤트로닉스 코리아 | 고연성 니켈/주석 도금을 이용한 필름형 안테나 및 그 제조방법 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101969211B1 (ko) * | 2017-04-03 | 2019-04-15 | 정을연 | 방수용 커넥터의 컨택트 생산방법 |
KR102301221B1 (ko) | 2020-11-25 | 2021-09-09 | 박현배 | 대기압 플라즈마 처리로 도금성이 향상된 인쇄회로기판의 제조방법 및 이에 의해 제조된 인쇄회로기판 |
KR102515271B1 (ko) * | 2021-05-31 | 2023-03-29 | 주식회사 다이브 | 다층 금속박막 및 이의 제조방법 |
CN114107986A (zh) * | 2021-11-22 | 2022-03-01 | 深圳市宏钢机械设备有限公司 | 一种混合集成电路外壳引线局部镀金工艺 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001237262A (ja) * | 2000-02-21 | 2001-08-31 | Matsushita Electric Works Ltd | ワイヤーボンディング用表面処理方法 |
KR20040061376A (ko) * | 2002-12-30 | 2004-07-07 | 삼성전기주식회사 | PCB 상에 Cu, Ni 및 Au를 단일 공정으로도금하는 방법 |
KR100759452B1 (ko) | 2007-05-17 | 2007-09-20 | 주식회사 비에이치 | 니켈 패턴이 형성된 질화알루미늄 기판의 제조방법 |
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001237262A (ja) * | 2000-02-21 | 2001-08-31 | Matsushita Electric Works Ltd | ワイヤーボンディング用表面処理方法 |
KR20040061376A (ko) * | 2002-12-30 | 2004-07-07 | 삼성전기주식회사 | PCB 상에 Cu, Ni 및 Au를 단일 공정으로도금하는 방법 |
KR100525224B1 (ko) | 2002-12-30 | 2005-10-28 | 삼성전기주식회사 | PCB 상에 Cu, Ni 및 Au를 단일 공정으로도금하는 방법 |
KR100759452B1 (ko) | 2007-05-17 | 2007-09-20 | 주식회사 비에이치 | 니켈 패턴이 형성된 질화알루미늄 기판의 제조방법 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102138341B1 (ko) | 2019-09-03 | 2020-07-27 | 주식회사 갤트로닉스 코리아 | 고연성 니켈/주석 도금을 이용한 필름형 안테나 및 그 제조방법 |
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