KR0183045B1 - Patterning method of photoresist - Google Patents
Patterning method of photoresist Download PDFInfo
- Publication number
- KR0183045B1 KR0183045B1 KR1019920012868A KR920012868A KR0183045B1 KR 0183045 B1 KR0183045 B1 KR 0183045B1 KR 1019920012868 A KR1019920012868 A KR 1019920012868A KR 920012868 A KR920012868 A KR 920012868A KR 0183045 B1 KR0183045 B1 KR 0183045B1
- Authority
- KR
- South Korea
- Prior art keywords
- silicon
- photosensitive film
- photoresist
- doped
- forming
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 29
- 229920002120 photoresistant polymer Polymers 0.000 title claims abstract description 18
- 238000000059 patterning Methods 0.000 title description 2
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 16
- 239000010703 silicon Substances 0.000 claims abstract description 16
- 239000000463 material Substances 0.000 claims abstract description 6
- 239000004065 semiconductor Substances 0.000 claims abstract description 5
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 11
- 238000001020 plasma etching Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Drying Of Semiconductors (AREA)
Abstract
본 발명은 반도체 소자의 감광막 패턴형성 방법에 관한 것으로 소정의 물질층 상부에 감광막을 도포한 다음, 감광막 상부면에서 예정된 깊이까지 실리콘을 주입시켜 실리콘이 도프된 감광막을 형성하는 단계와, 예정된 패턴 형상을 갖는 마스크를 실리콘이 도프된 감광막 상부에 올려놓고 광을 노광시키는 단계와, 02플라즈마 RIE공정으로 비노광 지역의 실리콘이 도프된 감광막을 제거하고, 동시에 노광지역의 실린콘이 도프된 감광막은 02플라즈마 RIE공정을 계속실시함으로서 비노광지역의 감광막을 제거하여 감광막패턴을 형성하는 단계로 이루어지는 기술이다.The present invention relates to a method of forming a photoresist pattern of a semiconductor device, and then forming a photoresist film doped with silicon by coating a photoresist on a predetermined material layer and then injecting silicon to a predetermined depth from an upper surface of the photoresist; Placing a mask on the silicon-doped photoresist film and exposing the light, and removing the silicon-doped photoresist film in the non-exposed area by a 0 2 plasma RIE process, and simultaneously 0 2 A plasma RIE process is performed to form a photoresist pattern by removing a photoresist in a non-exposed area.
Description
제1도 내지 제4도는 본 발명에 의해 감광막 패턴을 형성하는 단계를 도시한 도면도.1 to 4 are diagrams showing the step of forming a photosensitive film pattern according to the present invention.
* 도면의 주요부분에 대한 부호설명* Explanation of symbols on the main parts of the drawings
1 : 실리콘 기판 2 : 물질층1 silicon substrate 2 material layer
3 : 감광막 4 : 실리콘이 도프된 감광막3: photosensitive film 4: photosensitive film doped with silicon
5 : 마스크 6 : 노광된 감광막5: mask 6: exposed photosensitive film
7 : Sio2막 8 : 감광막 패턴7: Sio 2 film 8: photosensitive film pattern
본 발명은 고집적 반도체 소자의 감광막 패턴 형성방법에 관한 것으로, 특히 실리콘 이온주입 및 건식식각 방법으로 감광막 패턴을 형성하는 방법에 관한 것이다.The present invention relates to a method for forming a photosensitive film pattern of a highly integrated semiconductor device, and more particularly, to a method for forming a photosensitive film pattern by silicon ion implantation and dry etching.
반도체 소자에 사용되는 소정의 물질을 패턴하기 위해서는 감광막을 이용하는데 이러한 감광막을 이용하여 감광막 패턴을 형성하는 방법은 이미 널리 공지된 기술이다.In order to pattern a predetermined material used in a semiconductor device, a photosensitive film is used. A method of forming a photosensitive film pattern using the photosensitive film is a well-known technique.
반도체 소자가 더욱 고집적화됨에 따라 미세한 감광막 패턴이 필요로하게 되어 종래에는 MIR(Multy Layer Resist)방법과 2층 레지스트(B-layer Resist)방법을 이용하였다.As the semiconductor devices are more highly integrated, fine photoresist patterns are required, and conventionally, a MIR (Multy Layer Resist) method and a B-layer resist method are used.
그러나, 상기 MLR방법은 하부레지스트, 산화막(또는 SOG) 및 상부레지스트를 도포하는 공정과, 각각 제거하는 공정이 복잡하여 공정시간이 길어진다.However, in the MLR method, a process of applying a lower resist, an oxide film (or SOG), and an upper resist and a process of removing each of them are complicated, and thus the process time is long.
또한 상기 2층 레지스트 방법은 고가의 실리콘이 포함된 레지스트를 사용해야 하며, 두번에 걸쳐 감광막을 도포하므로써 파티클(Particle)이 많이 발생하는 문제점이 있다.In addition, the two-layer resist method has to use a resist containing expensive silicon, and there is a problem that a lot of particles are generated by applying a photosensitive film twice.
따라서, 본 발명은 현재 사용되고 있는 일반적인 감광막을 도포하고, 이온주입 장비를 이용하여 감광막의 표면에 실리콘을 주입한 후, 스태퍼 장비를 이용한 노광공정을 통해 노광지역의 실리콘을 활성화(activation)시켜 02플라즈마 RIE공정을 진행시키는 동안 노광지역의 실리콘이 도프된 감광막을 Sio2막으로 형성하여 하부의 비노광지역의 감광막을 식각하는 동안 하드마스크의 역할을 수행시키는 감광막 패턴 형성방법을 제공하는데 그 목적이 있다.Therefore, the present invention is applied to the general photosensitive film that is currently used, injecting silicon on the surface of the photosensitive film using the ion implantation equipment, and then activated the silicon in the exposure area through an exposure process using a stepper equipment 0 2 A photoresist pattern forming method for forming a silicon doped photoresist layer in an exposed region as a Sio 2 film during the plasma RIE process and performing a role of a hard mask while etching the photoresist layer in a lower non-exposed region is provided. There is this.
이하, 첨부된 도면을 참조하여 본 발명을 상세히 설명하기로 한다.Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.
제1도 내지 제4도는 본 발명에 의해 감광막 패턴을 형성하는 단계를 도시한 단면도이다.1 to 4 are cross-sectional views showing the step of forming a photosensitive film pattern according to the present invention.
제1도는 실리톤 기판(1)상부에 패턴을 형성한 물질층(2) 예를들어 도전층 또는 절연층을 형성한 후 그 상부에 감광막(3)을 평탄하게 도포한 다음, 감광막(3) 상부면의 일정두께 예를 들어 2000-3000Å까지 실리콘(Si)을 이온주입하여 실리콘이 도포된 감광막(4)을 형성한 상태의 단면도이다.FIG. 1 shows that a patterned material layer 2 is formed on the silicide substrate 1, for example, a conductive layer or an insulating layer, and then the photosensitive film 3 is evenly applied thereon. It is sectional drawing of the state which formed the photosensitive film | membrane 4 with which silicon was apply | coated by ion-implanting silicon (Si) to the predetermined thickness of 2000-3000 micrometers of upper surfaces, for example.
제2도는 예정된 패턴 형상을 갖는 마스크(5)를 실리콘이 도프된 감광막(4) 상부에 올려놓고 광(예를들어 자외선)을 상기 실리콘이 도프된 감광막(4)에 노광시킨 상태의 단면도로서, 여기서 노광지역의 실리콘이 상기 노광시에 활성화(activation)된다.FIG. 2 is a cross-sectional view of a mask 5 having a predetermined pattern shape placed on top of a silicon-doped photosensitive film 4 and exposed to light (for example, ultraviolet light) to the silicon-doped photosensitive film 4. Here, the silicon in the exposure area is activated during the exposure.
제3도는 02플라즈마 RIE(Reactive Ion Etching)방법을 이용하여 비노광지역의 실리콘이 도프된 감광막(4)을 제거한 것으로, 이때 노광지역에 실리콘이 도프된 감광막(4)의 활성화된 실리콘(Si)과 02플라즈마의 02가 반응하여 Si02막(7)으로 형성된다.3 illustrates the removal of the silicon-doped photosensitive film 4 in the non-exposed areas by using a 0 2 plasma reactive ion etching (RIE) method, wherein the activated silicon (Si) of the photosensitive film 4 doped in the exposed areas is removed. ) and to the 0 2 plasma 02 it is formed in the reaction Si0 2 film 7.
제4도는 상기 Si02막(7)을 마스크로 이용하여 02플라즈마 RIE공정으로 비노광 지역의 감광막(3)을 식각하여 감광막 패턴(8)을 형성한 상태의 단면도이다.4 is a cross-sectional view of the photoresist pattern 8 formed by etching the photoresist 3 in a non-exposed region by using the SiO 2 film 7 as a mask by a 0 2 plasma RIE process.
상기 공정후 방법으로 패턴을 형성할 물질층을 식각하면 된다.The material layer for forming the pattern may be etched by the post-process.
상기한 본 발명에 의하면 MLR 또는 2층 레지스트를 형성할 때 공정시간이 길어지는 것과, 고가의 실리콘이 포함된 레지스트를 사용하는 것과 파티클이 발생하는 등의 문제점을 해결하여 감광막 패턴 방법을 진행할 수 있다.According to the present invention described above, it is possible to proceed with the photosensitive film patterning method by solving a problem of lengthening the process time when forming an MLR or a two-layer resist, using a resist containing expensive silicon, generating particles, and the like. .
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920012868A KR0183045B1 (en) | 1992-07-20 | 1992-07-20 | Patterning method of photoresist |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920012868A KR0183045B1 (en) | 1992-07-20 | 1992-07-20 | Patterning method of photoresist |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR940002957A KR940002957A (en) | 1994-02-19 |
| KR0183045B1 true KR0183045B1 (en) | 1999-04-15 |
Family
ID=19336584
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019920012868A KR0183045B1 (en) | 1992-07-20 | 1992-07-20 | Patterning method of photoresist |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR0183045B1 (en) |
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1992
- 1992-07-20 KR KR1019920012868A patent/KR0183045B1/en not_active IP Right Cessation
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| Publication number | Publication date |
|---|---|
| KR940002957A (en) | 1994-02-19 |
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