JPS60166899U

JPS60166899U - Storage device

Info

Publication number: JPS60166899U
Application number: JP5416684U
Authority: JP
Inventors: 篤志小川
Original assignee: 日本電気株式会社
Priority date: 1984-04-13
Filing date: 1984-04-13
Publication date: 1985-11-06

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は本考案の第一の実施例を示すブロック図、第２
図は第１図の記憶装置の動作を示すタイミング図、第３
図は本考案の第二の実施例を示すブロック図、第４図は
第２図の記憶装置の動作を示すタイミング図である。１・・・・・・メモリライト信号、２・・・・・・ライ
トデータ、３・・・・・・アドレス入力、４・・・・・
・書き込み制御回路、５・・・・・・アドレス信号、６
・・・・・・ＲＡＳ信号、７・・・・・・ＣＡＳ信号、
８・・・・・・ＷＥ信号、９・・・・・・Ｄ　Ｉ　Ｎ信
号、１０・・・・・・ダイナミックＲＡＭ、１１・・１
．・・Ｗ信号、１２・・・・・・Ｉ信号、１３・・・・
・・データバス、１４・・・・・・一時記憶回路、１５
・・・・・・メモＩＪ　ＩＪ−ド信号、１６・・・・・
・読み出し制御回路、１７・・・・・・Ｄｏｕア信号、
１８・・・・・・Ｗ信号、１９・・・・・・Ｋ信号、２
０−・・・・・データバス、２１・・・・・・一時記憶
回路、２２・・・・・・リードデータ信号。 →すFigure 1 is a block diagram showing the first embodiment of the present invention;
The figure is a timing diagram showing the operation of the storage device in Figure 1, and Figure 3 is a timing diagram showing the operation of the storage device in Figure 1.
The figure is a block diagram showing a second embodiment of the present invention, and FIG. 4 is a timing diagram showing the operation of the storage device of FIG. 2. 1...Memory write signal, 2...Write data, 3...Address input, 4...
・Write control circuit, 5...Address signal, 6
...RAS signal, 7...CAS signal,
8...WE signal, 9...DIN signal, 10...Dynamic RAM, 11...1
．． ...W signal, 12...I signal, 13...
...Data bus, 14...Temporary storage circuit, 15
...Memo IJ IJ-do signal, 16...
・Reading control circuit, 17...Doua signal,
18...W signal, 19...K signal, 2
0-...Data bus, 21...Temporary storage circuit, 22...Read data signal. →S

Claims

[Scope of utility model registration request]

It has a dynamic RAM, a write/read control circuit, and a temporary storage circuit, and the write data is stored in the temporary storage circuit during the precharge period of the dynamic RAM, or the read data is stored in the temporary storage circuit in advance. is read out during a precharge period of the dynamic RAM.