[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

JPS53104159A - Impurity diffusing method - Google Patents

Impurity diffusing method

Info

Publication number
JPS53104159A
JPS53104159A JP1808077A JP1808077A JPS53104159A JP S53104159 A JPS53104159 A JP S53104159A JP 1808077 A JP1808077 A JP 1808077A JP 1808077 A JP1808077 A JP 1808077A JP S53104159 A JPS53104159 A JP S53104159A
Authority
JP
Japan
Prior art keywords
impurity diffusing
diffusing method
impurity
metal
melting point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1808077A
Other languages
Japanese (ja)
Inventor
Tetsuo Sadamasa
Masami Iwamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP1808077A priority Critical patent/JPS53104159A/en
Publication of JPS53104159A publication Critical patent/JPS53104159A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE: To prevent the diffusing layer at the back of the substrate from being formed, by sticking two substrates with a metal having low melting point constituting the compound semiconductor substrate and by diffusing the impurity from the side where the metal having low melting point is formed.
COPYRIGHT: (C)1978,JPO&Japio
JP1808077A 1977-02-23 1977-02-23 Impurity diffusing method Pending JPS53104159A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1808077A JPS53104159A (en) 1977-02-23 1977-02-23 Impurity diffusing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1808077A JPS53104159A (en) 1977-02-23 1977-02-23 Impurity diffusing method

Publications (1)

Publication Number Publication Date
JPS53104159A true JPS53104159A (en) 1978-09-11

Family

ID=11961661

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1808077A Pending JPS53104159A (en) 1977-02-23 1977-02-23 Impurity diffusing method

Country Status (1)

Country Link
JP (1) JPS53104159A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57143879A (en) * 1981-02-27 1982-09-06 Nec Corp Manufacture of photo-semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57143879A (en) * 1981-02-27 1982-09-06 Nec Corp Manufacture of photo-semiconductor device

Similar Documents

Publication Publication Date Title
JPS5244173A (en) Method of flat etching of silicon substrate
JPS5389374A (en) Production of semiconductor device
JPS53104159A (en) Impurity diffusing method
JPS53105366A (en) Manufacture for semiconductor element substrate
JPS546793A (en) Photo detector of semiconductor
JPS53142877A (en) Manufacture for compound semiconductor device
JPS5432970A (en) Appreciating method for semiconductor device
JPS5351964A (en) Selective growth method for semiconductor crystal
JPS53104161A (en) Crystal growth method
JPS5265664A (en) Selective introduction of impurity in compound semiconductor substrate
JPS5421272A (en) Metal photo mask
JPS5244175A (en) Method of flat etching of silicon substrate
JPS57183053A (en) Semiconductor device
JPS5434752A (en) Manufacture of semiconductor device
JPS53135266A (en) Production of semiconductor device
JPS52141565A (en) Manufacture of semiconductor unit
JPS54977A (en) Manufacture for semiconductor device
JPS53101977A (en) Diffusion method of inpurity to semiconductor substrate
JPS548969A (en) Mounting method of impurity-diffused film
JPS547867A (en) Manufacture for semiconductor device
JPS52144272A (en) Forming method of electrode in semiconductor device
JPS53114349A (en) Impurity diffusing method
JPS5436192A (en) Manufacture for semiconductor
JPS5339858A (en) Impurity diffusion method
JPS53136958A (en) Selective impurity diffusion method into semiconductor substrate