JPS58147150A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To eliminate a shortcircuit trouble between the emitter and the base of a semiconductor device due to electrodes formed in the same window by composing a mask in case of introducing an impurity of a silicon oxidized nitride film, thereby suppressing an unnecessary side etching in the step of washing out with an HF series solution. CONSTITUTION:A silicon oxidized nitride film 14 is selectively removed with a 50[%] HF as an etchant, and a window is formed on the region to be formed with an emitter. An emitter region 15 is formed by introducing by an ion implantation method impurity ions from the window formed at the film 14 into a silicon substrate, and activating it. Then, when an Al film is covered and emitter electrode wirings 16 and base electrode wirings 17 are patterned, the film 14 operates as a preferable insulating film. and an emitter electrode 16 which is contacted with the region 15 in the window is disposed in the region 15, the shortcircuit trouble between the emitter and the base can be eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and in particular to an emitter cell 7 having an insulating full mask that can withstand washout after diffusion. Regarding the align method.

(bJ Techniques for using rice and problems) Using the mask for impurity diffusion or implantation for forming the emitter region of a transistor as it is as an insulating layer when forming the electrodes and wiring of the ray ivy, that is, the problem of impurity diffusion, etc. It is a reasonable method to share the window of the mask and the electrode window of the insulating layer, and is usually called emitter self-alignment (S@Atf ajign; self-alignment).

The simplest example of this emitter self-line is the first
As shown in the 119T plane view in the figure, when or after forming the space region 2 on the silicon substrate 1, a silicon dihydride (Slow) film 3 is formed on the silicon substrate 1,
In this method, a window 4 is selectively provided by photolithography at an 810° angle 3 on the emitter formation region, and the window 4 is used as the window for the impurity diffusion layer for forming the emitter region and the electrode window. After diffusion of the impurity for forming the emitter region and prior to electrode formation, II! In order to ensure ohmic fitting between the metal of the aluminum (AJ) cage which will serve as the L pole and the emitter region 5, the surface of the silicon substrate 1 is pre-treated with an HF (HF) thread bath solution (as described above). In addition to the formation of the emitter region, removal of the thin layer formed on the surface of the silicon substrate 1 is carried out. This pretreatment is called a wash out process, and in this conventional example, in this wash out process, the HF solution is used not only on the oxide film on the silicon substrate, but also on the Slow Elk 3t. The window 4 is enlarged laterally in order to open the boat.

When the expansion width of No. 011 exceeds the lateral diffusion length of the emitter region 5, the control of the impurity diffusion process and the out process is necessary because the emitter electrode will cause a short circuit between the base and the base. It's not easy.

As an attempt to improve the conventional method, a method using a silicon nitride (SimN+) film has been proposed. However, since this etchant of 81□NhM also etches silicon, as shown in the cross-sectional view of FIG.
6 5tBN4 film 7 that requires Na exchange 7
Not only is there a high risk of cracking metal in the emitter diffusion process, but also 81m
Nh film 7, p and 8i0. The edge 6 is etched in a large amount in the lateral direction, and the end face of the window 8 becomes overhang-like, and the risk of short circuit between the cutter and the base is not resolved as in the previous example.
Also, A to be used as an electrode! If the underlying metal layer is thin, there is a risk of wire breakage.

Another attempt to improve the first conventional method is to use a polycrystalline silicon film, the cross-sectional view of which is shown in FIG. In this method, a window 4 is formed on a silicon substrate l, and then a polycrystalline silicon film 9 is formed.
The impurity diffusion for forming the ivy range 5 is performed through the polycrystalline silicon member 9. The width of the window 4 is not increased during this diffusion bale washout process.

However, it is not a preferable method to interpose the polycrystalline silicon film 9t, and it is necessary to ensure good ohmic contact between the polycrystalline silicon and A1 when forming the wire 1h in the summer. There are inconveniences such as having to pay for mu.

810131 in the Washi Island out process mentioned earlier
LiI[W due to etching of 13 or 6 has become a serious problem as the depth of the space region and emitter electrode, that is, the depth of impurity diffusion, becomes shallower. (e) Object of the Invention The present invention , an insulating film is formed on a silicon substrate, an impurity 1 for forming an emitter region is introduced into the substrate through a window selectively provided in the insulating film, and the surface of the substrate within the window is washed;
・It is an object of the present invention to provide a manufacturing method that does not cause problems such as short circuits between emitter pastes in an emitter cell 7 alignment method in which an emitter electrode is formed on the window after actuation. In accordance with the object of the invention, a silicon intensified nitriding layer is formed on a silicon substrate, the silicon oxynitriding layer is removed by an irradiation process, and an impurity for forming a desired region is added to the silicon substrate. The following embodiments of the present invention will be described below: An example will be specifically described with reference to FIG.

Silicon oxide compound (7 Lico/Oxynitride S
It has a low etching rate with respect to HF-based solutions that are commonly used as etchants for silicon (Si) and silicon dioxide (SiOl) (selectivity for bit 8101 can be provided).

In addition, unlike silicon nitride 7 (5isN4), the oxide formed by commercially available silicon is resistant to cracks caused by heat treatment due to less stress within the film, and hydrogen that becomes hot carriers. Even if it does not contain atoms and is in direct contact with the viscous surface of the semiconductor substrate, it does not exhibit the characteristics Ktl of the semiconductor substrate.

Because silicon oxide chemical treatment has the above-mentioned characteristics,
This makes it possible to achieve the objective t.

FIG. 4 is a sectional view showing an example of the present invention.

In the figure, 11 is a silicon substrate, 12t! pace training area,
13 is Stow-based, 14 is silicon oxynitride film, 15 is
indicates an emitter region, and 16 indicates a carved ivy electrode/distribution IIM.

The silicon oxynitride film 14 is grown using a chemical vapor deposition method (hereinafter referred to as C
It is formed by the VD method. As a reaction gas,
For example, use a gas that is diluted to about 1 with argon (Ar) and mixed with nine monosilane (Sin, ), ammonia (NH), and suboxide phoneme (N-O) at a flow rate ratio of 1=3:lO to 20. When plasma CVD is used, the reaction temperature is about 400°C, and when 1 raS-RF is not used, the reaction temperature is about 700°C to 800°C. The thickness of this silicon oxynitride film 14 is 200 (nm) to 500 (nm) (
nm).

Selective removal of the silicon plated compound 14 formed by such a CVD method is performed using a resist mask according to a photolithography method, for example, with concentration &bO (%) H1i.
't is implemented as an etchant to provide a window over the area where the emitter will be formed.

The emitter region 15 is formed using this silicon oxynitride
This is done by applying a thin object containing an impurity to the silicon substrate 11, using the vI 114 as a mask, and diffusing or activating it.

Prior to the impurity introduction process and electrode formation, a washout with an HF solution is performed, but as mentioned earlier, silicon oxynitride has a low etching rate with an HF solution, and the silicon oxynitride a14 has a low etching rate. The formed electrode window is set within the emitter region 15.

Next, an A/film is deposited by vapor deposition or L sputtering, and the emitter electrode/wiring 16-pitch wide electrode/wiring 17-layer is patterned, but at this time, the silicon oxynitride ml 4Fi is excellent! be prudent as
In addition, since the emitter "#a, mlc;" which is in contact with the emitter region 15 within the window is within the emitter region 15, the short-circuit damage of the emitter pace..." which occurs in the method according to the prior art can be avoided. Does not occur.

Incidentally, the SIO 13 seen in FIG. 4 is the S10! that has already been formed on the silicon substrate 11 prior to the emitter formation process described above. This shows the state in which the silicon oxide nitride 11414 formation KI remains.
LL, this may be removed in advance. A 5ins film may be provided on the bottom layer. In these cases, silicon oxide nitride $114 is placed inside the first window that is mistakenly illuminated at US10m13. Install a second window.

(f) Effects of the Invention According to the present invention, in the emitter cell 7 alignment method, when introducing impurities! By constructing the substrate from a silicon oxynitride film, it is possible to suppress side etching, which is costly during the washout process using an HF solution, and to prevent the emitter base from being short-circuited by the electrode formed in the same window. 1Ft - 0 that can be eliminated

[Brief explanation of the drawing]

Figures w41 to 3 are cross-sectional views showing the conventional example, and Figure 4 is a cross-sectional view showing an embodiment of the present invention.
0. 4 is a window, 5 is an emitter region, 6 is a TiSiO film, 7 is a 5isNi film, 8 is a window, 9 is a polycrystalline silicon film,
11 is a silicon substrate, 12 is a pace area, 13 is 5if
t film, 14 is a silicon oxide film, 15 is an emitter region, 16 is a Fi emitter electrode, and 117 is a pace electrode.
Figure 41 is shown.

Claims (1)

[Claims] forming a silicon oxynitride film on a silicon island plate, selectively removing the silicon-oxynitride group to provide a window, introducing impurities for forming a desired region into the silicon substrate through the window; 1. A method of manufacturing a semiconductor device, comprising: washing out the silicon substrate surface that is narrowed within the window, and then forming an electrode on the window.