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JPS56116155A - Error detection system of parity check system - Google Patents

Error detection system of parity check system

Info

Publication number
JPS56116155A
JPS56116155A JP2001280A JP2001280A JPS56116155A JP S56116155 A JPS56116155 A JP S56116155A JP 2001280 A JP2001280 A JP 2001280A JP 2001280 A JP2001280 A JP 2001280A JP S56116155 A JPS56116155 A JP S56116155A
Authority
JP
Japan
Prior art keywords
parity check
data
error
register
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001280A
Other languages
Japanese (ja)
Other versions
JPS5920143B2 (en
Inventor
Harumasa Taniguchi
Koji Torii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55020012A priority Critical patent/JPS5920143B2/en
Publication of JPS56116155A publication Critical patent/JPS56116155A/en
Publication of JPS5920143B2 publication Critical patent/JPS5920143B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Correction Of Errors (AREA)

Abstract

PURPOSE:To decrease the number of parity check circuit, by concentratingly synthesizing the parity check circuit. CONSTITUTION:When the data transferred to the bus-in-register 9 or buffer 10 via the bus-in 6 or data bus 7 from the input and output device 3 of external device or main storage device 2 is input to the X register 25, the output of the AND circuit 27 is at ''0'' , and the #2X register error flip-flop 28 is not set with the error signal from the parity check circuit 14, even if the data error is detected through the parity check of the said data at the parity check circuit 14. If code error is present in the data of the internal information 11, the parity error signal ''1'' is produced from the parity check circuit 14 to set the #2X register error flip-flop 28 via the AND circuit 27.
JP55020012A 1980-02-20 1980-02-20 Parity check error detection method Expired JPS5920143B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55020012A JPS5920143B2 (en) 1980-02-20 1980-02-20 Parity check error detection method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55020012A JPS5920143B2 (en) 1980-02-20 1980-02-20 Parity check error detection method

Publications (2)

Publication Number Publication Date
JPS56116155A true JPS56116155A (en) 1981-09-11
JPS5920143B2 JPS5920143B2 (en) 1984-05-11

Family

ID=12015194

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55020012A Expired JPS5920143B2 (en) 1980-02-20 1980-02-20 Parity check error detection method

Country Status (1)

Country Link
JP (1) JPS5920143B2 (en)

Also Published As

Publication number Publication date
JPS5920143B2 (en) 1984-05-11

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