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JPS54130883A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPS54130883A
JPS54130883A JP3746378A JP3746378A JPS54130883A JP S54130883 A JPS54130883 A JP S54130883A JP 3746378 A JP3746378 A JP 3746378A JP 3746378 A JP3746378 A JP 3746378A JP S54130883 A JPS54130883 A JP S54130883A
Authority
JP
Japan
Prior art keywords
film
type
exposed
source
side face
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3746378A
Other languages
Japanese (ja)
Other versions
JPS6231507B2 (en
Inventor
Minoru Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP3746378A priority Critical patent/JPS54130883A/en
Publication of JPS54130883A publication Critical patent/JPS54130883A/en
Publication of JPS6231507B2 publication Critical patent/JPS6231507B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To prevent a short channel effect by forming a semiconductor layer on an insulating substrate and covering this layer with an insulating layer partially and etching the semiconductor layer near the insulating layer to make thickness small and forming source and drain regions there.
CONSTITUTION: P-type Si film 2 is grown on sapphire insulating substrate 1 and is etched selectively, and the surface and the side face of left film 2 are covered with SiO2 film 4. Next, gate electrode 3 consisting of poly-crystal Si is provided at the center of film 4, and the surface and the side face are masked with resistor film 6. After that, NH4F solution is used to etch, and exposed film 4 is removed, and exposed film 2 under this state is subjected to plasma etching to make thickness small. Next, film 6 is removed, and exposed film 4 is similarly removed by NH4F solution, and PSG film 5 which becomes a diffusion source is caused to adhere onto all the surface. After that, heat treatment is performed to form N+-type source regions 10 and 25 and N+-type drain regions 11 and 26 in film 2 in both sides of electrode 3 by diffusion.
COPYRIGHT: (C)1979,JPO&Japio
JP3746378A 1978-04-01 1978-04-01 Production of semiconductor device Granted JPS54130883A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3746378A JPS54130883A (en) 1978-04-01 1978-04-01 Production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3746378A JPS54130883A (en) 1978-04-01 1978-04-01 Production of semiconductor device

Publications (2)

Publication Number Publication Date
JPS54130883A true JPS54130883A (en) 1979-10-11
JPS6231507B2 JPS6231507B2 (en) 1987-07-08

Family

ID=12498209

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3746378A Granted JPS54130883A (en) 1978-04-01 1978-04-01 Production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS54130883A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56152290A (en) * 1980-03-31 1981-11-25 Western Electric Co Method of manufacturing mesa device from semiconductor body
US4447823A (en) * 1980-03-12 1984-05-08 Tokyo Shibaura Denki Kabushiki Kaisha SOS p--n Junction device with a thick oxide wiring insulation layer
US4533934A (en) * 1980-10-02 1985-08-06 Westinghouse Electric Corp. Device structures for high density integrated circuits
JPS62209862A (en) * 1986-03-10 1987-09-16 Matsushita Electric Ind Co Ltd Thin film semiconductor device
US5396099A (en) * 1990-11-28 1995-03-07 Nec Corporation MOS type semiconductor device having a high ON current/OFF current ratio

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4447823A (en) * 1980-03-12 1984-05-08 Tokyo Shibaura Denki Kabushiki Kaisha SOS p--n Junction device with a thick oxide wiring insulation layer
JPS56152290A (en) * 1980-03-31 1981-11-25 Western Electric Co Method of manufacturing mesa device from semiconductor body
JPH0152913B2 (en) * 1980-03-31 1989-11-10 Ei Teii Ando Teii Tekunorojiizu Inc
US4533934A (en) * 1980-10-02 1985-08-06 Westinghouse Electric Corp. Device structures for high density integrated circuits
JPS62209862A (en) * 1986-03-10 1987-09-16 Matsushita Electric Ind Co Ltd Thin film semiconductor device
US5396099A (en) * 1990-11-28 1995-03-07 Nec Corporation MOS type semiconductor device having a high ON current/OFF current ratio

Also Published As

Publication number Publication date
JPS6231507B2 (en) 1987-07-08

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