JPH1197392A - Method and system for filling fine recess - Google Patents
Method and system for filling fine recessInfo
- Publication number
- JPH1197392A JPH1197392A JP9269306A JP26930697A JPH1197392A JP H1197392 A JPH1197392 A JP H1197392A JP 9269306 A JP9269306 A JP 9269306A JP 26930697 A JP26930697 A JP 26930697A JP H1197392 A JPH1197392 A JP H1197392A
- Authority
- JP
- Japan
- Prior art keywords
- ultrafine particles
- fine
- filling
- semiconductor substrate
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Electrodes Of Semiconductors (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、微細窪みの充填方
法及び装置に係り、特に半導体素子の配線用溝等の微細
窪みに銅(Cu)等の金属を充填するための充填方法及
び装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for filling a fine dent, and more particularly to a method and an apparatus for filling a fine dent such as a wiring groove of a semiconductor element with a metal such as copper (Cu). .
【0002】[0002]
【従来の技術】従来、半導体素子の導電線路としての配
線パターンを形成するための配線材料として、アルミニ
ウム(Al)又はアルミニウム合金が用いられている。
しかしながら、半導体素子の配線工程においては集積度
を更に増大させたいという要求からアルミニウム又はア
ルミニウム合金に替わる低電気抵抗材料による微細パタ
ーン形成技術の確立が切望されている。2. Description of the Related Art Conventionally, aluminum (Al) or an aluminum alloy has been used as a wiring material for forming a wiring pattern as a conductive line of a semiconductor element.
However, in a wiring process of a semiconductor element, there is a strong demand for establishment of a fine pattern forming technique using a low electric resistance material instead of aluminum or an aluminum alloy due to a demand for further increasing the degree of integration.
【0003】これは、集積度が高くなるにつれて、電流
密度が増加するため温度上昇とそれに伴って生じる熱応
力が共に無視できない程度に高まる結果、従来のAl又
はAl合金ではストレスマイグレーションやエレクトロ
マイグレーションによる断線の恐れが増すことに大きく
起因している。これを避けるため、Al又はAl合金へ
のCuの添加や高融点金属との積層化が行われつつある
が万全ではない。[0003] This is because, as the degree of integration increases, the current density increases, so that the temperature rise and the resulting thermal stress both increase to a nonnegligible level. As a result, in conventional Al or Al alloys, stress migration or electromigration occurs. This is largely due to the increased risk of disconnection. In order to avoid this, addition of Cu to Al or Al alloy and lamination with a high melting point metal are being performed, but this is not perfect.
【0004】そこで、通電による過度の発熱を避けるた
め、従来のAl又はAl合金とは根本的に異なる導電性
のよい材料を配線形成に採用することが必然的に要求さ
れている。現用材料のうち、Al系よりも電気比抵抗の
小さい材料としては、銅(Cu)と銀(Ag)がある。
このうち、銀は高価であり、又、強度および耐食性が低
く、構成原子が拡散しやすいという欠点がある。したが
って、銅及び銅合金が配線材料としては最適である。[0004] Therefore, in order to avoid excessive heat generation due to energization, it is inevitably required to employ a material having good conductivity, which is fundamentally different from conventional Al or Al alloy, for forming the wiring. Among the current materials, copper (Cu) and silver (Ag) are materials having lower electric resistivity than Al-based materials.
Among them, silver is expensive, has low strength and low corrosion resistance, and has the disadvantage that constituent atoms are easily diffused. Therefore, copper and copper alloy are most suitable as wiring materials.
【0005】従来、配線パターンを形成するためには、
スパッタリング成膜とケミカルドライエッチングを組合
わせて用いる方法がとられてきたが、スパッタリング成
膜ではアスペクト比(深さと直径又は幅の比)の高い配
線用の溝又は穴への金属の充填又は埋め込みが困難であ
り、又、銅又は銅合金に対してはケミカルドライエッチ
ングが技術的に確立されていないという問題点があっ
た。Conventionally, to form a wiring pattern,
A method using a combination of sputtering film formation and chemical dry etching has been used, but in sputtering film formation, metal is filled or buried in a wiring groove or hole having a high aspect ratio (ratio of depth to diameter or width). In addition, there has been a problem that chemical dry etching has not been technically established for copper or copper alloy.
【0006】また、微細な配線用の溝への埋め込み手段
として、CVD法があるが、堆積膜中への有機原料から
の炭素(C)の混入が避けられないという問題点があっ
た。Further, there is a CVD method as a means for embedding in a fine wiring groove. However, there is a problem that incorporation of carbon (C) from an organic raw material into a deposited film is unavoidable.
【0007】[0007]
【発明が解決しようとする課題】すなわち、従来のいず
れの方法を用いても、アスペクト比の高い微細な配線用
の溝や穴等にCu又はCu合金等の電気比抵抗の小さい
材料を充填することができないという問題点があった。That is, in any of the conventional methods, a material having a small electric resistivity such as Cu or a Cu alloy is filled in a fine wiring groove or hole having a high aspect ratio. There was a problem that it was not possible.
【0008】本発明は上述の事情に鑑みなされたもの
で、充填材料として銅又は銅合金等の電気比抵抗の小さ
い材料を用いることができ、かつ微細な配線用の溝等の
微細窪みに銅又は銅合金等の電気比抵抗の小さい材料を
充填することができる微細窪みの充填方法及び装置を提
供することを目的とする。The present invention has been made in view of the above circumstances, and it is possible to use a material having a low electric resistivity such as copper or a copper alloy as a filling material, and to insert copper into a fine depression such as a fine wiring groove. Another object of the present invention is to provide a method and an apparatus for filling a fine dent, which can be filled with a material having a small electric resistivity such as a copper alloy.
【0009】[0009]
【課題を解決するための手段】上述した目的を達成する
ため、本発明の充填方法は、微細窪みを有する基材の表
面に超微粒子の材料を供給し、該超微粒子に超音波振動
を印加しながら、前記微細窪みへの所定材料の充填を行
うことを特徴とするものである。In order to achieve the above-mentioned object, a filling method according to the present invention supplies a material of ultrafine particles to the surface of a substrate having fine depressions and applies ultrasonic vibration to the ultrafine particles. Meanwhile, a predetermined material is filled into the fine depressions.
【0010】また、本発明の充填装置は、微細窪みを有
する基材の表面に超微粒子の材料を供給する供給ノズル
と、前記基材又は超微粒子の少なくとも一方に超音波振
動を付与する超音波振動子とを備えたことを特徴とする
ものである。The filling apparatus of the present invention further comprises a supply nozzle for supplying a material of ultrafine particles to the surface of a substrate having fine depressions, and an ultrasonic wave for applying ultrasonic vibration to at least one of the substrate and the ultrafine particles. And a vibrator.
【0011】本発明によれば、微細窪みを有する基材表
面に超微粒子の材料を供給し、超微粒子に超音波振動を
加えることによって、相互に局所的結合を生じた超微粒
子凝集体を再破砕することができ、微細窪み内部への超
微粒子の充填を促進することができる。According to the present invention, ultrafine particles are supplied to the surface of a substrate having fine depressions, and ultrasonic vibrations are applied to the ultrafine particles to regenerate ultrafine particle aggregates which have been locally bonded to each other. It can be crushed, and can promote the filling of ultrafine particles into the fine depressions.
【0012】[0012]
【発明の実施の形態】以下、本発明に係る微細窪みの充
填方法及び装置の実施の形態の一例を図1乃至図5を参
照して説明する。図1は微細窪みの充填方法によって製
造される半導体素子の製造工程を示す説明図である。図
1(a)に示すように、半導体素子が形成された半導体
基材1上の導電層1aの上にSiO2からなる絶縁膜2
を堆積させた後、リソグラフィ・エッチング技術により
コンタクトホール3と配線用の溝4を形成する。そし
て、TiN等からなるバリア層5を形成する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method and an apparatus for filling a fine dent according to the present invention will be described below with reference to FIGS. FIG. 1 is an explanatory view showing a manufacturing process of a semiconductor device manufactured by a method for filling a fine recess. As shown in FIG. 1A, an insulating film 2 made of SiO 2 is formed on a conductive layer 1a on a semiconductor substrate 1 on which a semiconductor element is formed.
Is deposited, a contact hole 3 and a wiring groove 4 are formed by lithography / etching technology. Then, a barrier layer 5 made of TiN or the like is formed.
【0013】次に、本発明に係る充填工程により、図1
(b)に示すように半導体基板1のコンタクトホール3
および溝4にCuを充填するとともに絶縁膜2上にCu
層6を堆積させる。その後、化学的機械的研磨(CM
P)により、絶縁膜2上のCu層を除去してコンタクト
ホール3および配線用の溝4に充填されたCu層6の表
面と絶縁膜2の表面とをほぼ同一平面にする。これによ
り、図1(c)に示すようにCu層6からなる配線が形
成される。Next, in the filling step according to the present invention, FIG.
As shown in (b), the contact hole 3 of the semiconductor substrate 1
And grooves 4 are filled with Cu and Cu is
Layer 6 is deposited. After that, chemical mechanical polishing (CM
By P), the Cu layer on the insulating film 2 is removed, and the surface of the Cu layer 6 filled in the contact hole 3 and the wiring groove 4 and the surface of the insulating film 2 are made substantially flush. As a result, a wiring made of the Cu layer 6 is formed as shown in FIG.
【0014】図2は本発明の充填材の充填工程を実施す
る装置の構成の一実施例を示す概略図である。図2に示
すように、チャンバ12はバルブV1を介して真空ポン
プ13に接続されており、その内部が真空引き可能にな
っている。そして、チャンバ12内に、ヒータ14を内
部に具備したサセプタ15が設置されている。サセプタ
15は超音波振動子16に接続されている。サセプタ1
5上の半導体基材1の上方には供給ノズル17が設置さ
れている。供給ノズル17はバルブV2を介してCu等
からなる超微粒子を貯留する貯留タンク18に接続され
ている。また貯留タンク18にはキャリヤガスボンベ1
9からキャリヤガスが供給されるようになっている。FIG. 2 is a schematic view showing one embodiment of the structure of an apparatus for performing the filling step of the filler according to the present invention. As shown in FIG. 2, the chamber 12 is connected to a vacuum pump 13 via a valve V1, and the inside thereof can be evacuated. A susceptor 15 having a heater 14 therein is provided in the chamber 12. The susceptor 15 is connected to the ultrasonic vibrator 16. Susceptor 1
A supply nozzle 17 is provided above the semiconductor substrate 1 on the top 5. The supply nozzle 17 is connected via a valve V2 to a storage tank 18 for storing ultrafine particles made of Cu or the like. The storage tank 18 has a carrier gas cylinder 1
9 is supplied with carrier gas.
【0015】次に、図2の装置を用いて半導体基材1の
微細窪みに銅を充填する工程を、図3を参照して説明す
る。ステップ1(S1)において、半導体基材1をチャ
ンバ12内に装入する。次に、ステップ2(S2)にお
いて、バルブV1を開き真空ポンプ13を稼働してチャ
ンバ12内の真空引きを行う。Next, the step of filling the fine recesses of the semiconductor substrate 1 with copper using the apparatus shown in FIG. 2 will be described with reference to FIG. In step 1 (S1), the semiconductor substrate 1 is charged into the chamber 12. Next, in step 2 (S2), the valve V1 is opened and the vacuum pump 13 is operated to evacuate the chamber 12.
【0016】次に、ステップ3(S3)において、バル
ブV2,V3を開きキャリヤガスボンベ19から貯留タ
ンク18を経由してチャンバ12内にキャリヤガスを供
給する。これにより、供給ノズル17からCu等からな
る超微粒子を半導体基材1の表面に供給する。この場
合、超微粒子の平均粒径は30Å〜0.1μmである。
次に、ステップ4(S4)において、真空ポンプ13を
稼働させ続けながらバルブV1〜3の開度を適宜調整す
ることにより、チャンバ12内の圧力調整を行う。その
後、ステップ5(S5)において、超音波振動子16を
作動させて半導体基材1に超音波を印加しながら、超微
粒子をコンタクトホール3と配線用の溝4内に充填す
る。この場合、超音波振動は、周波数が1〜100kH
z、振幅が1〜1000μmである。この充填工程の
際、必要に応じ、ヒータ14によりサセプタ15を加熱
し、超微粒子の流動性を高めてもよい。また、図2、図
3の内容と別に、超微粒子を液体に懸濁した状態で同様
の充填操作を行うこともある。Next, in step 3 (S3), the valves V2 and V3 are opened and the carrier gas is supplied from the carrier gas cylinder 19 into the chamber 12 via the storage tank 18. Thereby, the ultrafine particles made of Cu or the like are supplied from the supply nozzle 17 to the surface of the semiconductor substrate 1. In this case, the average particle size of the ultrafine particles is 30 ° to 0.1 μm.
Next, in step 4 (S4), the pressure in the chamber 12 is adjusted by appropriately adjusting the opening of the valves V1 to V3 while keeping the vacuum pump 13 operating. Then, in step 5 (S5), the ultrafine particles are filled into the contact hole 3 and the wiring groove 4 while applying the ultrasonic wave to the semiconductor substrate 1 by operating the ultrasonic vibrator 16. In this case, the ultrasonic vibration has a frequency of 1 to 100 kHz.
z, the amplitude is 1 to 1000 μm. At the time of this filling step, the susceptor 15 may be heated by the heater 14 as needed to increase the fluidity of the ultrafine particles. In addition, apart from the contents shown in FIGS. 2 and 3, the same filling operation may be performed in a state where the ultrafine particles are suspended in a liquid.
【0017】図4は、超音波を半導体基材に印加しなが
ら超微粒子を微細窪みに充填する場合の状態を示す模式
図である。図4に示すように、半導体基材1に超音波が
印加されるため、超微粒子Pが振動する。一般に、超微
粒子は体積に対する表面積の割合が著しく大きいので、
相互凝集・凝着をして局所的結合(橋かけ)を生じ易い
が、相互に局所的結合を生じた超微粒子凝集体を再破砕
(微小破砕)することによって、微細窪み内部への充填
を促進することができる。この場合、微細窪みは幅Wが
1μm以下、幅Wに対する深さhの比であるアスペクト
比が1〜10である。そして、微細窪みの表面は、金属
窒化物等からなっている。FIG. 4 is a schematic diagram showing a state in which ultrafine particles are filled in a fine recess while applying ultrasonic waves to a semiconductor substrate. As shown in FIG. 4, since the ultrasonic waves are applied to the semiconductor substrate 1, the ultrafine particles P vibrate. In general, ultrafine particles have a remarkably large ratio of surface area to volume,
Although local aggregation (cross-linking) is likely to occur due to mutual aggregation and cohesion, the ultrafine particle aggregates that have caused local bonding to each other are re-crushed (micro-crushed) to fill the inside of the fine dents. Can be promoted. In this case, the fine dent has a width W of 1 μm or less and an aspect ratio of 1 to 10 which is a ratio of the depth h to the width W. The surface of the fine depression is made of metal nitride or the like.
【0018】基材表面に金属の凝着を妨害する酸化皮膜
が存在していたとしても、強力な超音波衝撃力が作用す
ることによって酸化皮膜は破壊除去される。皮膜の破壊
機構については未解明な部分が多いが、水溶液が介在す
る場合は強力な超音波振動によって、液中にキャビテー
ションが起こり、それに起因した高圧力によって皮膜が
破壊されるものと推察される。なお、図2では省略した
が、超微粒子を水溶液や、他の液体に懸濁した状態で基
材に供給することもある。Even if there is an oxide film on the surface of the substrate that prevents the adhesion of metal, the oxide film is destroyed and removed by the action of a strong ultrasonic impact. Although there are many unknowns about the mechanism of film breakage, it is presumed that in the presence of an aqueous solution, strong ultrasonic vibrations cause cavitation in the liquid and the resulting high pressure destroys the film. . Although not shown in FIG. 2, the ultrafine particles may be supplied to the substrate in a state of being suspended in an aqueous solution or another liquid.
【0019】本発明においては、超微粒子に超音波によ
る衝撃力が付加されればよく、超微粒子は単独で存在し
ても、水溶液等に懸濁した状態でもよい。図5は水溶液
中の懸濁超微粒子Pを加振する場合の例を示す模式図で
ある。図5に示す例においては、超音波振動子16を半
導体基材1上の懸濁超微粒子Pに接触させて、超微粒子
に超音波を印加する。In the present invention, it suffices to apply an ultrasonic impact to the ultrafine particles, and the ultrafine particles may be present alone or may be suspended in an aqueous solution or the like. FIG. 5 is a schematic diagram showing an example in which the suspended ultrafine particles P in an aqueous solution are vibrated. In the example shown in FIG. 5, the ultrasonic transducer 16 is brought into contact with the suspended ultrafine particles P on the semiconductor substrate 1 to apply ultrasonic waves to the ultrafine particles.
【0020】本実施例の説明においては、微細窪みに銅
を充填する場合を説明したが、本発明を適用することに
より、微細窪みに銀(Ag)、金(Au)、白金(P
t)およびこれらの合金からなる電気比抵抗の小さい材
料を充填することができる。In the description of the present embodiment, the case where copper is filled in the fine depression is described. However, by applying the present invention, silver (Ag), gold (Au), and platinum (P
t) and a material having a small electric resistivity composed of these alloys can be filled.
【0021】本発明は上述のように構成したので、以下
に列挙する効果を奏する。 メッキ等のような他の常法による充填が不可能な材料
基材と堆積材の組合せに対しても適用可能である。 真空で超音波を印加する場合、基材と充填材とが直接
に接触することになり常温で凝着するので、密着力が大
きい。 超微粒子はバルク材より融点が低いので、充填材に欠
陥があっても、充填後に低温加熱すれば、この欠陥は消
失可能である。 常温でドライプロセス可能なので清浄を保持できる。 すなわち、(1)CVDやPVD等の通常のドライプロ
セスによる充填では雰囲気を常温よりもはるかに高い温
度に保持する必要がある。高温の場合、材料表面での化
学反応が著しく活発になるので、極微量の酸素が存在す
れば、充填部分表面やチャンバ内壁の局所的酸化、材料
劣化や浮遊粒子・分子の当該表面への付着を激しく起こ
すことになる。また、(2)液相メッキのようなウェッ
トプロセスでは、チャンバ内壁及び基材の大部分が液中
に埋没するので、充填後の洗浄が厄介で手間がかかる。
本発明の工程は、上述の(1),(2)を回避できるの
で、清浄度が向上する。Since the present invention is configured as described above, the following effects can be obtained. The present invention is also applicable to a combination of a material base material and a deposition material that cannot be filled by other conventional methods such as plating. When applying ultrasonic waves in a vacuum, the base material and the filler come into direct contact with each other and adhere at room temperature, so that the adhesion is large. Since the ultrafine particles have a lower melting point than the bulk material, even if the filler has a defect, the defect can be eliminated by heating at a low temperature after filling. Since dry processing is possible at room temperature, it can be kept clean. That is, (1) In the case of filling by a normal dry process such as CVD or PVD, it is necessary to maintain the atmosphere at a temperature much higher than room temperature. At high temperatures, the chemical reaction on the material surface becomes extremely active, so if a trace amount of oxygen is present, local oxidation of the surface of the filling part and the inner wall of the chamber, material deterioration, and adhesion of suspended particles and molecules to the surface Violently. (2) In a wet process such as liquid phase plating, most of the inner wall of the chamber and the base material are buried in the liquid, so that cleaning after filling is troublesome and troublesome.
Since the process of the present invention can avoid the above-mentioned (1) and (2), the cleanliness is improved.
【0022】[0022]
【発明の効果】以上説明したように、本発明によれば、
材料を超微粒子状態で基材表面に供給するとともに該超
微粒子に超音波振動を印加することにより、基材上の微
細窪みにCu等の電気比抵抗の小さい材料を空洞(ボイ
ド)を形成することなく充填することができる。As described above, according to the present invention,
By supplying the material to the surface of the base material in the form of ultrafine particles and applying ultrasonic vibration to the ultrafine particles, a material (such as Cu) having a small electrical resistivity, such as Cu, is formed in a void in a fine depression on the base material. Can be filled without the need.
【図1】本発明に係る微細窪みの充填方法によって製造
される半導体素子の製造工程を示す説明図である。FIG. 1 is an explanatory view showing a manufacturing process of a semiconductor device manufactured by a method for filling a fine dent according to the present invention.
【図2】本発明の充填材の充填工程を実施する装置の構
成を示す概略図である。FIG. 2 is a schematic view showing a configuration of an apparatus for performing a filling step of a filler according to the present invention.
【図3】本発明の充填材の充填工程を示す工程図であ
る。FIG. 3 is a process chart showing a filling step of a filler according to the present invention.
【図4】超音波を半導体基材に印加しながら超微粒子を
微細窪みに充填する場合の状態を示す模式図である。FIG. 4 is a schematic diagram showing a state in which ultrafine particles are filled in a fine depression while applying ultrasonic waves to a semiconductor substrate.
【図5】水溶液中の懸濁超微粒子を加振する場合の例を
示す模式図である。FIG. 5 is a schematic view showing an example in which suspended ultrafine particles in an aqueous solution are vibrated.
1 半導体基材 2 絶縁膜 3 コンタクトホール 4 溝 5 バリア層 6 Cu層 12 チャンバ 13 真空ポンプ 14 ヒータ 15 サセプタ 16 超音波振動子 17 供給ノズル 18 貯留タンク 19 キャリヤガスボンベ P 超微粒子 V1,V2,V3 バルブ DESCRIPTION OF SYMBOLS 1 Semiconductor base material 2 Insulating film 3 Contact hole 4 Groove 5 Barrier layer 6 Cu layer 12 Chamber 13 Vacuum pump 14 Heater 15 Susceptor 16 Ultrasonic transducer 17 Supply nozzle 18 Storage tank 19 Carrier gas cylinder P Ultrafine particles V1, V2, V3 Valve
Claims (9)
の材料を供給し、該超微粒子に超音波振動を印加しなが
ら、前記微細窪みへの所定材料の充填を行うことを特徴
とする微細窪みの充填方法。An ultrafine particle material is supplied to the surface of a substrate having fine depressions, and a predetermined material is filled into the fine depressions while applying ultrasonic vibration to the ultrafine particles. Filling method for micro pits.
ペクト比が1〜10であることを特徴とする請求項1記
載の微細窪みの充填方法。2. The method according to claim 1, wherein the fine dent has a width of 1 μm or less and an aspect ratio of 1 to 10.
kHz、振幅が1〜1000μmであることを特徴とす
る請求項1記載の微細窪みの充填方法。3. The ultrasonic vibration has a frequency of 1 to 100.
2. The method according to claim 1, wherein the frequency is 1 kHz and the frequency is 1 to 1000 [mu] m.
1μmであることを特徴とする請求項1記載の微細窪み
の充填方法。4. The ultrafine particles have an average particle size of 30 ° to 0.1 °.
2. The method according to claim 1, wherein the thickness is 1 [mu] m.
とする請求項1記載の微細窪みの充填方法。5. The method according to claim 1, wherein the substrate is a semiconductor substrate.
金又はこれらの合金からなることを特徴とする請求項1
記載の微細窪みの充填方法。6. The material of the ultrafine particles is made of copper, silver, platinum, or an alloy thereof.
A method for filling the fine dents according to the above.
ることを特徴とする請求項1記載の微細窪みの充填方
法。7. The method according to claim 1, wherein the surface of the fine depression is a metal nitride.
的機械的研磨(CMP)により充填された材料の表面を
平坦化することを特徴とする請求項1記載の微細窪みの
充填方法。8. The method according to claim 1, wherein after filling the material into the fine depression, the surface of the filled material is flattened by chemical mechanical polishing (CMP).
の材料を供給する供給ノズルと、前記基材又は超微粒子
の少なくとも一方に超音波振動を印加する超音波振動子
とを備えたことを特徴とする微細窪みの充填装置。9. A supply nozzle for supplying a material of ultrafine particles to a surface of a substrate having fine depressions, and an ultrasonic vibrator for applying ultrasonic vibration to at least one of the substrate and the ultrafine particles. A filling device for a fine depression.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9269306A JPH1197392A (en) | 1997-09-16 | 1997-09-16 | Method and system for filling fine recess |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9269306A JPH1197392A (en) | 1997-09-16 | 1997-09-16 | Method and system for filling fine recess |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH1197392A true JPH1197392A (en) | 1999-04-09 |
Family
ID=17470512
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9269306A Pending JPH1197392A (en) | 1997-09-16 | 1997-09-16 | Method and system for filling fine recess |
Country Status (1)
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JP (1) | JPH1197392A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001027983A1 (en) * | 1999-10-15 | 2001-04-19 | Ebara Corporation | Method and apparatus for forming interconnection |
WO2001084610A1 (en) * | 2000-05-02 | 2001-11-08 | Catalysts & Chemicals Industries Co., Ltd. | Method of manufacturing integrated circuit, and substrate with integrated circuit formed by the method of manufacturing integrated circuit |
JP2003257890A (en) * | 2002-03-07 | 2003-09-12 | Seiko Epson Corp | Method for filling substance, method for forming film, device and its fabricating method |
JP2005039261A (en) * | 2003-06-30 | 2005-02-10 | Semiconductor Energy Lab Co Ltd | Method of manufacturing semiconductor device and display device |
KR100597348B1 (en) | 2003-08-12 | 2006-07-10 | 세이코 엡슨 가부시키가이샤 | Forming method of wiring pattern, manufacturing method of semiconductor device, electro-optical apparatus and electronic equipment |
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JPH09134891A (en) * | 1995-09-06 | 1997-05-20 | Vacuum Metallurgical Co Ltd | Formation of thin film of semiconductor substrate |
JPH09162288A (en) * | 1995-12-12 | 1997-06-20 | Matsushita Electric Ind Co Ltd | Wiring structure and forming method thereof |
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1997
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JPS593952A (en) * | 1982-06-30 | 1984-01-10 | Fujitsu Ltd | Formation of aluminum wiring layer |
JPH09134891A (en) * | 1995-09-06 | 1997-05-20 | Vacuum Metallurgical Co Ltd | Formation of thin film of semiconductor substrate |
JPH09162288A (en) * | 1995-12-12 | 1997-06-20 | Matsushita Electric Ind Co Ltd | Wiring structure and forming method thereof |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001027983A1 (en) * | 1999-10-15 | 2001-04-19 | Ebara Corporation | Method and apparatus for forming interconnection |
US6730596B1 (en) | 1999-10-15 | 2004-05-04 | Ebara Corporation | Method of and apparatus for forming interconnection |
WO2001084610A1 (en) * | 2000-05-02 | 2001-11-08 | Catalysts & Chemicals Industries Co., Ltd. | Method of manufacturing integrated circuit, and substrate with integrated circuit formed by the method of manufacturing integrated circuit |
EP1280193A1 (en) * | 2000-05-02 | 2003-01-29 | Catalysts & Chemicals Industries Co., Ltd. | Method of manufacturing integrated circuit, and substrate with integrated circuit formed by the method of manufacturing integrated circuit |
EP1280193A4 (en) * | 2000-05-02 | 2006-01-04 | Catalysts & Chem Ind Co | Method of manufacturing integrated circuit, and substrate with integrated circuit formed by the method of manufacturing integrated circuit |
US7163892B2 (en) | 2000-05-02 | 2007-01-16 | Catalysts & Chemicals Industries Co., Ltd. | Process for producing integrated circuit, and substrate with integrated circuit |
KR100805128B1 (en) | 2000-05-02 | 2008-02-21 | 쇼꾸바이 카세이 고교 가부시키가이샤 | Method of manufacturing integrated circuit, and substrate with integrated circuit formed by method of manufacturing integrated circuit |
JP4578755B2 (en) * | 2000-05-02 | 2010-11-10 | 日揮触媒化成株式会社 | Integrated circuit manufacturing method |
JP2003257890A (en) * | 2002-03-07 | 2003-09-12 | Seiko Epson Corp | Method for filling substance, method for forming film, device and its fabricating method |
JP2005039261A (en) * | 2003-06-30 | 2005-02-10 | Semiconductor Energy Lab Co Ltd | Method of manufacturing semiconductor device and display device |
JP4619050B2 (en) * | 2003-06-30 | 2011-01-26 | 株式会社半導体エネルギー研究所 | Method for manufacturing display device |
KR100597348B1 (en) | 2003-08-12 | 2006-07-10 | 세이코 엡슨 가부시키가이샤 | Forming method of wiring pattern, manufacturing method of semiconductor device, electro-optical apparatus and electronic equipment |
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