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JPH112655A - High temperature testing device of semiconductor - Google Patents

High temperature testing device of semiconductor

Info

Publication number
JPH112655A
JPH112655A JP17110597A JP17110597A JPH112655A JP H112655 A JPH112655 A JP H112655A JP 17110597 A JP17110597 A JP 17110597A JP 17110597 A JP17110597 A JP 17110597A JP H112655 A JPH112655 A JP H112655A
Authority
JP
Japan
Prior art keywords
semiconductor
heater
terminal
test
tested
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17110597A
Other languages
Japanese (ja)
Inventor
Yoshio Ishida
良夫 石田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Diamond Electric Manufacturing Co Ltd
Original Assignee
Diamond Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Diamond Electric Manufacturing Co Ltd filed Critical Diamond Electric Manufacturing Co Ltd
Priority to JP17110597A priority Critical patent/JPH112655A/en
Publication of JPH112655A publication Critical patent/JPH112655A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To test in high temperature without using a constant temperature oven by connecting to an external testing device with a continuity pin introduced from a terminal of a socket and arranging a semiconductor to be tested on which a heater is pressed on a carrier connected to the terminal. SOLUTION: A terminal 42 connected to a semiconductor 10 to be tested is provided to a socket 40, at the lower part of the socket 40, a continuity pin 44 extended from the terminal 42 is provided, and in the middle space of the socket 40, a next testing part is embedded. The testing part is constituted of a carrier 60 having a pattern connected to the terminal 42, a fixing member 62 arranged on the upper surface of the carrier 60, a semiconductor to be tested 10 positioned and fixed with the fixing member 62 and a heater 30 arranged on it upper part. The semiconductor to be tested 10 and the heater 30 are pressed by way of a buffer 20 such as silicone sheet. With this constitution without using a constant temperature oven, heaters are individually provided, long lead wires are eliminated and stable performance tests become possible even if the semiconductor to be tested 10 is for high frequency.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、半導体の生産工程にお
いて行われる高温度耐久試験装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high temperature endurance test apparatus used in a semiconductor production process.

【0002】[0002]

【従来の技術】半導体の出荷前の生産工程において、ス
クリーリングのためにバーンインテストなどの高温度試
験が行われているが、この高温度試験は、従来より恒温
槽が使用されている。すなわち、被試験半導体を電気通
電するためのソケット等の試験治具一式を80-150℃程度
の一定温度の恒温槽に入れて試験が行われている。
2. Description of the Related Art In a production process before shipment of a semiconductor, a high-temperature test such as a burn-in test is performed for screening, and a high-temperature test is conventionally performed in the high-temperature test. That is, a test is performed by putting a set of test jigs such as a socket for electrically supplying a semiconductor under test into a constant temperature bath at a constant temperature of about 80 to 150 ° C.

【0003】半導体の試験手順は、図11に示すような
ものとなっている。すなわち、トレイに搭載される複数
の被試験半導体10は、先ず常温下での試験を行い、合格
の後にチャンバを使用する高温度試験に移行するが、被
試験半導体10は、常温時にトレイやソケット、試験装置
等から構成される試験治具で試験を行った後は、常温下
とほぼ同一の試験治具がセットされた恒温槽の中に入れ
テストする。この高温試験において、恒温槽内部の被試
験治具と恒温槽外部の試験用制御装置との接続は、前記
常温試験で用いたリード線よりも長い数cmから十数cmの
リード線によってなされている。
[0005] A test procedure for a semiconductor is as shown in FIG. That is, a plurality of semiconductor devices under test 10 mounted on a tray are tested at room temperature first, and after passing, the test is shifted to a high temperature test using a chamber. After the test is performed using a test jig composed of a test apparatus and the like, the test is performed by placing the test jig in a constant temperature bath in which the same test jig as that at normal temperature is set. In this high-temperature test, the connection between the jig to be tested inside the constant temperature chamber and the test control device outside the constant temperature chamber is made by a lead wire of several cm to several tens of cm longer than the lead wire used in the normal temperature test. I have.

【0004】[0004]

【発明が解決しようとする課題】上記試験治具の熱容量
は被試験半導体の熱容量より格段に大きいために、試験
治具は当初より恒温槽内にセットされているが、試験用
の制御装置は近年の数百MHzといった高周波数で高集積
の半導体試験に対応する装置のために、高温度に弱く、
このために恒温槽内部の試験治具と、恒温槽外部の制御
装置とは上記の通り長いリード線により接続されること
になる。しかしながらこのような高周波数で動作する電
子部品では、被試験部品と制御装置との間が離れること
で信号の応答性が損なわれ、実際の動作テストが行えな
いものとなっている。すなわち、上記従来技術のように
被試験部品から長いリード線を介して制御装置に接続す
ることで高周波数で動作する電子部品は制御装置からの
正確な命令を受け取れなくなっている。上記試験での電
子部品の周波数は150MHzが限度となっており、近年の50
0MHzから数GHzといった周波数の半導体では、試験が行
えないものとなっている。
Since the heat capacity of the test jig is much larger than the heat capacity of the semiconductor under test, the test jig is set in a thermostat from the beginning. For equipment that supports high-frequency and highly integrated semiconductor testing such as recent hundreds of MHz, it is susceptible to high temperatures,
For this reason, the test jig inside the thermostat and the control device outside the thermostat are connected by the long lead wire as described above. However, in an electronic component operating at such a high frequency, the responsiveness of a signal is impaired due to the separation between the component under test and the control device, and an actual operation test cannot be performed. That is, by connecting the component under test to the control device via a long lead wire as in the above-described prior art, an electronic component operating at a high frequency cannot receive an accurate command from the control device. The frequency of electronic components in the above test is limited to 150 MHz,
Tests cannot be performed on semiconductors with frequencies from 0 MHz to several GHz.

【0005】同時に、上記試験治具の熱容量は被試験半
導体の熱容量より格段に大きく、恒温槽内温度が所定の
温度に達するには図10の曲線aで示すようにかなり時
間がかかり、試験時間短縮の弊害になっている。また、
恒温槽を用いることなく被試験半導体を常温下で試験治
具にセットした状態のまま被試験半導体にヒータを圧接
できれば初期の目的が達成できる可能性があったが、従
来ヒータの発熱密度は極めて小さいために所定の温度に
昇温しようとすればヒータが大型化し、上記ヒータ自身
の熱容量が大きいため図10の曲線bで示すようにオー
バーシュート特性となり、被半導体を破壊に至らせると
いった問題のために、このような試験装置は造られたこ
とがなかった。
At the same time, the heat capacity of the test jig is much larger than the heat capacity of the semiconductor under test, and it takes a considerable time for the temperature in the thermostatic chamber to reach a predetermined temperature as shown by a curve a in FIG. It is the evil of shortening. Also,
If the heater could be pressed against the semiconductor under test in a state where the semiconductor under test was set in a test jig at room temperature without using a constant temperature bath, the initial purpose could be achieved.However, the heat generation density of the conventional heater was extremely high. If the temperature is raised to a predetermined temperature because of the small size, the heater becomes large, and since the heat capacity of the heater itself is large, the heater has an overshoot characteristic as shown by a curve b in FIG. Therefore, such a test device has never been built.

【0006】本発明は上記課題に鑑み、簡素な試験装置
とすると共に、数百MHzから数GHzといった高周波数の半
導体の試験が容易に行えるようにすることを目的とす
る。
SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to provide a simple test apparatus and to easily test a semiconductor having a high frequency of several hundred MHz to several GHz.

【0007】[0007]

【課題を解決するための手段】上記課題を解決するため
に、本発明では、ソケットの一部に端子を有し、当該端
子に接続するパターンを有するキャリアと、当該端子か
ら導出され外部の試験装置への接続部となる導通ピン
と、前記キャリア上に被試験半導体を配置し、前記被試
験半導体にはヒータが圧接し、恒温槽を使用することな
く高温試験を行うことを特徴とする半導体の高温度試験
装置とする。上記被試験半導体はキャリアが不要な半導
体素子を使用してもよい。
In order to solve the above-mentioned problems, according to the present invention, there is provided a carrier having a terminal in a part of a socket and having a pattern connected to the terminal, and an external test device derived from the terminal. A conductive pin serving as a connection portion to a device, a semiconductor to be tested is arranged on the carrier, a heater is pressed against the semiconductor to be tested, and a high-temperature test is performed without using a thermostat. High temperature test equipment. As the semiconductor to be tested, a semiconductor element that does not require a carrier may be used.

【0008】[0008]

【実施例】本発明の第1の実施例とする半導体の高温度
試験装置を図1と図2に示す。図1には被試験半導体の
試験用ソケットへの装着前の外形斜視図を示し、図2に
はこの側面断面図を示している。
1 and 2 show a semiconductor high temperature test apparatus according to a first embodiment of the present invention. FIG. 1 is a perspective view showing the external appearance of the semiconductor device to be tested before being mounted on a test socket, and FIG. 2 is a side sectional view of the semiconductor device.

【0009】図1と図2が示すように、ソケット40は半
導体と電気的接続される端子42を備え、当該ソケット40
の下部(外部)には前記端子42が延長された導通ピン44
が備えられている。このソケット40の中心空間には次の
ような被試験部分が埋設される。この被試験部分は、前
記端子42に接続されるパターン64を有するキャリア60
と、このキャリア60の上面に配置される固定材62と、固
定材62により位置決め固定される被試験半導体10と、こ
の上部に配置されるヒータ30とから構成され、前記被試
験半導体10とヒータ30との間にはシリコン・シート等を
成形した緩衝材20が配置されており、当該緩衝材20を介
して被試験半導体10とヒータ30とが圧接されている。
As shown in FIGS. 1 and 2, the socket 40 has terminals 42 electrically connected to the semiconductor.
In the lower part (outside), there is a conduction pin 44 having the terminal 42 extended.
Is provided. In the center space of the socket 40, a portion to be tested as described below is embedded. The portion to be tested has a carrier 60 having a pattern 64 connected to the terminal 42.
And a fixing member 62 disposed on the upper surface of the carrier 60, a semiconductor device under test 10 positioned and fixed by the fixing member 62, and a heater 30 disposed above the fixing member 62. A buffer material 20 formed by molding a silicon sheet or the like is disposed between the semiconductor device under test 30 and the semiconductor device under test 10 and the heater 30 through pressure.

【0010】上記構成において、ソケット40はプラスチ
ックや樹脂を成型したものであり、また、キャリア60は
テストボードを兼用する被試験半導体10の支持具となっ
ている。本実施例においては、被試験半導体10はチップ
部品と呼ばれるリード部分のない半導体を使用した例を
示しており、キャリア60上のパターン64とは半導体の裏
面で接続されている。
In the above configuration, the socket 40 is formed by molding plastic or resin, and the carrier 60 is a support for the semiconductor under test 10 which also serves as a test board. In the present embodiment, an example is shown in which a semiconductor without a lead portion called a chip component is used as the semiconductor under test 10, and the pattern 64 on the carrier 60 is connected to the back surface of the semiconductor.

【0011】本実施例においては、上述の通り被試験半
導体10に空気間隙を極小にすることが主目的で暑さ0.3m
m程度の緩衝材20を介してヒータ30が取り付けられてい
る。当該ヒータ30は図6に示すようなものとなってお
り、リード32-32によりエネルギーを取り込み、発熱を
行うものである。当該ヒータ30は次のようにして作られ
る。先ず窒化珪素シートをシート成形機で成形し、窒化
チタンもしくはタングステン等のペーストを印刷する。
この後に窒化珪素シートをラミネート成形し、リード線
穴開加工、焼成を行い、リード線穴に銀ロー等のロー付
材を挿入し、コバール等のリード線を挿入後ロー付けを
行い、表面を研磨している。このようにして形成される
ヒータ30は、39W/平方センチメートル以上の発熱密度を
持ち、且つ被試験半導体の熱容量より小さな熱容量とす
ることが望ましい。
In the present embodiment, as described above, the main purpose is to minimize the air gap in the semiconductor under test 10 so that the heat of 0.3 m is used.
The heater 30 is attached via a buffer material 20 of about m. The heater 30 is configured as shown in FIG. 6, and takes in energy by the leads 32-32 to generate heat. The heater 30 is made as follows. First, a silicon nitride sheet is formed by a sheet forming machine, and a paste such as titanium nitride or tungsten is printed.
After this, a silicon nitride sheet is formed by lamination, lead wire opening processing and firing are performed, a brazing material such as silver brazing is inserted into the lead wire hole, a lead wire such as Kovar is inserted, and brazing is performed. Polished. It is desirable that the heater 30 formed in this way has a heat generation density of 39 W / cm 2 or more and a heat capacity smaller than the heat capacity of the semiconductor under test.

【0012】また本実施例では、ヒータ30の断熱を考慮
し、蓋50と固定材62の一部に突起を設けている。これに
よりヒータ30と被試験半導体10との熱が他の部分に逃げ
ないようになり、安定した熱負荷が被試験半導体10に与
えられるようになっている。この突起は上記位置でなく
とも、ヒータ30と被試験半導体10とが周囲の部分に接触
しなければ、別の位置に設けてもよい。
In the present embodiment, projections are provided on the lid 50 and a part of the fixing member 62 in consideration of heat insulation of the heater 30. This prevents the heat of the heater 30 and the semiconductor under test 10 from escaping to other parts, so that a stable heat load is applied to the semiconductor under test 10. The projection may be provided at another position even if the heater 30 and the semiconductor device under test 10 do not come into contact with the surrounding parts.

【0013】また、図6に示すように、ヒータ30もしく
は被試験半導体10の少なくとも一方に熱電対34等の温度
センサを取り付ければ、次のような作用が得られる。す
なわちこのような構成によれば、ヒータ30もしくは被試
験半導体10自身の動作状況が監視でき、図10の下の波形
が示すように、ヒータ30が必要以上に熱量を有する場合
にはエネルギー供給をオフし、逆に不足する場合にはオ
ンできるので、ヒータ30の熱容量が小さいことにより図
10のc曲線が示すような理想的なヒータ特性に沿った細
かい温度調節が行える。
As shown in FIG. 6, when a temperature sensor such as a thermocouple 34 is attached to at least one of the heater 30 and the semiconductor under test 10, the following operation can be obtained. That is, according to such a configuration, the operation status of the heater 30 or the semiconductor under test 10 itself can be monitored, and as shown by the lower waveform in FIG. 10, when the heater 30 has an unnecessarily large amount of heat, energy is supplied. The heater 30 can be turned off and turned on if it runs short.
Fine temperature adjustment can be performed in accordance with ideal heater characteristics as shown by a curve 10 in FIG.

【0014】上記導通ピン44は外部の試験装置(図示な
し)に接続されており、この試験装置から実使用時をシ
ュミレーションした環境を作り出し、導通ピン44から端
子42、パターン64といった経路で被試験半導体10に負荷
を与えている。
The conduction pin 44 is connected to an external test device (not shown), and an environment simulating the actual use is created from this test device. The semiconductor 10 is loaded.

【0015】次に第2の実施例を図3と図4に示す。図
3と図4には、上記第1の実施例に示した被試験半導体
10をLSIやMPUといった比較的大型の半導体とした
例を示している。すなわち、被試験半導体10のピン12は
キャリアを使用することなく直接にパターン64に当接
し、当該被試験半導体10の下部に緩衝材20を介してヒー
タ30が圧接されている。本実施例では、固定材62はソケ
ット40に一体形成されている。なお図3と4において説
明のなかった部分については上記第1の実施例において
述べたものと同一もしくは相当分であるので説明は省略
する。
Next, a second embodiment is shown in FIGS. FIGS. 3 and 4 show the semiconductor device under test shown in the first embodiment.
10 shows an example in which a relatively large semiconductor such as an LSI or MPU is used. That is, the pins 12 of the semiconductor under test 10 directly contact the pattern 64 without using a carrier, and the heater 30 is pressed under the semiconductor 10 under test via the buffer material 20. In this embodiment, the fixing member 62 is formed integrally with the socket 40. 3 and 4 are the same as or correspond to those described in the first embodiment, and the description thereof will be omitted.

【0016】第3の実施例を図5に示す。図5では、ソ
ケット40の内壁下面にバネ70を持ち、このバネ70により
支持されるキャリア60上にヒータ30を有し、この上部に
緩衝材20を介して被試験半導体10を配置している。本実
施例では、被試験半導体10をラジアル部品とし、このピ
ン12の側面を端子42に当てている。また、上記実施例と
異なり、バネ70の弾性により被試験半導体10とヒータ30
との圧接がなされている。本実施例においてキャリア60
は特別な配線パターン64を持たず、ヒータ30の支持のみ
行っており、第1の実施例において述べたキャリア64と
は異なるものである。しかしながら他の部分において、
上記に説明のなかったものは第1の実施例に示したもの
と同一もしくは相当分であるので説明は省略する。
FIG. 5 shows a third embodiment. In FIG. 5, a spring 70 is provided on the lower surface of the inner wall of the socket 40, the heater 30 is provided on a carrier 60 supported by the spring 70, and the semiconductor 10 to be tested is arranged on the upper portion via the buffer 20. . In the present embodiment, the semiconductor under test 10 is a radial component, and the side surface of the pin 12 is applied to the terminal 42. Further, unlike the above embodiment, the semiconductor under test 10 and the heater 30
Has been pressed against. In this embodiment, the carrier 60
Has no special wiring pattern 64 and only supports the heater 30, which is different from the carrier 64 described in the first embodiment. However, in other parts,
Those not described above are the same as or correspond to those described in the first embodiment, and thus description thereof is omitted.

【0017】上記第1の実施例にはチップ部品を、第2
乃至第3の実施例においては、フラットパッケージ形や
ラジアル形の被試験半導体10を使用したが、これは図7
乃至図9に示す半導体等に相互置き換え可能なものであ
る。
In the first embodiment, a chip component is
In the third to third embodiments, the semiconductor device under test 10 of a flat package type or a radial type is used.
To the semiconductors shown in FIGS.

【0018】また、上記それぞれの実施例において、被
試験半導体10とヒータ30とは緩衝材20を用いて圧接して
いるが、この被試験半導体10とヒータ30とは直接接触さ
せてもよい。また、被試験半導体10とヒータ30との位置
関係は第1の実施例と第2第3の実施例を相互に置き換
えてもよい。すなわち、ヒータ30は被試験半導体10の上
部でも下部でもいずれの位置に配置してもよい。またこ
のとき被試験半導体10の外形にあわせてヒータ30を立体
的に成形できるが、多数半導体の検査を行う場合には平
板状のヒータとするのが望ましい。
Further, in each of the above embodiments, the semiconductor under test 10 and the heater 30 are pressed against each other using the buffer material 20, but the semiconductor under test 10 and the heater 30 may be directly contacted. The positional relationship between the semiconductor under test 10 and the heater 30 may be such that the first embodiment and the second and third embodiments are interchangeable. That is, the heater 30 may be arranged at any position, either above or below the semiconductor under test 10. At this time, the heater 30 can be three-dimensionally formed according to the outer shape of the semiconductor device 10 to be tested. However, when inspecting a large number of semiconductors, it is preferable to use a flat heater.

【0019】また、上記それぞれの実施例において、被
試験半導体10のヒータ30圧接面と対向する側に圧接保持
具を当接させてもよいし、ソケット40の一部にヒータ30
の固定材62を組み込んでもよい。上記「圧接保持具」と
は第1の実施例に示す蓋50に包含されるものであり、被
試験半導体10とヒータ30両者の圧接を保持するものであ
る。また上記第1の実施例で述べたように、蓋50や固定
材62、もしくはヒータ30や被試験半導体10が接する部分
の一部に突起を設け、ヒータ30及び被試験半導体10の断
熱性の向上を図ってもよい。
In each of the above-described embodiments, the pressure contact holder may be brought into contact with the semiconductor device under test 10 on the side facing the heater 30 pressure contact surface, or a portion of the socket 40 may be contacted with the heater 30.
May be incorporated. The "press-contact holder" is included in the lid 50 shown in the first embodiment, and holds the press-contact between the semiconductor under test 10 and the heater 30. As described in the first embodiment, a protrusion is provided on the lid 50, the fixing member 62, or a part of the portion where the heater 30 and the semiconductor under test 10 are in contact with each other, and the heat insulating property of the heater 30 and the semiconductor under test 10 is provided. It may be improved.

【0020】[0020]

【発明の効果】上記構成により、従来使用していたよう
な恒温槽といった大型の環境試験を使用しなくとも個々
の被試験半導体のセット治具にヒータがそれぞれ備えら
れるので、外部の制御装置と被試験半導体との間に長い
リード線が不要になる。したがって被試験半導体が高周
波数であっても安定した性能試験が行える。
According to the above configuration, the heaters are respectively provided in the set jigs of the individual semiconductor devices to be tested without using a large-scale environmental test such as a thermostatic chamber which has been conventionally used. Long lead wires are not required between the semiconductor device under test and the semiconductor device under test. Therefore, a stable performance test can be performed even when the semiconductor under test has a high frequency.

【0021】また、恒温槽ではなく、被試験半導体に直
接もしくは緩衝材を介してヒータを接続するので、試験
時間が数秒で済み、同時に試験時装置自体の台数を減ら
すなど省力化が実現できる。すなわち試験時間の大幅な
短縮と、省エネルギーが実現できる。
In addition, since a heater is connected to the semiconductor device to be tested directly or via a buffer material instead of a constant temperature bath, the test time is several seconds, and at the same time, the number of devices during the test can be reduced to save labor. That is, it is possible to significantly reduce the test time and save energy.

【0022】また、熱容量の小さいヒータに熱電対等の
センサを付加することで、きめ細かにヒータ温度が監視
できるので、この監視結果に基づき被試験半導体へ出力
される熱伝導エネルギーを調節することで、理想的な温
度特性が得られるものとなっている。
In addition, by adding a sensor such as a thermocouple to a heater having a small heat capacity, the heater temperature can be monitored finely. By adjusting the heat conduction energy output to the semiconductor under test based on the monitoring result, An ideal temperature characteristic is obtained.

【0023】すなわち、小熱容量且つ発熱密度の極めて
大きなヒータを開発することにより、図10の曲線cで
示す理想の特性を得て、例えば100℃といった所定の温
度へ数秒で昇温するものであり、大幅な試験時間の短縮
と製造工程の省エネルギーを達成できるものである。
That is, by developing a heater having a small heat capacity and an extremely large heat generation density, an ideal characteristic shown by a curve c in FIG. 10 is obtained, and the temperature is raised to a predetermined temperature such as 100 ° C. in a few seconds. Thus, it is possible to significantly reduce the test time and save energy in the manufacturing process.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の高温試験装置の斜視図を示すFIG. 1 shows a perspective view of a high temperature test apparatus of the present invention.

【図2】図1の側面断面図を示すFIG. 2 shows a side sectional view of FIG.

【図3】本発明の第2の実施例とする試験装置の斜視図
を示す
FIG. 3 shows a perspective view of a test apparatus according to a second embodiment of the present invention.

【図4】図4の側面断面図を示すFIG. 4 shows a side sectional view of FIG. 4;

【図5】本発明の第3の実施例を示すFIG. 5 shows a third embodiment of the present invention.

【図6】ヒータの正面図と側面図を示すFIG. 6 shows a front view and a side view of the heater.

【図7】被試験半導体の実施例を示すFIG. 7 shows an embodiment of a semiconductor under test.

【図8】被試験半導体の実施例を示すFIG. 8 shows an embodiment of a semiconductor under test.

【図9】被試験半導体の実施例を示すFIG. 9 shows an embodiment of a semiconductor under test.

【図10】ヒータの特性グラフを示すFIG. 10 shows a characteristic graph of a heater.

【図11】従来の試験装置を示すFIG. 11 shows a conventional test apparatus.

【符号の説明】[Explanation of symbols]

図において同一符号は同一、または相当部分を示す。 10 被試験半導体 12 ピン 20 緩衝材 30 ヒータ 32 リード 34 温度センサ 40 ソケット 42 端子 44 導通ピン 50 蓋 60 キャリア 62 固定材 64 パターン 70 バネ In the drawings, the same reference numerals indicate the same or corresponding parts. DESCRIPTION OF SYMBOLS 10 Semiconductor to be tested 12 Pin 20 Buffer material 30 Heater 32 Lead 34 Temperature sensor 40 Socket 42 Terminal 44 Conduction pin 50 Cover 60 Carrier 62 Fixing material 64 Pattern 70 Spring

Claims (11)

【特許請求の範囲】[Claims] 【請求項1】被試験半導体に圧接するヒータを用いた半
導体の高温度試験装置。
An apparatus for testing a semiconductor at a high temperature using a heater which presses against a semiconductor under test.
【請求項2】被試験半導体の熱容量より小さな熱容量の
ヒータを用いた請求項1記載の半導体の高温度試験装
置。
2. The high temperature semiconductor test apparatus according to claim 1, wherein a heater having a heat capacity smaller than the heat capacity of the semiconductor under test is used.
【請求項3】ヒータにセラミックヒータを用いた請求項
1記載の半導体の高温度試験装置。
3. The semiconductor high-temperature test apparatus according to claim 1, wherein a ceramic heater is used as the heater.
【請求項4】窒化珪素を基材としたセラミックヒータを
用いた請求項3記載の半導体の高温度試験装置。
4. The semiconductor high-temperature test apparatus according to claim 3, wherein a ceramic heater based on silicon nitride is used.
【請求項5】圧接する面に熱伝導性緩衝シート材を用い
た請求項1記載の半導体の高温度試験装置。
5. The high temperature test apparatus for a semiconductor according to claim 1, wherein a heat conductive buffer sheet material is used for a surface to be pressed.
【請求項6】被試験半導体のヒータ圧接面と対向する側
に断熱と圧接保持具を当接する請求項1記載の半導体の
高温度試験装置。
6. The semiconductor high-temperature test apparatus according to claim 1, wherein heat insulation and a pressure contact holder are brought into contact with a side of the semiconductor under test facing the heater pressure contact surface.
【請求項7】ソケットにヒータを組み込んだ請求項1記
載の半導体の高温度試験装置。
7. The semiconductor high-temperature test apparatus according to claim 1, wherein a heater is incorporated in the socket.
【請求項8】ヒータの一部に温度センサを取り付けた請
求項1記載の半導体の高温度試験装置。
8. The semiconductor high-temperature test apparatus according to claim 1, wherein a temperature sensor is attached to a part of the heater.
【請求項9】被試験半導体と接する一部に温度センサを
取り付けた請求項1及び5乃至7に記載の半導体の高温
度試験装置。
9. The semiconductor high-temperature test apparatus according to claim 1, wherein a temperature sensor is attached to a part in contact with the semiconductor under test.
【請求項10】ソケットの一部に端子を有し、当該端子
に接続するパターンを有するキャリアと、当該端子から
導出され外部の試験装置への接続部となる導通ピンと、
前記キャリア上に被試験半導体を配置し、前記被試験半
導体にはヒータが圧接し、恒温槽を使用することなく高
温試験を行うことを特徴とする半導体の高温度試験装
置。
10. A carrier having a terminal in a part of a socket and having a pattern connected to the terminal, a conduction pin derived from the terminal and serving as a connection portion to an external test device,
A semiconductor high temperature test apparatus, wherein a semiconductor to be tested is arranged on the carrier, and a heater is pressed against the semiconductor to be tested to perform a high temperature test without using a thermostat.
【請求項11】ソケットの一部に端子を有し、当該端子
に直接接続するピンを有する被試験半導体と、当該端子
から導出され外部の試験装置への接続部となる導通ピン
とを備え、前記被試験半導体にはヒータが圧接し、恒温
槽を使用することなく高温試験を行うことを特徴とする
半導体の高温度試験装置。
11. A semiconductor device comprising: a semiconductor device to be tested having a terminal in a part of a socket and having a pin directly connected to the terminal; and a conduction pin derived from the terminal and serving as a connection portion to an external test apparatus, A high-temperature test apparatus for a semiconductor, characterized in that a heater is pressed against a semiconductor to be tested and a high-temperature test is performed without using a thermostat.
JP17110597A 1997-06-11 1997-06-11 High temperature testing device of semiconductor Pending JPH112655A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17110597A JPH112655A (en) 1997-06-11 1997-06-11 High temperature testing device of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17110597A JPH112655A (en) 1997-06-11 1997-06-11 High temperature testing device of semiconductor

Publications (1)

Publication Number Publication Date
JPH112655A true JPH112655A (en) 1999-01-06

Family

ID=15917077

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17110597A Pending JPH112655A (en) 1997-06-11 1997-06-11 High temperature testing device of semiconductor

Country Status (1)

Country Link
JP (1) JPH112655A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4896814A (en) * 1987-07-28 1990-01-30 Societe Anonyme Dite: Alsthom Method of welding inside a groove machined in a solid steel part, and utilization of the method for repairing a cracked rotor
EP1037062A2 (en) * 1999-03-06 2000-09-20 Pace Micro Technology PLC Apparatus for heating electronic components
US6384377B1 (en) * 1999-07-23 2002-05-07 Sony Corporation Aging socket, aging cassette and aging apparatus
KR100838751B1 (en) 2004-06-07 2008-06-17 가부시키가이샤 어드밴티스트 Method for diagnosing status of burn-in apparatus
JP2013076641A (en) * 2011-09-30 2013-04-25 Mitsubishi Electric Corp Ic socket

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4896814A (en) * 1987-07-28 1990-01-30 Societe Anonyme Dite: Alsthom Method of welding inside a groove machined in a solid steel part, and utilization of the method for repairing a cracked rotor
EP1037062A2 (en) * 1999-03-06 2000-09-20 Pace Micro Technology PLC Apparatus for heating electronic components
EP1037062A3 (en) * 1999-03-06 2004-01-07 Pace Micro Technology PLC Apparatus for heating electronic components
US6384377B1 (en) * 1999-07-23 2002-05-07 Sony Corporation Aging socket, aging cassette and aging apparatus
KR100838751B1 (en) 2004-06-07 2008-06-17 가부시키가이샤 어드밴티스트 Method for diagnosing status of burn-in apparatus
US7839158B2 (en) 2004-06-07 2010-11-23 Advantest Corp. Method of detecting abnormality in burn-in apparatus
JP2013076641A (en) * 2011-09-30 2013-04-25 Mitsubishi Electric Corp Ic socket

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