JPH11238758A - Mounting method for semiconductor element and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make the reflow resistance as well as the moisture resistance satisfactory, even if the size of a semiconductor element to be mounted becomes large-sized. SOLUTION: A paste-like epoxy encapsulating resin 14a is supplied at almost the middle of a semiconductor element mounting surface 10a of an organic resin substrate 10 as a first sealing material, and all the electrodes 18 on the circuit forming surface side of a semiconductor element 16 and bonding pads 12 of the substrate 10 are encapsulated. Then, in-encapsulated regions where solder bumps 20 and the pads 12 are encapsulated by an epoxy encapsulating resin 14b that is a second sealing material.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD OF THE INVENTION

[0002]

2. Description of the Related Art Conventionally, various methods have been proposed for mounting a semiconductor element on a package substrate. As one of them, a circuit formation surface of a semiconductor element and an element mounting surface of a package substrate are arranged to face each other, and an electrode portion provided on the circuit formation surface of the semiconductor element and an element mounting surface of the package substrate are provided. The bonding pad is bonded to the bonding pad by fusion of a bonding material such as solder or gold, or by bonding with a conductive paste such as an Ag paste, and then a sealing material such as a resin is poured between the semiconductor element and the package substrate. By sealing the connection between the electrode part of the semiconductor element and the bonding pad, the circuit and the wiring part of the semiconductor element, or by using an anisotropic conductive film (ACF;
A method of isolating from the external environment and protecting against corrosion and mechanical external force by simultaneously bonding and sealing the electrode part of the semiconductor element and the bonding pad using a conductive adhesive member such as opic conductive film). Are known.

[0003]

However, in the above-mentioned method, the following problems occur when the size of the mounted semiconductor element is increased.

When the sealing material is poured between the semiconductor element and the package substrate, the gap between the semiconductor element and the package substrate is very narrow, so that air is trapped in the sealing material to form a void. Easy to do. If voids are present in the sealing material filled between the semiconductor element and the package substrate, moisture that has entered from outside accumulates in the voids, and the water in the voids evaporates as the temperature rises during reflow processing such as when mounting the substrate. Thus, the internal pressure of the void may increase and crack (crack) may occur in the sealing material (reflow resistance decreases). Furthermore, since the corrosion of the circuit and the wiring progresses due to the water accumulated in the void, there is a problem that the moisture resistance is reduced.

Further, the larger the size of the semiconductor element to be mounted, the greater the stress generated at the time of mounting the substrate due to the moisture absorbed in the sealing material. A load is applied to the joint between the package board and the bonding pad,
There is a problem in that the joint is deformed by stress, or in the worst case, a crack is generated, resulting in malfunction.

Further, when a substrate having a relatively large thermal expansion coefficient as compared with that of a semiconductor element, such as an organic substrate, is used as a package substrate, the package substrate is compared with the semiconductor element due to heating during reflow processing. Large expansion, a load is applied to the joint between the electrode portion of the semiconductor element and the bonding pad of the package substrate, and the joint is deformed by stress, or in the worst case, cracks are caused, resulting in malfunction. There's a problem.

In view of the above, it is an object of the present invention to provide a semiconductor element mounting method and a semiconductor device which have good reflow resistance and good moisture resistance even when the semiconductor element to be mounted is enlarged.

[0008]

According to one aspect of the present invention, there is provided a semiconductor device having a circuit forming surface provided with an electrode portion of a semiconductor element and a semiconductor substrate provided with a bonding pad of a package substrate. On at least one of the element mounting surfaces, a sealing material is provided without covering the electrode portion and the bonding pad, and when the electrode portion and the bonding pad are joined, the semiconductor element and the semiconductor element are sealed by the sealing material. It is a method of mounting a semiconductor element for sealing a space between the semiconductor element and a package substrate.

According to this method, when the electrode portion and the bonding pad are joined to each other, a void is not easily formed in the sealing material. There is no problem such as a decrease or a decrease in moisture resistance. Therefore, a semiconductor device as described in claim 5 in which reliability is ensured for a long time can be obtained.

According to a second aspect of the present invention, in the method of mounting a semiconductor device according to the first aspect, the sealing material seals the entire surface of at least one of the circuit forming surface and the semiconductor element mounting surface. After the material is formed in a layer, a portion of the sealing material covering at least one of the electrode portion and the bonding pad is removed to form a sealing layer.

Further, according to a third aspect of the present invention, in the method of mounting a semiconductor device according to the first aspect, the sealing between the semiconductor element and the package substrate by the sealing material is:
When bonding the electrode portion and the bonding pad, the semiconductor device and the package substrate are sealed so that a limited region including a bonding portion between the electrode portion and the bonding pad is an unsealed region. This is a method using a first sealing material to be stopped and a second sealing material to seal the unsealed region after joining the electrode portion and the bonding pad.

According to the method of the third aspect of the present invention, the fourth aspect of the present invention provides
As the first sealing material, a sealing material having a coefficient of thermal expansion close to the coefficient of thermal expansion of the package substrate is used as the first sealing material,
Since the sealing material can be adjusted such that a sealing material having fluidity that can ensure the filling property in the vicinity of the joint is used as the second sealing material, the reliability as in claim 5 can be extended for a long time. Thus, a semiconductor device secured over a wide range can be obtained.

According to a fourth aspect of the present invention, as in the sixth aspect, a junction between the semiconductor element and the package substrate is provided between the semiconductor element and the package substrate joined to each other. In a region excluding the limited region, a first sealing portion formed of a sealing material having a coefficient of thermal expansion close to the coefficient of thermal expansion of the package substrate is provided. A semiconductor device having a configuration including the second sealing portion formed by the provided sealing material can be easily obtained, and reliability can be ensured for a long time.

[0014]

FIG. 1 is a block diagram showing an embodiment of the present invention.
This will be described with reference to FIGS. In all the drawings, the same or corresponding portions are denoted by the same reference numerals, and redundant description in all embodiments will be omitted.

(First Embodiment) A first embodiment will be described with reference to FIG. As shown in FIG. 1B, the semiconductor element 16 used in the first embodiment has a circuit formation surface 1
A large number (only two are shown in FIG. 1) of electrode portions 18 electrically connected to the circuit are provided around 6a so as to surround the circuit, and each electrode portion 18 is provided with a solder bump 20. ing. The organic resin substrate 10, which is a package substrate on which the semiconductor element 16 is mounted, is mounted on the semiconductor element mounting surface 10a by a circuit (not shown).
1, a large number of bonding pads 12 are connected (only two are shown in FIG. 1). Are mounted so as to face all the electrode portions 18 provided on the circuit forming surface 16a.

As shown in FIG. 1A, the semiconductor element 16 is first mounted on the organic resin substrate 10 at a substantially central position of the semiconductor element mounting surface 10a of the organic resin substrate 10 as a first sealing material. About 75% to 80% by weight of silica
An epoxy-based sealing resin 14a in a paste state is supplied. At this time, the epoxy-based sealing resin 1a is formed so that the epoxy-based sealing resin 14a has a dome shape with a raised center.
Adjusting the viscosity of 4a is preferable because it is difficult to trap air in the sealing material when the semiconductor element 16 is mounted on the organic resin substrate 10, so that the formation of voids can be reliably prevented.

The amount of the epoxy sealing resin 14a is
Solder bump 2 provided on electrode portion 18 of semiconductor element 16
0 and the bonding pads 12 provided on the semiconductor element mounting surface 10a of the organic resin substrate 10 are joined, and the epoxy-based sealing resin 14a on the semiconductor element mounting surface 10a of the organic resin substrate 10 Even if it is pressed by the formation surface 16a and spreads between the semiconductor element 16 and the organic resin substrate 10, the solder bump 20 and the bonding pad 1
The amount does not reach the junction with 2.

The epoxy-based sealing resin 14a, which is the first sealing material, is mixed with a filler such as silica or calcium carbonate so that the coefficient of thermal expansion approaches the coefficient of thermal expansion of the organic resin substrate. In this case, a mixture of about 75 wt% to 80 wt% of silica is used.

The amount of the filler is appropriately adjusted according to the thermal expansion coefficient of the selected resin, the thermal expansion coefficient of the filler, and the thermal expansion coefficient of the substrate on which the semiconductor element is mounted.
For example, an epoxy resin having a thermal expansion coefficient of 30 to 70 × 10 ⁻⁶ / ° C. and a filler having a thermal expansion coefficient of 0.6 × 10 6
^-6 / ° C. is selected, and in the case of an organic resin substrate having a thermal expansion coefficient of 10 to 20 × 10 ^-6 / ° C. as a substrate on which a semiconductor element is to be mounted, the content should be about 65 wt% or more and 90 wt% or less. preferable. If the improvement of the reflow resistance is prioritized, the use of a filler having a larger amount reduces the hygroscopicity of the sealing resin itself. Become.

Next, the entirety of the organic resin substrate 10 is heated to cure the epoxy-based sealing resin 14a on the organic resin substrate 10. This precure removes volatile components of the epoxy-based sealing resin 14a during the bonding between the bonding pad 12 and the solder bump 20, and adds the semiconductor element 16 and the organic resin substrate 10 to the epoxy-based sealing resin 14a.
This is performed in order to give fluidity to such an extent that the space between them can be sealed well. The temperature and time of the precure are appropriately adjusted in consideration of the bonding temperature and the temperature range in which the fluidity of the selected resin is good.

After the completion of the precure, the back surface of the semiconductor element 16 is bonded so that the circuit forming surface 16a of the semiconductor element 16 faces the semiconductor element mounting surface 10a of the organic resin substrate 10, as shown in FIG. The organic resin substrate 10 is conveyed to the mounting position of the organic resin substrate 10 while being sucked and held by the collet 30 adjusted to the temperature.

When the semiconductor element is mounted on the organic resin substrate 10, the collet 30 is provided with the solder bumps 20 provided on all the electrode portions 18 on the circuit forming surface side of the semiconductor element 16, and the corresponding bonding pads 12. The semiconductor element 16 and the organic resin substrate 10 are aligned so as to overlap with each other, and then the semiconductor element 16 is lowered onto the organic resin substrate 10.
Is placed, and the suction holding of the semiconductor element is released.

Since the semiconductor element 16 is heated to the bonding temperature when the semiconductor element 16 is attracted and held by the collet 30, when the semiconductor element 16 is mounted on the organic resin substrate 10, the solder bumps 20 provided on the circuit forming surface side are removed. Organic resin substrate 1
0 and the semiconductor element 16
And the organic resin substrate 10 are electrically connected.

At this time, the epoxy-based sealing resin 14a on the organic resin substrate 10 is
And is spread between the semiconductor element 16 and the organic resin substrate 10 to seal the space between the semiconductor element 16 and the organic resin substrate 10. As described above, the amount of the epoxy-based sealing resin 14a is adjusted so as not to reach the joint between the solder bump 20 and the bonding pad 12 when the semiconductor element 16 and the organic resin substrate 10 are bonded. As shown in FIG. 1C, sealing with an epoxy-based sealing resin 14a, which is a first sealing material, is performed in a state where the joint between the solder bump 20 and the bonding pad 12 is an unsealed area. finish.

Further, about 5% of silica is used as the second sealing material.
An epoxy-based sealing resin 14b mixed with about 0 wt% to 65 wt% to enhance the fluidity is selected, and as shown in FIG. 1D, an unsealed area between the semiconductor element 16 and the organic resin substrate 10 is selected. To complete the mounting of the semiconductor element 16 on the organic resin substrate 10.

Epoxy sealing resin 1 as second sealing material
4b is prepared by mixing a filler (filler) such as silica or calcium carbonate to adjust the viscosity so as not to form a void when the unsealed area is sealed. Viscosity of 16 when mixed at 25 ° C
Use the one adjusted to about 0 Pa · s and use about 8
The unsealed area is sealed at 0 ° C. The amount of the filler is appropriately adjusted depending on the balance between the viscosity of the selected resin and the viscosity of the filler.

In the semiconductor device obtained by such a method, no void is formed in the epoxy resin 14a which is a sealing material between the semiconductor element 16 and the organic resin substrate 10, so that the semiconductor device is mounted on the mounting substrate. There is no generation of cracks in the sealing material due to moisture accumulated in the voids during the reflow treatment. In addition, the semiconductor element 1
Since the difference between the coefficient of thermal expansion of the sealing material formed in the central portion between the substrate 6 and the organic resin substrate 10 and the coefficient of thermal expansion of the organic resin substrate 10 is small, the difference occurs between the connection portions due to temperature changes during actual use. Since stress can be reduced, reliability can be ensured for a long time.

According to the mounting method described above, no matter what size the semiconductor element 16 is mounted, voids are formed in the sealing material between the semiconductor element 16 and the organic resin substrate 10. Therefore, reflow resistance and moisture resistance can be improved.

In the first embodiment described above, the case where the organic resin substrate 10 is used as the substrate on which the semiconductor element is mounted has been described. However, the present invention is not limited to the organic resin substrate 10; The present invention can be applied even when a ceramic substrate of × 10 ⁻⁶ / ° C. is used. When a ceramic substrate is used, an epoxy resin having a thermal expansion coefficient of 30 to 70 × 10 ⁻⁶ / ° C. as a first sealing material and a thermal expansion coefficient of 0.6 × 10 ⁻⁶ / ° C. as a filler are used. It is preferable to select certain silica and adjust the silica to about 75 wt% or more and 90 wt% or less.

In the first embodiment, the solder bumps 2
Although the bonding of the bonding pad 12 to the bonding pad 12 is performed by soldering, the bonding may be performed by an intermetallic compound forming method, bonding with an organic conductive paste, or the like.

(Second Embodiment) A second embodiment will be described with reference to FIG. As shown in FIG. 2A, the semiconductor element 16 used in the second embodiment has a large number (only two are shown in FIG. 2) electrically connected to the circuit on the circuit forming surface 16a. Electrode portions 18 are provided around the circuit, and each electrode portion 18 is provided with a solder bump 20.

Further, the circuit forming surface 16 of the semiconductor element 16
On a, a sealing layer 15 made of an epoxy-based sealing resin containing about 75 to 80 wt% of silica which has been semi-cured and formed into a layer as a sealing material is formed. The sealing layer 15 is formed by an existing layer forming method such as a spin coating method,
Solder bump 2 provided on electrode portion 18 of semiconductor element 16
0 and the height of the region between the semiconductor element 16 and the organic resin substrate 10 when the bonding pad 12 provided on the semiconductor element mounting surface 10a of the organic resin substrate 10 is joined, and the solder bump 20 Is formed to have a thickness smaller than the thickness of. The composition of the epoxy-based sealing resin is the same as the composition of the epoxy resin used as the first sealing material in the first embodiment.

In mounting the semiconductor element 16 on the organic resin substrate 10, first, the semiconductor element 16 is heated and the epoxy-based sealing resin 14 on the semiconductor element 16 is cured. This precure is performed to remove volatile components of the epoxy-based sealing resin during bonding between the bonding pad 12 and the solder bump 20. The temperature and time of the precure are appropriately adjusted.

After the completion of the precure, the back surface of the semiconductor element 16 is bonded so that the circuit forming surface 16a of the semiconductor element 16 faces the semiconductor element mounting surface 10a of the organic resin substrate 10, as shown in FIG. The organic resin substrate 10 is conveyed to the mounting position of the organic resin substrate 10 while being sucked and held by the collet 30 adjusted to the temperature.

When the semiconductor element is mounted on the organic resin substrate 10, the collet 30 is formed by bonding the solder bumps 20 provided on all the electrode portions 18 provided on the circuit forming surface of the semiconductor element 16 to the corresponding bonding bumps. The semiconductor element 16 and the organic resin substrate 10 are positioned so as to overlap with the pad 12, and then the semiconductor element 16 is placed on the organic resin substrate 10 by being lowered, and the suction holding of the semiconductor element is released.

Since the semiconductor element 16 is heated to the bonding temperature when the semiconductor element 16 is attracted and held by the collet 30, when the semiconductor element 16 is mounted on the organic resin substrate 10, the solder bumps 20 provided on the circuit forming surface side are removed. Organic resin substrate 1
0 and the semiconductor element 16
And the organic resin substrate 10 are electrically connected.

At this time, since the epoxy-based sealing resin on the semiconductor element 16 is in a semi-cured state, the epoxy-based encapsulating resin is also in close contact with the semiconductor element mounting surface of the organic resin substrate 10 and the gap between the semiconductor element 16 and the organic resin substrate 10 Region is sealed. Thereafter, in order to fix the sealing, post-curing is performed immediately after the solder bump 20 and the bonding pad 12 are joined, and the epoxy-based sealing resin is completely cured as shown in FIG. The mounting of the semiconductor element 16 on the organic resin substrate 10 is completed.

In the second embodiment, the semiconductor device 1
6, the sealing layer 15 is formed on the circuit forming surface 16a.
Of course, the semiconductor element mounting surface 10a of the organic resin substrate 10
Alternatively, a method of forming the sealing layer 15 may be used. In addition, although an epoxy resin which is a thermosetting resin is used as a sealing material, the present invention is not limited to the epoxy resin, and other thermosetting resins such as a silicone resin and a thermoplastic resin such as a polyamideimide resin may be used. It can also be used.

In the second embodiment, the sealing layer 15 is formed by providing solder bumps 20 on the electrode portions 18 of the semiconductor element in advance and then uniformly applying a sealing material by spin coating or the like. However, as shown in FIG. 3, before the solder bumps 20 are provided on the electrode portions 18, a sealing material is uniformly applied by a spin coating method or the like, heated, and then photolithographically illustrated in FIG. As shown in (2), the coating layer 15 in a region covering the electrode portion 18 is removed to expose the electrode portion 18. At this time, if the sealing material used is photosensitive, the sealing material serves as a resist. If the sealing material is non-photosensitive, the resist is used to expose the electrode portion 18 by photolithography. Can be performed.

When the sealing material is a thermosetting resin such as an epoxy resin or a silicone resin, the heating after applying the sealing material uniformly before providing the solder bumps 20 on the electrode portions 18 is performed by using the bumps. This is performed to provide resistance to the chemical solution during formation and to remove volatile components near the bonding temperature. In the case where the sealing material is a thermoplastic resin such as a polyimide amide-based resin, heating after uniformly applying the sealing material before providing the solder bumps 20 on the electrode portions 18 is performed only after the bonding temperature. To remove the electrode part 1 if necessary.
Post-curing is performed after removing the coating layer 15 in a region covering the portion 8.

Further, as shown in FIG. 3B, a bump electrode 20 is formed on the exposed electrode portion 18 by using an electrolytic method or an electroless method, and the solder bump 2 is formed on the circuit forming surface 16a.
The semiconductor element 16 provided with the sealing layer 15 having a thickness smaller than 0 is obtained.

The mounting of the semiconductor element 16 on the organic resin substrate 10 is the same as in the second embodiment, and a description thereof will be omitted.

The first embodiment described above and the second embodiment
In the embodiment, one semiconductor element is mounted on one package substrate, and one semiconductor element having substantially the same size as the semiconductor element is mounted.
The case where the present invention is applied to a CSP (Chip Size Pckage) housed in one package has been described, but an MCM (Multi Chip Module) in which a number of semiconductor elements are mounted on one package substrate and housed in one package has The present invention is applicable.

In the first to third embodiments described above, the electrode portions and the bonding pads are joined by solder bumps, but not limited to solder bumps, but other types of bumps such as Au bumps or Ni bumps may be used. You can also.

Further, in the first and second embodiments, the electrode portions 18 provided on the upper surface side of the semiconductor element will be described with a configuration in which the periphery of the circuit forming surface is arranged in a line. However, the present invention is not limited to a semiconductor device having such a configuration, and can be applied to, for example, a semiconductor device having an area bump structure.

[0046]

As described above, according to the present invention,
Even if the size of the semiconductor element to be mounted is increased, an effect of being able to provide a semiconductor element mounting method and a semiconductor device having good reflow resistance and good moisture resistance can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic explanatory view showing a flow of a method for mounting a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a schematic explanatory view showing a flow of a method of mounting a semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a schematic explanatory view simply showing a method of forming a sealing layer on a semiconductor element in a second embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Organic resin board 10a Semiconductor element mounting surface 11 External terminal 12 Bonding pad 14a, 14b Epoxy sealing resin 16 Semiconductor element 16a Circuit formation surface 18 Electrode part 20 Solder bump 30 Collet

Claims (6)

[Claims] At least one of a circuit forming surface provided with an electrode portion of a semiconductor element and a semiconductor device mounting surface provided with a bonding pad of a package substrate is sealed without covering the electrode portion and the bonding pad. A method for mounting a semiconductor element, comprising: providing a stopper, and sealing the semiconductor element and the package substrate with the sealing material when joining the electrode portion and the bonding pad. 2. The method according to claim 1, wherein the encapsulant forms a layered encapsulant on at least one of the circuit forming surface and the semiconductor element mounting surface, and then forms at least one of the electrode portion and the bonding pad. 2. The method according to claim 1, wherein the semiconductor device is formed by a sealing layer formed by removing a sealing material in a portion covering the semiconductor element. 3. The sealing between the semiconductor element and the package substrate by the sealing material, wherein the bonding between the electrode portion and the bonding pad is performed when the electrode portion is bonded to the bonding pad. A first sealing material for sealing between the semiconductor element and the package substrate such that the limited region including 2. The method according to claim 1, wherein the sealing is performed using a second sealing material that seals the sealing region. 3. 4. A sealing material having a coefficient of thermal expansion close to the coefficient of thermal expansion of the package substrate is used as the first sealing material, and a filling property near the joint is used as the second sealing material. The method for mounting a semiconductor device according to claim 3, wherein a sealing material having fluidity capable of ensuring the temperature is used. 5. A semiconductor device manufactured by using the method according to claim 1. 6. A thermal expansion close to a thermal expansion coefficient of the package substrate in a region between the semiconductor device and the package substrate bonded to each other, excluding a limited region including a junction between the semiconductor device and the package substrate. A semiconductor having a first sealing portion formed of a sealing material having a ratio, and a second sealing portion formed of a flowable sealing material capable of ensuring filling properties in the limited region. apparatus.