JPH11204732A - Semiconductor protecting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor protecting device in which a withstand pressure of a corner part can be improved, and destruction can be prevented by preventing current concentration of the corner part. SOLUTION: This device is provided with a second conductive diffused layer 11 in a rectangular pattern provided on a first conductive semiconductor substrate main surface(not shown); first conductive diffused layer 10 provided on the first conductive semiconductor substrate main surface, so as to be made adjacent at least to the second conductive diffused layer 11; and an insulating film(not shown) formed so as to be partially overlapped on the surrounding of the second conductive diffused layer 11 and on the first conductive semiconductor substrate main surface, while an opening 12 is formed on the second conductive diffused layer 11. The overlap of the insulating film is made larger than the other surrounding overlap at the corner part in the rectangular pattern of the second conductive diffused layer 11.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a protection device for a semiconductor integrated circuit.

[0002]

2. Description of the Related Art As a conventional protection circuit for an input terminal, an input signal line 1 and a power supply 2 or a signal line 1 and a GND 3
A circuit in which are connected by a diode, or both, is widely used. FIG. 4 shows this conventional technique. FIG. 4A shows a basic type of the protection circuit, including a diode D1 connected to the power supply 2, a diode D2 connected to GND3, a diode D3 connected between GND3 and Logic, and a diode D2. It consists of a current limiting resistor R provided between D3. It should be noted that the diode D1 or the like may not be mounted depending on the application or condition.

FIG. 4B shows a case where a positive potential surge is applied to the input signal line 1. In this case, when the potential rises above the power supply potential, a current flows in the forward direction of the diode D1, and an attempt is made to suppress the potential rise of the input signal line 1. The potential further rises, and the diode D2
When the breakdown voltage exceeds, the diode D2 breaks down,
Reverse current flows. In a protection circuit without the diode D1, a reverse current flows through the diode D2 when the breakdown voltage is exceeded.

FIG. 4C shows a case where a negative potential surge is applied to the input signal line 1. In this case, when the potential drops below the GND potential, the diode D2
Current flows in the forward direction, and attempts to suppress the potential drop of the input signal line 1. The potential further drops, and the diode D
When the breakdown voltage exceeds 1, the diode D1 breaks down and a reverse current flows. In the protection circuit without the diode D1, only the forward current of the diode D2 flows. A voltage obtained by subtracting the potential difference due to the resistance from the cathode side potential of the diode D2 is applied to each of the diodes D3, and an operation of releasing the charge of the surge generation source is performed.

[0005] In many cases, the diode structure has P-type and N-type diffusion layers. 5 and 6 show a plan view and a sectional view of a simple conventional protection diode. FIG. 5A shows a plan view of the protection circuit, and FIG.
Shows a cross-sectional view taken along line AA '. FIG. 5 shows a case where a forward potential is applied to the PN junction, and FIG. 6 shows a case where a reverse potential is applied. FIG. 6A is a plan view of the protection circuit, and FIG. 6B is a cross-sectional view taken along line BB ′. The arrows shown in the drawings indicate the direction of the current.
Here we show the spread of basic integrated circuits,
The element isolation region and the like are omitted. The case where an N-type substrate is used as a semiconductor substrate (not shown) for forming a diffusion layer is shown. Although not shown here, the junction-separated type I
When C is used, a parasitic diode between the semiconductor substrate (Si layer) and the element formation region may be used for protection.

An anode P diffusion region 5 and a cathode N diffusion region 4 are provided on a semiconductor substrate (not shown).
Electrodes 7 are connected to the respective surfaces via insulating films 8 on which contacts 6 are aligned. In the case of the forward direction shown in FIG. 5, a current flows from the anode P region diffusion 5 to the cathode N diffusion region 4. In the case of the reverse direction shown in FIG. 6, the depletion layer 9 extends on both sides of the PN junction interface. When the breakdown voltage exceeds the breakdown voltage supported by the depletion layer 9, a Zener breakdown or an avalanche breakdown occurs, and a current flows from the cathode to the anode. If a large current flows in the avalanche breakdown state, the junction may be broken, and this point is the limit point of the protection diode.

What is problematic is the breakdown strength at the time of breakdown. Since a protection diode of a general IC is formed by diffusion, it is usually difficult to constitute an ideal planar junction. FIG. 7 shows the breakdown voltage characteristics when the junction depth of diffusion becomes shallower with the miniaturization of ICs. FIG. 8 shows the breakdown voltage characteristics of the cylindrical joint at the diffusion end and the spherical joint at the corner. The solid line in the drawing indicates a cylindrical joint, and the dotted line indicates a spherical joint. In these figures, the corner portion has the lowest breakdown voltage, and when the reverse bias voltage during diffusion increases, current starts to flow from the corner portion. If this portion exceeds the current capacity, there is a problem that breakdown may occur at a relatively low level voltage before current starts to flow in the linear portion.

FIG. 11 shows an example of a conventional protection diode. FIG. 11A is the same as that described with reference to FIGS. 5 and 6, and a description thereof will be omitted. FIG. 11B
(C) is an example of a protection diode in which the periphery of the P diffusion layer 5 is surrounded by the N diffusion layer 4. Both the P diffusion layer 5 and the N diffusion layer 4 are covered with an insulating film (not shown), and a contact 6 is provided at a predetermined position. FIG. 11 (c)
In the figure, the pattern of the contact 6 is rectangular.

[0009] Generally, from the ease of writing the pattern,
In many cases, the inclusion relationship between the diffusion and the contact is set to be the same for both the straight portion and the corner portion. Therefore, as described above, the withstand voltage at the corner portion is lower than that at the straight portion,
In some cases, current concentration occurred at corners, leading to destruction.

[0010]

As described above, in the prior art, the corner portion has the lowest breakdown voltage, and when the reverse bias voltage between diffusions increases, current starts to flow from the corner portion. If this portion exceeds the current capacity, there is a problem that breakdown may occur at a relatively low level voltage before current starts to flow in the linear portion.
According to the present invention, it is an object of the present invention to provide a semiconductor protection device that improves the withstand voltage of a corner portion and prevents destruction by preventing current concentration at the corner portion.

[0011]

According to the present invention, there is provided a second conductive type diffusion layer having a rectangular pattern provided on a first conductive type semiconductor substrate main surface, and a second conductive type diffusion layer provided on the first conductive type semiconductor substrate main surface. A first conductivity type diffusion layer provided at least in proximity to the second conductivity type diffusion layer; and an opening on the second conductivity type diffusion layer, on the periphery on the second conductivity type diffusion layer and An insulating film formed so as to partially overlap the first-conductivity-type semiconductor substrate main surface, and in the corner portion of the rectangular pattern of the second-conductivity-type diffusion layer, the overlap of the insulating film with other surroundings A semiconductor protection device characterized by being larger than the overlap of The present invention also provides a second conductive type diffusion layer having a rectangular pattern provided on the first conductive type semiconductor substrate main surface, and a second conductive type diffusion layer provided on the first conductive type semiconductor substrate main surface. A first conductivity type diffusion layer provided in close proximity to the diffusion layer, and an opening on the second conductivity type diffusion layer, on the periphery of the first conductivity type diffusion layer and on the first conductivity type semiconductor substrate. An insulating film formed so as to partially overlap the main surface, wherein in the short side direction of the rectangular pattern of the second conductive type diffusion layer, the insulating film overlaps in the short side direction more than in the long side direction. A semiconductor protection device is provided.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a semiconductor protection device according to a first embodiment of the present invention. In the first embodiment, a P-type diffusion layer 11 and an N-type diffusion layer 10 are provided on a main surface of an N-type semiconductor substrate (not shown).
The P-type diffusion layer 11 is surrounded by an N-type diffusion layer. The P-type diffusion layer 11 and the N-type diffusion layer 10 are covered with an insulating film (not shown), and a contact 12 is provided at a predetermined position. These contacts 1
2, wiring is routed. The shape of the contact is substantially the same as the pattern of the diffusion layer except for a portion corresponding to a corner of the diffusion layer. According to the first embodiment, the contact 12 at the corner portion and the P-type diffusion layer 11
The distance to the diffusion pattern is increased. In other words, due to the insulating film formed so as to partially overlap the periphery of the P-type diffusion layer 11, the overlap of the insulating film is larger at the corners of the rectangular pattern of the P-type diffusion layer than at the other periphery. ing. In FIG. 1, four corners of the contact 12 are cut out at 45 degrees to increase the distance from the diffusion pattern. As a result, the resistance value (parasitic resistance) due to diffusion between the contact and the diffusion corner rather than the straight line portion
Becomes larger. This situation is shown in FIG. As a result, the voltage is divided by the applied voltage at the corner portion and becomes lower than that at the straight portion. More specifically, the voltage borne by the parasitic resistance at the corner portion produces only a small potential difference due to the leak current until the diode breaks down.
However, when a breakdown occurs at a corner portion, the current starts to increase accordingly, so that the burden voltage rapidly increases. As a result, the parasitic resistance functions as a current limiting resistance for the junction at the corner portion, preventing the current from being extremely increased and the PN junction from being destroyed. The main part of the breakdown current bears much on the straight portion having a small parasitic resistance, and since the straight portion has a larger junction area than the corner portion, the effect of increasing the reverse current capacity of the entire diode can be obtained.

FIG. 2 shows a semiconductor protection device according to a second embodiment of the present invention. This is an embodiment where the pattern of the diffusion layer forming the PN junction is rectangular. Here, a P-type diffusion layer 11 and an N-type diffusion layer 10 are provided on an N-type semiconductor substrate main surface (not shown). The P-type diffusion layer 11 is surrounded by an N-type diffusion layer. The P-type diffusion layer 11 and the N-type diffusion layer 10 are covered with an insulating film (not shown), and a contact 12 is provided at a predetermined position. Wiring is routed from these contacts 12. In the case of the second embodiment, the distance between the contact on the shorter side of the rectangle and the diffusion pattern is longer than that of the longer side. This state is shown in FIG. As a result, the parasitic resistance up to the junction of the short side and the corner portion can be made larger than the parasitic resistance up to the junction of the long side. The main current at the time of breakdown flowing through the diode is shared by the long-side junction, so that the diffusion region having a relatively low withstand voltage at the corner can be prevented from being broken.

FIG. 3 shows a semiconductor protection device according to a third embodiment of the present invention. FIG. 3A is a plan view of the protection circuit, and FIG. 3B is a cross-sectional view taken along line CC ′. This is a case where a multilayer structure is used for the electrode wiring. Here, a P-type diffusion layer 11 and an N-type diffusion layer 10 are provided on an N-type semiconductor substrate main surface (not shown). P-type diffusion layer 11 is surrounded by N-type diffusion layer 10.
The P-type diffusion layer 11 and the N-type diffusion layer 10 are covered with an insulating film 16, and contact
Is provided. The first-layer wiring 15 is routed from these contacts 12. Further, the first layer wiring 15 is covered with an insulating film 17, and the second layer wiring 14 is provided thereon. At a predetermined position of the insulating film, a second-layer wiring contact 13 is opened, and a first-layer wiring 15 and a second-layer wiring 14 are connected. In this case, the second-layer inter-wiring contact 13 is provided at the center, and the diffusion and wiring contact 12 are provided on both sides thereof. Therefore, as shown in FIG. Therefore, local current concentration can be prevented.

Also in the third embodiment, although not shown, if the pattern of the diffusion layer is a rectangular pattern, the distance between the contact 12 at the corner and the diffusion pattern of the P-type diffusion layer 11 is increased, or If the pattern of the layer is rectangular, the distance between the contact on the short side of the rectangle and the diffusion pattern is made longer than that of the long side, so that the first
The same effects as those of the second embodiment can be obtained.

In the embodiment according to the present invention, the semiconductor substrate (not shown) has been described as N-type. However, the present invention is applicable to a case where the semiconductor substrate (not shown) is P-type and the conductivity type of each diffusion layer is reversed. Can be.

Further, if attention is paid to the concentration of current, it is possible to use the same wiring structure as in the third embodiment for an input circuit for surge protection as shown in FIGS. it can. FIG. 9A shows a plan view of the input circuit,
FIG. 9B is a sectional view taken along line DD ′. FIG.
10A is a plan view of the input circuit, and FIG.
FIG. A diffusion layer 11 is provided on the main surface of the semiconductor substrate (not shown), and wiring is provided on this layer via an insulating film. The insulating film is provided with a contact, and FIG. 9 shows a case where the contact is divided into a plurality. Next, FIG. 10 shows a case in which a two-layer wiring is used. Since the current path can be made uniform in the diffusion layer, local current concentration can be prevented.

[0018]

According to the present invention, a protective device having a high breakdown strength can be obtained by devising the shape of a pattern in a protective device used for a semiconductor integrated circuit.

[Brief description of the drawings]

FIG. 1 is a plan view and a detailed view of a protection circuit according to a first embodiment of the present invention.

FIG. 2 is a plan view and a detailed view of a protection circuit according to a second embodiment of the present invention.

FIG. 3 is a plan view and a cross-sectional view of a protection circuit according to a third embodiment of the present invention.

FIG. 4 is a protection circuit diagram used for a semiconductor integrated circuit.

FIG. 5 is an operation diagram of the protection circuit when a forward voltage is applied.

FIG. 6 is an operation diagram of a protection circuit when a reverse voltage is applied.

FIG. 7 is a relationship diagram between a PN junction depth and a junction breakdown voltage.

FIG. 8 is a relationship diagram of a withstand voltage depending on a joint shape.

FIG. 9 is a plan view and a sectional view of an input circuit for the purpose of surge protection.

FIG. 10 is a plan view and a cross-sectional view of an input circuit using a two-layer wiring for the purpose of surge protection.

FIG. 11 is a plan view of a conventional protection circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... N-type diffusion layer 11 ... P-type diffusion layer 12 ... Contact 13 ... Contact between 2 wiring layers 14 ... 2nd wiring 15 ... 1st wiring 16, 17 ... Insulating film

Claims (2)

[Claims] A second conductive type diffusion layer having a rectangular pattern provided on the first conductive type semiconductor substrate main surface; and a second conductive type diffusion layer provided on the first conductive type semiconductor substrate main surface. A first conductive type diffusion layer provided in close proximity to the first conductive type diffusion layer; an opening on the second conductive type diffusion layer; An insulating film formed so as to partially overlap the surface, wherein at the corners of the rectangular pattern of the second conductivity type diffusion layer, the overlap of the insulating film is larger than the overlap of the other surroundings. Semiconductor protection device. A second conductive type diffusion layer having a rectangular pattern provided on the first conductive type semiconductor substrate main surface; and a second conductive type diffusion layer provided on the first conductive type semiconductor substrate main surface. A first conductive type diffusion layer provided in close proximity to the first conductive type diffusion layer; an opening on the second conductive type diffusion layer; An insulating film formed so as to partially overlap the surface, wherein in the short-side direction of the rectangular pattern of the second conductivity type diffusion layer, the overlapping of the insulating film is greater than in the long-side direction. A semiconductor protection device characterized by the above-mentioned.