JPH0883869A - Semiconductor - Google Patents
SemiconductorInfo
- Publication number
- JPH0883869A JPH0883869A JP6242235A JP24223594A JPH0883869A JP H0883869 A JPH0883869 A JP H0883869A JP 6242235 A JP6242235 A JP 6242235A JP 24223594 A JP24223594 A JP 24223594A JP H0883869 A JPH0883869 A JP H0883869A
- Authority
- JP
- Japan
- Prior art keywords
- sealing resin
- semiconductor element
- hardness
- semiconductor device
- nozzle
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 109
- 229920005989 resin Polymers 0.000 claims abstract description 129
- 239000011347 resin Substances 0.000 claims abstract description 129
- 238000007789 sealing Methods 0.000 claims abstract description 118
- 230000003287 optical effect Effects 0.000 claims abstract description 49
- 238000004519 manufacturing process Methods 0.000 claims abstract description 18
- 239000010408 film Substances 0.000 claims description 15
- 230000001681 protective effect Effects 0.000 claims description 13
- 239000004020 conductor Substances 0.000 claims description 8
- 239000010409 thin film Substances 0.000 claims description 2
- 239000000428 dust Substances 0.000 abstract description 8
- 238000004382 potting Methods 0.000 description 18
- 238000000034 method Methods 0.000 description 6
- 239000004593 Epoxy Substances 0.000 description 5
- 239000011521 glass Substances 0.000 description 5
- 238000000576 coating method Methods 0.000 description 4
- 230000009974 thixotropic effect Effects 0.000 description 4
- 239000002390 adhesive tape Substances 0.000 description 3
- 239000007767 bonding agent Substances 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 229910006404 SnO 2 Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000004132 cross linking Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000004880 explosion Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/56—Materials, e.g. epoxy or silicone resin
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Led Device Packages (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、基台上に実装した半導
体素子を封止樹脂にてポッティング封止して成る半導体
装置およびその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device formed by potting and sealing a semiconductor element mounted on a base with a sealing resin, and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】ＣＣＤエリアセンサーやＣＣＤリニアセ
ンサー、発光ダイオード、レーザダイオード、ＥＰＲＯ
Ｍ等の光学的な特性を必要とする半導体装置では、半導
体素子の光学素子面上方に光路を確保するためセラミッ
クスやガラスエポキシ材を用いた中空パッケージによる
封止が使用されている。また、近年では生産性向上等の
観点からざぐり基板のざぐり部内に半導体素子を実装し
シールガラスで封止したり、基台上に実装した半導体素
子を透光性を備えた封止樹脂にてポッティング封止する
半導体装置も考えられている。2. Description of the Related Art CCD area sensor, CCD linear sensor, light emitting diode, laser diode, EPRO
In a semiconductor device that requires optical characteristics such as M, a hollow package using ceramics or a glass epoxy material is used to secure an optical path above the optical element surface of a semiconductor element. In recent years, from the viewpoint of improving productivity, etc., semiconductor elements are mounted in the counterbore part of the counterbore board and sealed with seal glass, or the semiconductor elements mounted on the base are sealed with a translucent sealing resin. A semiconductor device that is potted and sealed is also considered.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、封止樹
脂にてポッティング封止する半導体装置では、封止樹脂
の硬化後の硬度をある程度確保するためにチクソトロピ
ック性を付与したり架橋密度を大きくした流動性の悪い
樹脂を用いるとポッティングの際にボンディングワイヤ
ーと半導体素子との間やボンディングワイヤーと基台と
の間、半導体素子と基台との間に気泡が生じてしまう。However, in a semiconductor device which is potted and sealed with a sealing resin, thixotropic properties are imparted or the crosslink density is increased in order to secure a certain degree of hardness after curing of the sealing resin. When a resin having poor fluidity is used, bubbles are generated during potting between the bonding wire and the semiconductor element, between the bonding wire and the base, and between the semiconductor element and the base.
【０００４】気泡の発生原因としては、樹脂をポッテ
ィングする際の空気の巻き込み、樹脂中の脱泡不足
（チクソトロピック性を付与したものは真空脱泡しても
気泡が抜けにくい）、ダイボンドペースト剤からの発
生（エポキシ系ペースト剤に含まれる空気や水分がポッ
ティング樹脂に閉じ込められるため）、半導体素子と
基台との隙間にある空気からの発生、ボンディングワ
イヤーと基台およびボンディングワイヤーと半導体素子
との隙間にある空気からの発生などが考えられる。これ
らの発生原因により気泡がボンディングワイヤーと半導
体素子との間やボンディングワイヤーと基台との間に引
っ掛かることになる。The causes of air bubbles are entrainment of air during potting of resin, insufficient defoaming in the resin (for those having thixotropic properties, it is difficult for the air bubbles to escape even if defoamed in vacuum), die bond paste agent. From the air (because the air and water contained in the epoxy paste agent are confined in the potting resin), from the air in the gap between the semiconductor element and the base, the bonding wire and the base, and the bonding wire and the semiconductor element It is conceivable that it is generated from the air in the gap. Due to these causes, air bubbles are caught between the bonding wire and the semiconductor element and between the bonding wire and the base.
【０００５】反対に、この気泡を発生させないよう流動
性の良い樹脂を用いると、硬化後に所定の硬度を確保で
きないため表面に付着したごみを除去する際にそのごみ
が入り込んでしまったり、表面に傷が付いてしまうとい
う不都合が生じる。このような気泡やごみの付着、傷付
きが生じると、光の乱反射によるフレア等が発生し、光
学的な劣化を起こす原因となる。また、はんだ付け等の
温度ショックで気泡中の空気が膨張し、そのストレスで
ボンディングワイヤーのネック切れが発生するという問
題もある。On the other hand, if a resin having a high fluidity is used so as not to generate bubbles, a predetermined hardness cannot be ensured after curing, so that the dust that has adhered to the surface may get into the surface or the dust may get into the surface. The inconvenience of being scratched occurs. When such bubbles and dust are attached or scratched, flare due to diffused reflection of light occurs, which causes optical deterioration. There is also a problem that the air in the bubbles expands due to a temperature shock such as soldering, and the stress causes the neck breakage of the bonding wire.
【０００６】よって、本発明は封止樹脂に気泡が発生せ
ずしかもごみの付着、傷付きが発生しない半導体装置お
よびその製造方法を提供することを目的とする。Therefore, it is an object of the present invention to provide a semiconductor device in which no bubbles are generated in the sealing resin and dust is not attached or scratched, and a method for manufacturing the same.
【０００７】[0007]
【課題を解決するための手段】本発明は、上記の目的を
達成するために成された半導体装置およびその製造方法
である。すなわち、本発明における半導体装置は、上面
に光学素子面を備えた半導体素子と、半導体素子を実装
するための基台と、光学素子面を除く半導体素子と基台
に設けられた導体部分とを電気的に配線するボンディン
グワイヤーと、半導体素子およびボンディングワイヤー
を覆う封止樹脂とを備えているものであり、この封止樹
脂を、一の硬度から成り少なくとも光学素子面の上方に
設けられる第１封止樹脂と、一の硬度よりも低い他の硬
度から成り第１封止樹脂以外の部分に設けられる第２封
止樹脂とから構成するものである。SUMMARY OF THE INVENTION The present invention is a semiconductor device and a method of manufacturing the same which are made to achieve the above object. That is, the semiconductor device in the present invention comprises a semiconductor element having an optical element surface on the upper surface, a base for mounting the semiconductor element, a semiconductor element excluding the optical element surface and a conductor portion provided on the base. A bonding wire for electrically wiring and a sealing resin for covering the semiconductor element and the bonding wire are provided. The sealing resin has a first hardness and is provided at least above the optical element surface. It is composed of a sealing resin and a second sealing resin which is made of another hardness lower than one hardness and which is provided in a portion other than the first sealing resin.
【０００８】また、基台上の半導体素子およびボンディ
ングワイヤーを一の硬度から成る封止樹脂にて封止し、
さらに光学素子面に対応する封止樹脂の少なくとも外表
面に一の硬度よりも高い他の硬度から成る保護膜を設け
る半導体装置でもある。Further, the semiconductor element and the bonding wire on the base are sealed with a sealing resin having one hardness,
Furthermore, it is also a semiconductor device in which at least an outer surface of the sealing resin corresponding to the optical element surface is provided with a protective film having another hardness higher than one hardness.
【０００９】また、本発明における半導体装置の製造方
法は、先ず、上面に光学素子面を備えた半導体素子を基
台上に実装し、次いで、光学素子面を除く半導体素子と
基台に設けられた導体部分とをボンディングワイヤーで
電気的に配線する。次に、光学素子面の上方に配置した
一のノズルから一の硬度の第１封止樹脂を滴下すると同
時に、一のノズルに隣接して配置した他のノズルから一
の硬度よりも低い他の硬度の第２封止樹脂を滴下して半
導体装置を製造する方法である。In the method of manufacturing a semiconductor device according to the present invention, first, a semiconductor element having an optical element surface on the upper surface is mounted on a base, and then the semiconductor element excluding the optical element surface is provided on the base. The conductor portion is electrically connected with a bonding wire. Next, the first sealing resin having a hardness of 1 is dropped from one nozzle arranged above the optical element surface, and at the same time, another nozzle having a hardness lower than that of another nozzle is arranged adjacent to the nozzle. This is a method of manufacturing a semiconductor device by dropping a second sealing resin having a hardness.
【００１０】[0010]
【作用】本発明の半導体装置では、半導体素子およびボ
ンディングワイヤーを封止する封止樹脂が、一の硬度で
少なくとも光学素子面の上方を封止する第１封止樹脂
と、一の硬度よりも低い他の硬度で第１封止樹脂以外の
部分に設けられる第２封止樹脂とから構成されている。
つまり、一の硬度による第１封止樹脂によって光学的特
性に影響を及ぼす部分の保護を行うとともに、他の硬度
の第２封止樹脂によってポッティングの際の高流動性を
生かし気泡発生を抑制することができるようになる。In the semiconductor device of the present invention, the encapsulating resin for encapsulating the semiconductor element and the bonding wire is higher than the first encapsulating resin for encapsulating at least the upper side of the optical element surface with one hardness It is composed of a second sealing resin provided on a portion other than the first sealing resin with a low hardness.
In other words, the first sealing resin having one hardness protects the portion that affects the optical characteristics, and the second sealing resin having another hardness makes use of high fluidity at the time of potting and suppresses bubble generation. Will be able to.
【００１１】また、半導体素子およびボンディングワイ
ヤーを一の硬度から成る封止樹脂にて封止し、光学素子
面に対応する封止樹脂の少なくとも外表面に一の硬度よ
りも高い他の硬度の保護膜を設ける半導体装置の場合に
は、封止樹脂の高流動性を生かして気泡発生を抑制し、
保護膜の硬度によって光学的特性に影響を及ぼす部分の
保護を行うことができる。Further, the semiconductor element and the bonding wire are sealed with a sealing resin having one hardness, and at least the outer surface of the sealing resin corresponding to the optical element surface is protected with another hardness higher than one hardness. In the case of a semiconductor device provided with a film, the high fluidity of the sealing resin is used to suppress bubble generation,
Depending on the hardness of the protective film, it is possible to protect the part that affects the optical characteristics.
【００１２】また、本発明の半導体装置の製造方法で
は、光学素子面の上方に配置した一のノズルから第１封
止樹脂を滴下すると同時に、一のノズルと隣接して配置
した他のノズルから第２封止樹脂を滴下することで、光
学素子面の上方を第１封止樹脂にて封止でき、同時にそ
れ以外の部分すなわち光学素子面以外の半導体素子およ
びボンディングワイヤーを第２封止樹脂にて封止できる
ようになる。Further, in the method for manufacturing a semiconductor device of the present invention, the first sealing resin is dropped from one nozzle arranged above the optical element surface, and at the same time, the first sealing resin is dropped from another nozzle arranged adjacent to the one nozzle. By dropping the second sealing resin, the upper side of the optical element surface can be sealed with the first sealing resin, and at the same time, the other portion, that is, the semiconductor element and the bonding wire other than the optical element surface can be sealed with the second sealing resin. Can be sealed in.
【００１３】[0013]
【実施例】以下に本発明の半導体装置およびその製造方
法における実施例を図に基づいて説明する。図１は、本
発明の半導体装置における第１実施例を説明する断面図
である。第１実施例における半導体装置１は、上面に光
学素子部１１を備えた半導体素子１０と、この半導体素
子１０をダイボンド剤１２を介して実装するための基台
２と、光学素子部１１を除く半導体素子１０と基台２に
設けられた導体部分２１とを電気的に配線するボンディ
ングワイヤー３とを備えるとともに、半導体素子１０お
よびボンディングワイヤー３を封止する封止樹脂４とし
て少なくとも光学素子部１１の上方を封止する一の硬度
の第１封止樹脂４１と、それ以外の部分を封止する一の
硬度より低い他の硬度の第２封止樹脂４２とを備えてい
る。Embodiments of the semiconductor device and the method of manufacturing the same according to the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view for explaining the first embodiment of the semiconductor device of the present invention. The semiconductor device 1 according to the first embodiment excludes the semiconductor element 10 having the optical element portion 11 on the upper surface, the base 2 for mounting the semiconductor element 10 via the die bonding agent 12, and the optical element portion 11. A bonding wire 3 for electrically wiring the semiconductor element 10 and a conductor portion 21 provided on the base 2 is provided, and at least the optical element portion 11 is used as a sealing resin 4 for sealing the semiconductor element 10 and the bonding wire 3. Is provided with a first sealing resin 41 of one hardness which seals the upper part of the above, and a second sealing resin 42 of another hardness lower than the one hardness which seals the other parts.
【００１４】透光性を備える第１封止樹脂４１はチクソ
トロピック性が付与されていたり架橋密度が大きくなっ
ているため流動性が低く硬化後の硬度がある程度高くな
るものである。また第２封止樹脂４２は流動性が比較的
高く硬化後においてもそれほど高い硬度を必要としない
ものである。すなわち、第１封止樹脂４１はその表面に
付着したごみを除去する際に拭き取りを行ってもそのご
みが内部に入り込むことがなく、しかも表面に傷が付か
ないような硬度となっている。一方、第２封止樹脂４２
はポッティングの際にその高流動性によってボンディン
グワイヤー３と基台２との間や半導体素子１０と基台２
との間に容易に入り込み、気泡が発生しないような硬度
となっている。The first sealing resin 41 having a light-transmitting property has low thixotropic property and has a high cross-linking density, so that it has a low fluidity and a certain hardness after curing. Further, the second sealing resin 42 has a relatively high fluidity and does not require so high hardness even after being cured. That is, the first sealing resin 41 has such hardness that the dust does not enter the inside even if it is wiped off when removing the dust adhering to the surface, and the surface is not scratched. On the other hand, the second sealing resin 42
Due to its high fluidity during potting, it is between the bonding wire 3 and the base 2 and between the semiconductor element 10 and the base 2.
The hardness is such that it easily enters between and and does not generate bubbles.
【００１５】このような封止樹脂４にて半導体素子１０
およびボンディングワイヤー３を封止して成る第１実施
例の半導体装置１では、光学的な特性に影響を及ぼす部
分への傷付きを抑制でき、しかもボンディングワイヤー
３と基台２との間や半導体素子１０と基台２との間での
気泡発生を防止できるため、光学的特性が向上すること
になる。The semiconductor element 10 is sealed with the sealing resin 4 as described above.
Also, in the semiconductor device 1 of the first embodiment, which is formed by sealing the bonding wire 3, it is possible to suppress the damage to the portion that affects the optical characteristics, and moreover, between the bonding wire 3 and the base 2 and the semiconductor. Since it is possible to prevent bubbles from being generated between the element 10 and the base 2, the optical characteristics are improved.
【００１６】次に、このような半導体装置１の製造方法
を図２に基づいて工程順に説明する。先ず、図２（ａ）
に示す実装工程として、ガラスエポキシ材やセラミック
ス等から成る基台２上に半導体素子１０を実装する。こ
の実装を行う際には、絶縁性ペーストから成るダイボン
ド剤１２を実装面全体に塗布し、隙間なく半導体素子１
０を接着するようにする。この隙間の発生を無くすこと
で後のポッティング工程における気泡の発生（半導体素
子１０と基台２との間での気泡発生）を抑制できる効果
がある。次いで、半導体素子１０の光学素子部１１以外
に設けられたパッド（図示せず）と基台２に設けられた
導体部分２１とをボンディングワイヤー３にて配線す
る。Next, a method of manufacturing such a semiconductor device 1 will be described in the order of steps based on FIG. First, FIG. 2 (a)
As a mounting step shown in (1), the semiconductor element 10 is mounted on the base 2 made of a glass epoxy material, ceramics or the like. When this mounting is performed, the die bonding agent 12 made of an insulating paste is applied to the entire mounting surface, and the semiconductor element 1 is formed without a gap.
Try to glue 0. By eliminating the generation of the gap, it is possible to suppress the generation of bubbles in the subsequent potting step (generation of bubbles between the semiconductor element 10 and the base 2). Then, the pads (not shown) provided on the semiconductor element 10 other than the optical element portion 11 and the conductor portion 21 provided on the base 2 are wired by the bonding wires 3.
【００１７】ボンディングワイヤー３による配線が完了
した後は、図２（ｂ）に示すポッティング工程として半
導体素子１０およびボンディングワイヤー３を第１封止
樹脂４１および第２封止樹脂４２にてポッティング封止
する。このポッティング封止を行うにあたり、第１ノズ
ル５１を半導体素子１０の光学素子部１１の上方に配置
し、第２ノズル５２を第１ノズル５１に隣接して配置す
る。After the wiring with the bonding wire 3 is completed, the semiconductor element 10 and the bonding wire 3 are potted and sealed with the first sealing resin 41 and the second sealing resin 42 as a potting step shown in FIG. 2B. To do. In performing this potting sealing, the first nozzle 51 is arranged above the optical element portion 11 of the semiconductor element 10, and the second nozzle 52 is arranged adjacent to the first nozzle 51.
【００１８】そして、この状態で第１ノズル５１から透
光性を備えた第１封止樹脂４１を滴下し、同時に第２ノ
ズル５２から第２封止樹脂４２を滴下する。第１ノズル
５１から滴下される第１封止樹脂４１は半導体素子１０
の少なくとも光学素子部１１上方を封止するようにな
り、第２ノズル５２から滴下される第２封止樹脂４２は
それ以外の半導体素子１０およびボンディングワイヤー
３を封止するようになる。特に第２封止樹脂４２はその
高流動性によってボンディングワイヤー３と基台２との
間に容易に流れ込んでいき気泡を発生させない。In this state, the first sealing resin 41 having a light-transmitting property is dropped from the first nozzle 51, and at the same time, the second sealing resin 42 is dropped from the second nozzle 52. The first sealing resin 41 dropped from the first nozzle 51 is the semiconductor element 10
At least the upper part of the optical element part 11 is sealed, and the second sealing resin 42 dropped from the second nozzle 52 seals the other semiconductor elements 10 and the bonding wires 3. In particular, the second sealing resin 42 easily flows between the bonding wire 3 and the base 2 due to its high fluidity and does not generate bubbles.
【００１９】なお、基台２がガラスエポキシ材から成る
場合にはエポキシ系またはアクリル系の第１封止樹脂４
１および第２封止樹脂４２を使用し、基台２がセラミッ
クスから成る場合にはシリコーン系の第１封止樹脂４１
および第２封止樹脂４２を使用し、基台２と封止樹脂４
との膨張係数の差によるストレスを緩和するようにす
る。When the base 2 is made of a glass epoxy material, the epoxy or acrylic first sealing resin 4 is used.
1 and the second sealing resin 42 are used, and when the base 2 is made of ceramics, the silicone-based first sealing resin 41
And the second sealing resin 42, the base 2 and the sealing resin 4 are used.
Try to reduce the stress caused by the difference in expansion coefficient between and.
【００２０】そして、第１封止樹脂４１および第２封止
樹脂４２を滴下した後これらを同時に硬化（加熱による
硬化、紫外線照射による硬化またはこれら両方による硬
化）させることで、図１に示すような第１実施例におけ
る半導体装置１を製造できる。このような製造方法によ
り、第１封止樹脂４１および第２封止樹脂４２から成る
２種類の樹脂を用いて封止樹脂４（図１参照）を構成す
る場合であっても、同一工程でのポッティング封止を行
うことができるようになる。Then, after the first sealing resin 41 and the second sealing resin 42 are dropped, they are simultaneously cured (curing by heating, curing by ultraviolet irradiation, or curing by both of them), as shown in FIG. The semiconductor device 1 according to the first embodiment can be manufactured. Even when the sealing resin 4 (see FIG. 1) is configured by using two kinds of resins including the first sealing resin 41 and the second sealing resin 42 by the manufacturing method as described above, the same process is performed. It becomes possible to carry out potting sealing.
【００２１】また、半導体素子１０がＣＣＤリニアセン
サーなどの長尺状のものである場合には、ポッティング
の際にその長手方向に第１ノズルおよび第２ノズル５２
を移動させるようにする。すなわち、図２（ｂ）を半導
体素子１０の短手方向の断面図とみなした場合、先ず第
１ノズル５１を半導体素子１０の光学素子部１１上方に
配置し、第２ノズル５２を半導体素子１０の短手方向両
隣に配置する。Further, when the semiconductor element 10 is a long one such as a CCD linear sensor, the first nozzle and the second nozzle 52 are arranged in the longitudinal direction of the potting at the time of potting.
To move. That is, when FIG. 2B is regarded as a cross-sectional view of the semiconductor element 10 in the lateral direction, first, the first nozzle 51 is arranged above the optical element section 11 of the semiconductor element 10, and the second nozzle 52 is arranged as the semiconductor element 10. Place it on both sides in the lateral direction.
【００２２】この状態で図３に示すように半導体素子
（リニアセンサーチップ１０ａ）の長手方向に沿って第
１ノズル５１と第２ノズル５２とを移動させながら同時
に第１封止樹脂４１と第２封止樹脂４２とを滴下する。
これによって、リニアセンサーチップ１０ａの短手方向
の断面視において図１に示すような半導体装置１を容易
に製造することができる。In this state, as shown in FIG. 3, while moving the first nozzle 51 and the second nozzle 52 along the longitudinal direction of the semiconductor element (linear sensor chip 10a), the first sealing resin 41 and the second sealing resin 41 are simultaneously moved. The sealing resin 42 is dropped.
Thereby, the semiconductor device 1 as shown in FIG. 1 can be easily manufactured in a cross-sectional view of the linear sensor chip 10a in the lateral direction.
【００２３】なお、第１ノズル５１および第２ノズル５
２から第１封止樹脂４１および第２封止樹脂４２を滴下
する際、予め第１ノズル５１、第２ノズル５２の先端に
ヒータ（図示せず）を設けておき、温度調節器（図示せ
ず）によって滴下する第１封止樹脂４１および第２封止
樹脂４２の温度を制御し、その粘性を調節するようにし
てもよい。また、同時に基台２全体を適当な温度に制御
し、第１封止樹脂４１および第２封止樹脂４２の粘性を
調節するようにしてもよい。例えば、チクソトロピック
性を備えた樹脂を使用する場合には初期粘度が高くポッ
ティングにする際の流動性が悪いため、このような温度
制御により粘性を調節し流動性を高めることで気泡を発
生させることのないポッティング封止を容易に行うこと
ができるようになる。The first nozzle 51 and the second nozzle 5
When the first sealing resin 41 and the second sealing resin 42 are dripped from 2, a heater (not shown) is provided at the tip of the first nozzle 51 and the second nozzle 52 in advance, and a temperature controller (not shown) is provided. The temperature of the first sealing resin 41 and the second sealing resin 42 that are dropped by (1) may be controlled to adjust the viscosity. At the same time, the entire base 2 may be controlled to an appropriate temperature to adjust the viscosities of the first sealing resin 41 and the second sealing resin 42. For example, when a resin having a thixotropic property is used, since the initial viscosity is high and the fluidity when potting is poor, the viscosity is adjusted by such temperature control to enhance the fluidity to generate bubbles. It becomes possible to easily carry out potting sealing.
【００２４】次に、本発明の半導体装置１の第２実施例
を説明する。図４は本発明の第２実施例を説明する断面
図である。すなわち、第２実施例における半導体装置１
は、基台２上に設けられた樹脂ダム部６の内側に封止樹
脂４が設けられた構造となっている。つまり、封止樹脂
４は先に説明したように、一の硬度から成る第１封止樹
脂４１と一の硬度より低い他の硬度から成る第２封止樹
脂４２とから構成されている。このため、ポッティング
封止を行う際に第２封止樹脂４２の高流動性によって樹
脂流れが発生しやすい状態となっており、これを防止す
るため基台２上に樹脂ダム部６を設けている。Next, a second embodiment of the semiconductor device 1 of the present invention will be described. FIG. 4 is a sectional view for explaining the second embodiment of the present invention. That is, the semiconductor device 1 according to the second embodiment.
Has a structure in which the sealing resin 4 is provided inside the resin dam portion 6 provided on the base 2. That is, as described above, the sealing resin 4 includes the first sealing resin 41 having one hardness and the second sealing resin 42 having another hardness lower than the one hardness. Therefore, when performing potting sealing, a resin flow easily occurs due to the high fluidity of the second sealing resin 42. To prevent this, a resin dam portion 6 is provided on the base 2. There is.
【００２５】第２実施例における半導体装置１を製造す
るには、半導体素子１０の実装およびボンディングワイ
ヤー３の配線を行った後、樹脂封止範囲を囲む状態に樹
脂ダム部６を取り付ける。そして、この樹脂ダム部６内
に例えば図２（ｂ）に示すような第１ノズル５１および
第２ノズル５２を用いて第１封止樹脂４１および第２封
止樹脂４２を同時に滴下する。To manufacture the semiconductor device 1 in the second embodiment, after mounting the semiconductor element 10 and wiring the bonding wire 3, the resin dam portion 6 is attached so as to surround the resin sealing area. Then, the first sealing resin 41 and the second sealing resin 42 are simultaneously dropped into the resin dam portion 6 by using the first nozzle 51 and the second nozzle 52 as shown in FIG. 2B, for example.
【００２６】半導体素子１０が長尺状のものから成る場
合には、図３に示すように第１ノズル５１および第２ノ
ズル５２をその長手方向に沿って移動しながら第１封止
樹脂４１および第２封止樹脂４２の滴下を行う。これに
よって、半導体素子１０の少なくとも光学素子部１１上
方を透光性を備えた第１封止樹脂４１にて封止し、それ
以外の部分を第２封止樹脂４２にて封止する半導体装置
１を樹脂流れなく製造することができる。In the case where the semiconductor element 10 is formed of a long one, as shown in FIG. 3, the first nozzle 51 and the second nozzle 52 are moved along the longitudinal direction thereof while the first sealing resin 41 and The second sealing resin 42 is dropped. As a result, at least the upper part of the optical element portion 11 of the semiconductor element 10 is sealed with the first sealing resin 41 having translucency, and the other portion is sealed with the second sealing resin 42. 1 can be manufactured without resin flow.
【００２７】第２実施例における半導体装置１では、光
学素子部１１上方の傷付き防止およびボンディングワイ
ヤー３と基台２との間における気泡の発生防止を図るこ
とができるようになるとともに、樹脂ダム部６の高さに
合わせたポッティング封止で封止樹脂４の厚さを一定に
できるようになる。これによって、封止樹脂４の上面を
平坦にすることが可能となり、より光学的特性を向上さ
せることが可能となる。In the semiconductor device 1 of the second embodiment, it is possible to prevent scratches above the optical element portion 11 and to prevent bubbles from being generated between the bonding wire 3 and the base 2, and at the same time, the resin dam The thickness of the sealing resin 4 can be made constant by potting sealing according to the height of the portion 6. As a result, the upper surface of the sealing resin 4 can be made flat and the optical characteristics can be further improved.
【００２８】次に、本発明の半導体装置１の第３実施例
を説明する。図５は本発明の第３実施例を説明する断面
図である。第３実施例における半導体装置１は、半導体
素子１０およびボンディングワイヤー３を封止する一の
硬度から成る封止樹脂４と、一の硬度よりも高い他の硬
度から成り光学素子部１１と対応する封止樹脂４の少な
くとも外表面に設けられる保護膜７とから構成されてい
るものである。Next, a third embodiment of the semiconductor device 1 of the present invention will be described. FIG. 5 is a sectional view for explaining the third embodiment of the present invention. The semiconductor device 1 according to the third embodiment corresponds to the sealing resin 4 having one hardness for sealing the semiconductor element 10 and the bonding wire 3 and the optical element portion 11 having another hardness higher than the one hardness. The protective resin 7 is provided on at least the outer surface of the sealing resin 4.
【００２９】すなわち、この半導体装置１を製造するに
あたり、半導体素子１０の実装およびボンディングワイ
ヤー３の配線を行った状態で、先ずこれら全体を透光性
を備えた封止樹脂４にてポッティング封止し、その後、
少なくとも光学素子部１１に対応する封止樹脂４の外表
面に透光性を備えた保護膜７を被着する。透光性を備え
た保護膜７としては、透光性樹脂やＳｎＯ2 やＩＴＯな
どの透光性酸化膜を用いる。That is, when the semiconductor device 1 is manufactured, the semiconductor element 10 is mounted and the bonding wire 3 is wired, and then the whole of them is potted and sealed with the sealing resin 4 having a light-transmitting property. And then
At least the outer surface of the sealing resin 4 corresponding to the optical element portion 11 is covered with the light-transmitting protective film 7. As the protective film 7 having translucency, a translucent resin or a translucent oxide film such as SnO 2 or ITO is used.
【００３０】これにより、高流動性の封止樹脂４によっ
てボンディングワイヤー３と基台２との間に気泡を発生
させることなく封止できるとともに、高硬度の保護膜７
によって光学素子部１１と対応する外表面の傷付きを防
止できるような半導体装置１となる。なお、この保護膜
７を被着するには、透光性樹脂の場合にはスプレー方式
やロールコート方式を用いたり、透光性酸化膜の場合に
は蒸着やスパッタリング法を用いればよい。As a result, the high-fluidity sealing resin 4 can seal the bonding wire 3 and the base 2 without generating bubbles, and the protective film 7 has a high hardness.
Thus, the semiconductor device 1 is formed so that the outer surface corresponding to the optical element portion 11 can be prevented from being scratched. To apply the protective film 7, a spray method or a roll coating method may be used in the case of a transparent resin, and a vapor deposition or sputtering method may be used in the case of a transparent oxide film.
【００３１】また、図６は本発明の半導体装置１におけ
る第４実施例を説明する断面図であり、この半導体装置
１では半導体素子１０およびボンディングワイヤー３の
全体を封止する封止樹脂４の外表面全体に保護膜７を被
着した構成となっている。第４実施例における半導体装
置１も第３実施例と同様に、気泡の発生防止および光学
素子部１１に対応する外表面への傷付き防止を図ること
ができる。FIG. 6 is a sectional view for explaining a fourth embodiment of the semiconductor device 1 of the present invention. In the semiconductor device 1, a sealing resin 4 for sealing the entire semiconductor element 10 and the bonding wire 3 is used. The protective film 7 is attached to the entire outer surface. Similarly to the third embodiment, the semiconductor device 1 according to the fourth embodiment can also prevent the generation of bubbles and the damage to the outer surface corresponding to the optical element portion 11.
【００３２】また、この保護膜７として、高硬度の無反
射コーティングや紫外線フィルタとなるＵＶコーティン
グ、赤外線フィルタとなるＩＲコーティングを用いても
よい。これによって、外乱光による悪影響を抑制できる
半導体装置１となり、動作信頼性をさらに向上させるこ
とが可能となる。また、保護膜７としてアクリル系また
はポリエステル系の導電性透明薄膜を用いることにより
静電気によるごみの付着を防止することができるように
なる。Further, as the protective film 7, a high hardness non-reflection coating, a UV coating serving as an ultraviolet filter, or an IR coating serving as an infrared filter may be used. As a result, the semiconductor device 1 that can suppress the adverse effect of ambient light is provided, and the operational reliability can be further improved. Further, by using an acrylic or polyester conductive transparent thin film as the protective film 7, it becomes possible to prevent the adhesion of dust due to static electricity.
【００３３】さらに、第１実施例から第４実施例におけ
るいずれの半導体装置１においても、封止後の封止樹脂
４表面に例えばアルミニウム製粘着テープやポリイミド
製粘着テープ、ガラスクロス製粘着テープから成る耐熱
性テープ（図示せず）を貼っておき、リフローの際の熱
から封止樹脂４を保護するようにしてもよい。このよう
な耐熱性テープを貼ることにり、封止樹脂４自体はもち
ろん内部に含浸した水分の膨張による爆発や樹脂クラッ
ク、ボンディングワイヤー３の切れ等を防止することが
可能となる。Further, in any of the semiconductor devices 1 in the first to fourth embodiments, the surface of the sealing resin 4 after sealing is made of, for example, an aluminum adhesive tape, a polyimide adhesive tape, or a glass cloth adhesive tape. Alternatively, a heat-resistant tape (not shown) may be attached to protect the sealing resin 4 from heat during reflow. By sticking such a heat-resistant tape, it is possible to prevent an explosion, a resin crack, a breakage of the bonding wire 3 and the like due to the expansion of not only the sealing resin 4 itself but also the moisture impregnated inside.
【００３４】しかも、出荷時における衝撃から傷付き発
生を防止したり、ハンドリング時の傷付きおよび汚れか
ら封止樹脂４を保護することもできるようになる。特
に、封止樹脂４がシリコーン系から成る場合にはエポキ
シ系に比べて柔らかく傷付きやすいため、このような耐
熱性テープを貼ることが傷付き防止を図る上で有効な手
段となる。Moreover, it becomes possible to prevent the occurrence of scratches from the impact during shipping, and to protect the sealing resin 4 from scratches and stains during handling. In particular, when the sealing resin 4 is made of a silicone resin, it is softer and more easily scratched than an epoxy resin. Therefore, sticking such a heat resistant tape is an effective means for preventing scratches.
【００３５】[0035]
【発明の効果】以上説明したように、本発明の半導体装
置およびその製造方法によれば次のような効果がある。
すなわち、本発明の半導体装置によれば、封止樹脂によ
るポッティング封止であってもボンディングワイヤーと
基台との間に気泡が発生せず、しかも光学素子面に対応
する部分への傷付きを防止できるため、光学的特性を向
上させることが可能となる。また、本発明の半導体装置
の製造方法によれば、第１封止樹脂および第２封止樹脂
を同時にポッティングできるようになる。つまり、気泡
の発生がなくしかも光学素子面に対応する部分への傷付
きを防止できる半導体装置を少ない工程で容易に製造す
ることができ、大幅なコストダウンを図ることが可能と
なる。As described above, the semiconductor device and the method of manufacturing the same of the present invention have the following effects.
That is, according to the semiconductor device of the present invention, bubbles are not generated between the bonding wire and the base even if potting is performed by using a sealing resin, and a portion corresponding to the optical element surface is not scratched. Since it can be prevented, the optical characteristics can be improved. Further, according to the method of manufacturing a semiconductor device of the present invention, the first sealing resin and the second sealing resin can be potted simultaneously. That is, it is possible to easily manufacture a semiconductor device that does not generate bubbles and can prevent damage to a portion corresponding to the optical element surface in a small number of steps, and it is possible to significantly reduce the cost.
【図１】本発明の第１実施例を説明する断面図である。FIG. 1 is a cross-sectional view illustrating a first embodiment of the present invention.
【図２】本発明の半導体装置の製造方法を順に説明する
断面図で、（ａ）は実装工程、（ｂ）はポッティング工
程である。FIG. 2 is a cross-sectional view for sequentially explaining the method for manufacturing a semiconductor device of the present invention, in which (a) is a mounting step and (b) is a potting step.
【図３】リニアセンサーチップの場合の製造方法を説明
する図である。FIG. 3 is a diagram illustrating a manufacturing method in the case of a linear sensor chip.
【図４】本発明の第２実施例を説明する断面図である。FIG. 4 is a sectional view illustrating a second embodiment of the present invention.
【図５】本発明の第３実施例を説明する断面図である。FIG. 5 is a sectional view illustrating a third embodiment of the present invention.
【図６】本発明の第４実施例を説明する断面図である。FIG. 6 is a sectional view illustrating a fourth embodiment of the present invention.
１ 半導体装置 ２ 基台 ３ ボンディングワイヤー ４ 封止樹脂 ７ 保護膜 １０ 半導体素子 １１ 光学素子部 １２ ダイボンド剤 ２１ 導体部分 ４１ 第１封止樹脂 ４２ 第２封止樹脂 DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Base 3 Bonding wire 4 Sealing resin 7 Protective film 10 Semiconductor element 11 Optical element part 12 Die bonding agent 21 Conductor part 41 First sealing resin 42 Second sealing resin
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 23/31 33/00 Ｎ ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Office reference number FI technical display location H01L 23/31 33/00 N
Claims (5)
と、該半導体素子を実装するための基台と、該光学素子
面を除く半導体素子と該基台に設けられた導体部分とを
電気的に配線するボンディングワイヤーと、該半導体素
子および該ボンディングワイヤーを覆う封止樹脂とを備
えている半導体装置であって、 前記封止樹脂は、一の硬度から成り少なくとも前記光学
素子面の上方に設けられる第１封止樹脂と、 前記一の硬度よりも低い他の硬度から成り前記第１封止
樹脂以外の部分に設けられる第２封止樹脂とから成るこ
とを特徴とする半導体装置。1. A semiconductor element having an optical element surface on an upper surface, a base for mounting the semiconductor element, a semiconductor element excluding the optical element surface, and a conductor portion provided on the base are electrically connected. A semiconductor device comprising: a bonding wire to be wired electrically; and a sealing resin covering the semiconductor element and the bonding wire, wherein the sealing resin is made of one hardness and at least above the optical element surface. A semiconductor device comprising: a first encapsulating resin provided; and a second encapsulating resin having another hardness lower than the one hardness and provided in a portion other than the first encapsulating resin.
実装される半導体素子と、 前記光学素子面を除く半導体素子と前記基台に設けられ
た導体部分とを電気的に配線するボンディングワイヤー
と、 一の硬度から成り前記半導体素子および前記ボンディン
グワイヤーを封止する封止樹脂と、 前記一の硬度よりも高い他の硬度から成り前記光学素子
面に対応する前記封止樹脂の少なくとも外表面に設けら
れる保護膜とから成ることを特徴とする半導体装置。2. A semiconductor element having an optical element surface on its upper surface and mounted on a predetermined base, and a semiconductor element excluding the optical element surface and a conductor portion provided on the base are electrically wired. A bonding wire, a sealing resin having one hardness for sealing the semiconductor element and the bonding wire, and at least the sealing resin having another hardness higher than the one hardness and corresponding to the optical element surface. A semiconductor device comprising a protective film provided on an outer surface.
ことを特徴とする請求項２記載の半導体装置。3. The semiconductor device according to claim 2, wherein the protective film is made of a conductive transparent thin film.
基台上に実装する工程と、 前記光学素子面を除く半導体素子と前記基台に設けられ
た導体部分とをボンディングワイヤーで電気的に配線す
る工程と、 前記光学素子面の上方に配置した一のノズルから一の硬
度の第１封止樹脂を滴下すると同時に、該一のノズルに
隣接して配置した他のノズルから該一の硬度よりも低い
他の硬度の第２封止樹脂を滴下する工程とから成ること
を特徴とする半導体装置の製造方法。4. A step of mounting a semiconductor element having an optical element surface on an upper surface on a base, and a semiconductor element excluding the optical element surface and a conductor portion provided on the base are electrically connected by a bonding wire. And a step of wiring the first sealing resin of one hardness from one nozzle arranged above the optical element surface, and at the same time from another nozzle arranged adjacent to the one nozzle. And a step of dropping a second sealing resin having another hardness lower than the hardness, the manufacturing method of the semiconductor device.
合において、 前記一のノズルを中心として該半導体素子の短手方向両
隣に前記他のノズルを配置し、 前記一のノズルおよび他のノズルを前記半導体素子の長
手方向に沿って移動しながら前記第１封止樹脂および第
２封止樹脂を同時に滴下することを特徴とする請求項４
記載の半導体装置の製造方法。5. In the case where the semiconductor element is a long one, the other nozzles are arranged on both sides in the lateral direction of the semiconductor element with the one nozzle as a center, and the one nozzle and the other nozzle are arranged. The first sealing resin and the second sealing resin are simultaneously dropped while the nozzle is moved along the longitudinal direction of the semiconductor element.
The manufacturing method of the semiconductor device described in the above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6242235A JPH0883869A (en) | 1994-09-09 | 1994-09-09 | Semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6242235A JPH0883869A (en) | 1994-09-09 | 1994-09-09 | Semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0883869A true JPH0883869A (en) | 1996-03-26 |
Family
ID=17086252
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6242235A Pending JPH0883869A (en) | 1994-09-09 | 1994-09-09 | Semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0883869A (en) |
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