JPH06204267A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH06204267A JPH06204267A JP5001486A JP148693A JPH06204267A JP H06204267 A JPH06204267 A JP H06204267A JP 5001486 A JP5001486 A JP 5001486A JP 148693 A JP148693 A JP 148693A JP H06204267 A JPH06204267 A JP H06204267A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- wafer
- dicing
- die bonding
- elements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68354—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
- Dicing (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体装置の製造方法に
関し、特にダイシング及び、ダイボンディングする方法
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing method, and more particularly to a dicing and die bonding method.
【０００２】[0002]
【従来の技術】半導体装置製造の後工程の製造方法を簡
単に説明する。半導体ウェーハを個々の半導体素子に分
割し、リードフレームまたは半導体集積回路容器の素子
搭載部に移送し搭載する。更に半導体素子の端子とリー
ドフレームまたは半導体集積回路容器の内部リードとの
結線、半導体素子の封止、外部リードのメッキ、捺印、
リード切断、選別、リード成形等を行ない半導体装置が
完成する。本発明は上述した半導体装置の製造方法の中
の、特に前半に関するものであり、その従来の製造方法
の詳細を図２を基に以下に説明する。半導体ウェーハ２
の裏面に粘着テープ１を貼り付け、半導体ウェハ２の表
面側からダイシングを行ない個々の半導体素子３に分割
する。次に半導体素子３の表面側を直接コレット５によ
り吸着し、リードフレーム４または半導体集積回路容器
の素子搭載部に移送し搭載する。2. Description of the Related Art A method of manufacturing a semiconductor device, which is a post-process, will be briefly described. A semiconductor wafer is divided into individual semiconductor elements, and the semiconductor wafer is transferred to and mounted on a lead frame or an element mounting portion of a semiconductor integrated circuit container. Furthermore, the connection between the terminals of the semiconductor element and the lead frame or the internal lead of the semiconductor integrated circuit container, the sealing of the semiconductor element, the plating of the external lead, the marking,
The semiconductor device is completed by performing lead cutting, selection, lead molding, and the like. The present invention relates to the first half of the above-described semiconductor device manufacturing methods, and the details of the conventional manufacturing method will be described below with reference to FIG. Semiconductor wafer 2
The adhesive tape 1 is attached to the back surface of the semiconductor wafer 2, and the semiconductor wafer 2 is diced from the front surface side to be divided into individual semiconductor elements 3. Next, the front surface side of the semiconductor element 3 is directly adsorbed by the collet 5, transferred to the element mounting portion of the lead frame 4 or the semiconductor integrated circuit container, and mounted.
【０００３】[0003]
【発明が解決しようとする課題】上述した従来の半導体
ウェーハを粘着テープに保持させてダイシング及び、ダ
イボンディングする方法では、半導体ウェーハ表面がむ
き出しの為ハンドリング時半導体素子の表面に傷、汚れ
が付き易い。また、ダイボンディングはコレットにより
半導体素子表面側を直接吸着し移送する為、半導体素子
端の欠け、表面の傷が生じ易いといった不具合がある。SUMMARY OF THE INVENTION In the above-mentioned method of dicing and die-bonding a semiconductor wafer by holding it on an adhesive tape, the surface of the semiconductor wafer is exposed, so that the surface of the semiconductor element is not scratched or soiled during handling. easy. Further, since the die bonding directly sucks and transfers the surface side of the semiconductor element by the collet, there is a problem that the edge of the semiconductor element is easily chipped and the surface is easily scratched.
【０００４】本発明の目的は、半導体装置製造の後工程
のウェーハマウント、ダイシング、ダイボンディング時
に発生する半導体素子への傷、汚れ、欠けの発生を防止
できる半導体装置の製造方法を提供することにある。An object of the present invention is to provide a method of manufacturing a semiconductor device capable of preventing the occurrence of scratches, stains, and chips on the semiconductor element that occur during wafer mounting, dicing, and die bonding in the subsequent steps of manufacturing the semiconductor device. is there.
【０００５】[0005]
【課題を解決するための手段】本発明はダイシング前に
あらかじめ半導体ウェーハ表面側にウェハ保持と表面保
護膜を兼ねた粘着テープを貼り付け、その状態のままダ
イシングからダイボ，ディングまでを行なう。According to the present invention, before dicing, an adhesive tape, which also serves as a wafer holder and a surface protective film, is adhered to the front side of a semiconductor wafer in advance, and dicing, diving, and dicing are performed in that state.
【０００６】[0006]
【実施例】次に本発明について図面を参照して説明す
る。図１は本発明の一実施例を説明するための工程断面
図である。The present invention will be described below with reference to the drawings. FIG. 1 is a process sectional view for explaining an embodiment of the present invention.
【０００７】まず、半導体ウェハ２の表面側に粘着テー
プ１を貼り付ける（図１（ａ））。次に半導体ウェハ２
の裏面側からダイシングを行なう（図１（ｂ））。次に
ダイシングされて個々に分割された半導体素子３を、粘
着テープ面を上側にしてダイボンダーにセットし、ダイ
ボンディング用治具５でテープごと半導体素子裏面を押
圧し（図１（ｃ））、剥がすと同時にリードフレーム４
または半導体集積回路容器の素子搭載部に移送し搭載す
る〔図１（ｄ）、（ｅ）〕。First, the adhesive tape 1 is attached to the front surface side of the semiconductor wafer 2 (FIG. 1A). Next, semiconductor wafer 2
Dicing is performed from the back surface side of (FIG. 1 (b)). Next, the semiconductor element 3 that has been diced and divided into individual pieces is set on the die bonder with the adhesive tape surface facing upward, and the back surface of the semiconductor element is pressed together with the tape by the die bonding jig 5 (FIG. 1C). At the same time as peeling off, lead frame 4
Alternatively, the semiconductor integrated circuit container is transferred to and mounted on the device mounting portion [FIGS. 1D and 1E].
【０００８】[0008]
【発明の効果】以上説明したように本発明は、ウェーハ
マウント工程からダイボンディング工程まで半導体ウェ
ーハ表面が粘着テープで保護されたまま行なわれる為、
半導体素子の表面の傷、汚れを防止できる。As described above, according to the present invention, since the semiconductor wafer surface is protected from the wafer mounting step to the die bonding step with the adhesive tape,
It is possible to prevent scratches and stains on the surface of the semiconductor element.
【０００９】また、ダイボンディング時はコレット等の
治具が半導体素子に直接接触しない為、半導体素子端の
欠け、表面の傷を防止できる効果がある。Further, during die bonding, a jig such as a collet does not come into direct contact with the semiconductor element, so that it is possible to prevent chipping of the edge of the semiconductor element and damage to the surface.
【図１】本発明の一実施例を説明すために工程順に示し
た半導体装置の製造工程断面図である。FIG. 1 is a cross-sectional view of a manufacturing process of a semiconductor device, which is shown in the order of steps for explaining an embodiment of the present invention.
【図２】従来の半導体装置の製造方法を説明するために
工程順に示した製造工程断面図である。FIG. 2 is a manufacturing step cross-sectional view shown in order of steps for explaining a conventional method for manufacturing a semiconductor device.
１ 粘着テープ ２ 半導体ウェハ ３ 半導体素子 ４ リードフレーム ５ ダイボンディング用治具 1 Adhesive tape 2 Semiconductor wafer 3 Semiconductor element 4 Lead frame 5 Die bonding jig
Claims (1)
ダイシング、ダイボンディングを行なう方法において、
半導体ウェハの表面側に粘着テープを貼り付け半導体ウ
ェハの裏面側からダイシングし、更にダイボンディング
時半導体素子を粘着テープ越しに押圧することにより剥
離し、リードフレームまたは半導体集積回路容器の素子
搭載部に移送し搭載することを特徴とする半導体装置の
製造方法。1. A semiconductor wafer is held on an adhesive tape,
In the method of performing dicing and die bonding,
Adhesive tape is attached to the front side of the semiconductor wafer, dicing is performed from the back side of the semiconductor wafer, and at the time of die bonding, the semiconductor element is peeled off by pressing it over the adhesive tape, and then the lead frame or the element mounting part of the semiconductor integrated circuit container. A method of manufacturing a semiconductor device, which comprises transferring and mounting.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5001486A JPH06204267A (en) | 1993-01-08 | 1993-01-08 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5001486A JPH06204267A (en) | 1993-01-08 | 1993-01-08 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06204267A true JPH06204267A (en) | 1994-07-22 |
Family
ID=11502775
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5001486A Pending JPH06204267A (en) | 1993-01-08 | 1993-01-08 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06204267A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6215194B1 (en) | 1998-10-01 | 2001-04-10 | Mitsubishi Denki Kabushiki Kaisha | Wafer sheet with adhesive on both sides and attached semiconductor wafer |
| US6514796B2 (en) | 1995-05-18 | 2003-02-04 | Hitachi, Ltd. | Method for mounting a thin semiconductor device |
| CN1301536C (en) * | 2003-05-26 | 2007-02-21 | 台湾积体电路制造股份有限公司 | Method for preventing water from micro particles dropping onto it while cutting |
| CN100431125C (en) * | 2005-07-20 | 2008-11-05 | 富士通株式会社 | IC chip mounting method |
| CN111509107A (en) * | 2020-04-24 | 2020-08-07 | 湘能华磊光电股份有限公司 | Method for separating L ED wafer into N pieces of reverse films |
-
1993
- 1993-01-08 JP JP5001486A patent/JPH06204267A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6514796B2 (en) | 1995-05-18 | 2003-02-04 | Hitachi, Ltd. | Method for mounting a thin semiconductor device |
| US6589818B2 (en) | 1995-05-18 | 2003-07-08 | Hitachi. Ltd. | Method for mounting a thin semiconductor device |
| US6215194B1 (en) | 1998-10-01 | 2001-04-10 | Mitsubishi Denki Kabushiki Kaisha | Wafer sheet with adhesive on both sides and attached semiconductor wafer |
| US6461938B2 (en) | 1998-10-01 | 2002-10-08 | Mitsubishi Denki Kabushiki Kaisha | Method of producing semiconductor devices |
| CN1301536C (en) * | 2003-05-26 | 2007-02-21 | 台湾积体电路制造股份有限公司 | Method for preventing water from micro particles dropping onto it while cutting |
| CN100431125C (en) * | 2005-07-20 | 2008-11-05 | 富士通株式会社 | IC chip mounting method |
| CN111509107A (en) * | 2020-04-24 | 2020-08-07 | 湘能华磊光电股份有限公司 | Method for separating L ED wafer into N pieces of reverse films |
| CN111509107B (en) * | 2020-04-24 | 2021-06-04 | 湘能华磊光电股份有限公司 | Method for separating N parts of reverse films from LED wafer |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3568980B2 (en) | Processing method of IC in wafer form after cutting into chips | |
| US6882036B2 (en) | Apparatuses for forming thin microelectronic dies | |
| HK1035261A1 (en) | Method for producing semiconductor device. | |
| US7495315B2 (en) | Method and apparatus of fabricating a semiconductor device by back grinding and dicing | |
| JP2000340526A (en) | Semiconductor device and manufacture thereof | |
| US20070105348A1 (en) | Wafer processing method | |
| JP2000340526A5 (en) | ||
| JP2004146645A (en) | Method for manufacturing semiconductor device | |
| JPH11204551A (en) | Manufacture of semiconductor device | |
| US6784021B2 (en) | Semiconductor device, method of fabricating the same and semiconductor device fabricating apparatus | |
| JP2007123362A (en) | Method of manufacturing device | |
| JP2003197567A (en) | Method of manufacturing semiconductor device | |
| JPH0722358A (en) | Manufacture of semiconductor device | |
| JPH06204267A (en) | Manufacture of semiconductor device | |
| JP2994356B1 (en) | Wafer surface protection tape peeling device | |
| JPH1174230A (en) | Manufacture of thin-film semiconductor device | |
| JPH0917756A (en) | Protective type for semiconductor and its usage method | |
| JP2737859B2 (en) | Manufacturing method of semiconductor chip | |
| JP2001085453A (en) | Method of manufacturing semiconductor device | |
| US20030073264A1 (en) | Method of manufacturing semiconductor device from semiconductor wafer having thick peripheral portion | |
| KR20220048932A (en) | Processing method of a wafer and grinding apparatus | |
| JPS61180442A (en) | Manufacture of semiconductor device | |
| JP4342340B2 (en) | Manufacturing method of semiconductor device | |
| JPS6323334A (en) | Processing of semiconductor element | |
| JP3271762B2 (en) | Semiconductor device assembling method and semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19981104 |