JPH0547760A - Semiconductor integrated circuit device and its manufacture and sputtering target for the manufacture - Google Patents

Abstract

PURPOSE:To improve the oxidation-resistance of a copper wiring and improve the adhesiveness of the copper wiring to an Si substrate and an Si-system insulating film by a method wherein copper alloy containing elements which have electronegativity equivalent to or lower than that of copper is employed as the material of the wiring formed on the semiconductor substrate. CONSTITUTION:A Cu wiring 1 is formed on an SiO2 film 3 formed on the main surface of a semiconductor substrate 2 made of single crystal Si. A high concentration alloy layer 5 having a very small thickness is formed on the surface of the Cu wiring 1. The high concentration alloy layer 5 is, for instance, made of Cu alloy containing high concentration Pt which has a lower than Cu and high concentration Mg which has a higher electronegativity than Si. Further, the inside of the high concentration alloy layer 5 is made of Cu alloy containing very low concentration Pt and very low concentration Mg. With this constitution, a Cu wiring having a high oxidation-resistance can be obtained and, further, a Cu wiring having a high adhesion strength to an Si substrate and an Si-system insulating film can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device and a manufacturing technique thereof, and more particularly to a technique effectively applied to a semiconductor integrated circuit device using Cu as a wiring material.

[0002]

2. Description of the Related Art Conventionally, a wiring material for an LSI formed on a silicon (Si) substrate has a low electric resistance.
Al has been used because of its good adhesion to a silicon oxide (SiO ₂ ) film and its easy processing.

However, with the miniaturization of wiring due to high integration of LSI, electromigration (E
M), stress migration (SM), voids, and the like cause a serious problem of reduction in reliability of Al wiring, and thus various wiring materials replacing Al have been studied in recent years.

Cu, in particular, has an electric resistance of about 2 / of that of Al.
Since it is as low as 3, the current density can be made higher than that of Al, and the melting point is higher than that of Al by 400 ° C. or more, so that electromigration resistance is also high. It is regarded as a potential wiring material for next-generation LSIs that require processing.

[0005]

However, since the Cu wiring has low oxidation resistance, oxidation progresses to the inside of the wiring when the interlayer insulating film is deposited, and the electrical resistance increases.
Low adhesion strength to SiO ₂ film, Si or SiO
Liable to diffuse into _2, when connected to the diffusion layer of the Si substrate, there is a possibility to degrade the characteristics of the device, it has been pointed out problems such as that, to improve these become an issue of the Cu wiring ing.

Therefore, an object of the present invention is to provide a technique for improving the oxidation resistance of Cu wiring.

Another object of the present invention is to make Cu wiring SiO ₂
It is to provide a technique for improving the adhesiveness to a film.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0009]

The typical ones of the inventions disclosed in the present application will be outlined below.

(1) As the material of the wiring formed on the semiconductor substrate, a Cu alloy to which an element whose electronegativity is equal to or larger than Cu is added is used.

(2) As the material of the wiring formed on the semiconductor substrate, a Cu alloy to which an element whose electronegativity is equal to or smaller than Si is added is used.

The electronegativity of Cu is 1.9 and oxygen is 3.5. Further, as is well known, in the chemical bond [AB] composed of two elements A and B, the larger the difference in electronegativity between A and B, the more ionic bond property [AB] is. Greater (ie less covalent).

Therefore, the electronegativity is equal to or higher than that of Cu.
When a wiring is formed by using a Cu alloy added with a larger element (A) than the above, when the surface is oxidized, [Cu-
Because of the chemical bond [A-O] having a covalent bond larger than that of [O], a dense and stable oxide film is formed on the surface of the wiring, which prevents the progress of oxidation inside the wiring.

The above elements are added in the range of 0.01% by weight or more and less than 10% by weight. If it is less than 0.01% by weight, sufficient oxidation resistance cannot be obtained, and if it is 10% by weight or more, the characteristics of Cu are impaired. Further, it is desirable that the above elements are added in such a range that the electrical resistivity of the Cu alloy does not exceed 3.5 [μΩcm] (= electrical resistivity of Al), and more preferably 2.7 [μΩcm].

Representative examples of elements having electronegativity equal to or higher than Cu and Cu and the oxide film thickness formed on the surface of the Cu alloy film to which these elements are added by 0.5% by weight are shown in Table 1 below. Show. This oxide film is formed by annealing a Cu alloy film in an oxygen atmosphere at 500 ° C.

[0016]

[Table 1]

As is clear from Table 1, while the oxide film thickness formed on the surface of the pure Cu film is 800 nm, a Cu alloy film containing an element whose electronegativity is equal to or greater than Cu is added. Since the oxide film thickness formed on the surface of is less than that, it can be seen that the oxidation resistance is improved.

It is also found that the addition of Pd, Pt, Au or Ag, in particular, significantly improves the oxidation resistance.

The elements used in the present invention are not limited to the elements exemplified in Table 1. Further, two or more kinds of elements having electronegativity equal to or higher than Cu may be added at the same time. Electronegativity of elements is Pauling
(L. Pauling), and it is described in, for example, “Metal Data Book” P23, edited by The Japan Institute of Metals.

On the other hand, in general, [Si-Si] and [Si
-O] has an extremely large covalent bond property, and thus the ionic bond property of [Si-B] becomes larger as the element (B) having a larger electronegativity difference from Si, and the adhesive property to Si is improved. it is conceivable that. Further, it is empirically considered that an element having an electronegativity smaller than that of Si is more advantageous for adhesion to Si.

Therefore, the electronegativity is equal to or higher than that of Si.
By adding an element smaller than
Adhesiveness to i substrate, Cu wiring and Si-based insulating film (SiO 2
₂ etc.) Adhesiveness with

The above elements are added in the range of 0.01% by weight or more and less than 10% by weight. If it is less than 0.01% by weight, sufficient adhesion cannot be obtained, and if it is 10% by weight or more, the characteristics of Cu are impaired. In addition, the above elements have the electrical resistivity of Cu alloy
It is desirable to add in an amount not exceeding 3.5 [μΩcm], more preferably 2.7 [μΩcm].

Representative examples of elements having an electronegativity equal to or smaller than Si and 0.5% by weight of these elements
The adhesive strength at the interface between the added Cu alloy film and the SiO ₂ film is shown in Table 2 below. The elements used in the present invention are not limited to the elements exemplified in Table 2. Further, two or more kinds of elements having electronegativity equal to or higher than Cu may be added at the same time.

[0024]

[Table 2]

As is clear from Table 2, the electronegativity is S
The adhesive strength at the interface between the Cu alloy film added with an element equal to i or smaller than Si and the SiO ₂ film has a pure Cu film and a Si film.
It is larger than the adhesive strength at the interface with the O ₂ film, which shows that the adhesiveness is improved.

The oxidation resistance of Cu wiring is improved, and at the same time, S
In order to improve the adhesiveness to the i substrate and the Si-based insulating film, an element having an electronegativity equal to or higher than Cu and an electronegativity equal to Si or lower than Si are added together. Is effective.

The total amount of these two elements added is less than 20% by weight of the total amount of Cu alloy. Further, it is desirable to add these two kinds of elements within the range in which the electric resistivity of the Cu alloy does not exceed 3.5 [μΩcm], more preferably 2.7 [μΩcm].

To form the Cu wiring of the present invention on a semiconductor substrate, a Cu alloy film is deposited on the entire surface of the substrate by a sputtering method using a target made of a Cu alloy having the above composition, and then a photoresist film is used as a mask. The Cu alloy film is patterned by the etching.

The above etching is performed by, for example, reactive ion etching. The etching gas may be, for example, C
A chlorine-based gas such as Cl ₄ + BCl ₃ is used.

Next, the Cu wiring is annealed at a temperature of 250 ° C. or higher. By this annealing, the additive element inside the wiring diffuses, and an extremely thin high-concentration alloy layer is formed on the wiring surface.

As a result, the oxidation resistance and adhesiveness of the Cu wiring are improved, and since Cu having a low electric resistance forms the main conductive portion of the wiring, good electric conductivity can be secured.

Next, Cu wiring of the present invention and a method of manufacturing the same will be described with reference to examples.

[0033]

EXAMPLE FIG. 1 is a sectional view of a Cu wiring 1 of this example. The Cu wiring 1 is formed on the SiO ₂ film 3 formed on the main surface of the semiconductor substrate 2 made of Si single crystal. In addition, the upper portion of the Cu wiring 1 is also SiO ₂
An interlayer insulating film 4 made of is formed.

On the surface of the Cu wiring 1, a high concentration alloy layer 5 having an extremely thin film thickness is formed. This high concentration alloy layer 5
Is an element whose electronegativity is larger than Cu, for example, P
It is composed of a Cu alloy containing t and Mg, which is an element having an electronegativity smaller than Si, in a high concentration. The inside of the high-concentration alloy layer 5 is made of a Cu alloy containing a very small amount of Pt and Mg.

To form the Cu wiring 1, first, as shown in FIG. 2, a Cu alloy film 1a is deposited on the SiO ₂ film 3 by sputtering. The sputtering targets used at this time are, for example, Pt and Mg of 0.5 each.
A Cu alloy containing about wt% and having an electrical resistivity of 2.7 [μΩcm] or less is used.

Next, as shown in FIG. 3, the Cu alloy film 1a is formed.
A photoresist film 6 is formed on the surface of the Cu alloy film 1a, and the Cu alloy film 1a is patterned using the photoresist film 6 as an etching mask.
Then, the photoresist film 6 is removed by ashing.

Next, as shown in FIG.
Anneal at a temperature of 50 ° C. or higher.

By this annealing, the additive elements (Pt, Mg) inside the wiring are diffused, and the extremely thin high-concentration alloy layer 5 is formed on the surface.

After that, the Cu wiring 1 is formed by the CVD method.
The interlayer insulating film 4 is deposited on the upper part of the.

The Cu wiring 1 of this embodiment has an electronegativity of C.
Since it is composed of a Cu alloy to which Pt which is an element larger than u and Mg which is an element whose electronegativity is smaller than Si are added, the oxidation resistance is improved as compared with the conventional Cu wiring, and The adhesion to the underlying SiO ₂ film 3 and the upper interlayer insulating film 4 is also improved.

Further, in the Cu wiring 1 of this embodiment, since Pt and Mg which are additive elements are diffused on the wiring surface and the inside of the wiring is made of high-purity Cu, Cu having a low electric resistance is It forms the main conductive part.
Good electrical conductivity is ensured.

In FIG. 5, the Cu wiring 1 of the second layer is formed on the interlayer insulating film 4, and the Cu wiring 1 of the second layer and the first layer are formed through the connection hole 7 formed in the interlayer insulating film 4. The state where the Cu wiring 1 of the layer is electrically connected is shown.

To form the Cu wiring 1 of the second layer, the interlayer insulating film 4 is etched to form the connection hole 7, and then the Cu of the second layer is formed on the interlayer insulating film 4 by the method described above. The wiring 1 is formed.

When forming the connection hole 7, the high-concentration alloy layer 5 on the surface of the first-layer Cu wiring 1 exposed at the bottom of the connection hole 7 may be removed by etching. Further, as shown in FIG. 6, after the Cu alloy film 1a is embedded in the connection hole 7 to flatten the interlayer insulating film 4, the Cu wiring 1 of the second layer may be formed.

As described above, the invention made by the present inventor is
Although the present invention has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and it goes without saying that various modifications can be made without departing from the scope of the invention.

In the above description, the case where the Cu wiring of the present invention is applied to the wiring on the semiconductor substrate has been described. However, the present invention is not limited to this. It can also be applied to the wiring of a signal converter such as a device or a magnetic sensor.

The Cu wiring of the present invention can also be applied to a wiring board having only a wiring layer formed on the board, such as a mother board or a baby board.

[0048]

EFFECTS OF THE INVENTION (1) By using a Cu alloy to which an element whose electronegativity is equal to or larger than Cu is added as a material for a wiring formed on a semiconductor substrate, a Cu wiring with high oxidation resistance can be obtained. can get.

(2) As a wiring material formed on a semiconductor substrate, a Cu alloy to which an element whose electronegativity is equal to or smaller than Si is added is used.
Cu wiring having high adhesion strength to the i-type insulating film can be obtained.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of essential parts of a semiconductor substrate on which a Cu wiring of the present invention is formed.

FIG. 2 is a cross-sectional view of a main portion of a semiconductor substrate showing a method for manufacturing this Cu wiring.

FIG. 3 is a cross-sectional view of a main portion of a semiconductor substrate showing a method for manufacturing this Cu wiring.

FIG. 4 is a cross-sectional view of a semiconductor substrate showing a method for manufacturing this Cu wiring.

FIG. 5 is a cross-sectional view of essential parts of a semiconductor substrate on which Cu wiring according to another embodiment of the present invention is formed.

FIG. 6 is a cross-sectional view of essential parts of a semiconductor substrate on which Cu wiring according to another embodiment of the present invention is formed.

[Explanation of symbols]

1 Cu wiring 1a Cu alloy film 2 Semiconductor substrate 3 SiO ₂ film 4 Interlayer insulating film 5 High concentration alloy layer 6 Photoresist film 7 Connection hole

Front page continuation (72) Inventor Tokio Kato 5-20-1 Kamimizuhoncho, Kodaira-shi, Tokyo Inside Musashi Factory, Hitachi Ltd. (72) Inventor Masaji Sahara 5-chome, Kamimizumoto-cho, Kodaira-shi, Tokyo No. 20-1 Incorporated company Hitachi Ltd. in Musashi Plant (72) Inventor Masayasu Suzuki 5-20-1, Kamimizuhoncho, Kodaira-shi, Tokyo Incorporated company Hitachi Ltd. in Musashi Plant (72) Inventor Shinichi Ishida Kodaira, Tokyo 5-20-1 Josuihonmachi, Ichi-shi Incorporated company Hitachi, Ltd. Musashi factory

Claims (8)

[Claims] 1. A semiconductor integrated circuit device having Cu wiring on a semiconductor substrate, wherein the Cu wiring contains 0.01 wt% or more and 10 wt% or more of an element whose electronegativity is equal to or larger than Cu. A semiconductor integrated circuit device comprising a Cu alloy added in a range of less than 1. 2. The electrical resistivity of the Cu alloy is 3.5 [μΩ
cm] or less, the semiconductor integrated circuit device according to claim 1. 3. A Cu alloy film, to which an element having an electronegativity equal to or greater than Cu in an amount of 0.01 wt% or more and less than 10 wt% is added, is deposited on a semiconductor substrate, and then the Cu alloy is deposited. 3. The method for manufacturing a semiconductor integrated circuit device according to claim 1, wherein the film is patterned to form a Cu wiring, and then the Cu wiring is annealed at a temperature of 250 [deg.] C. or higher. 4. A semiconductor integrated circuit device having Cu wiring on a semiconductor substrate, wherein the Cu wiring contains 0.01 wt% or more and 10 wt% or less of an element whose electronegativity is equal to or smaller than Si. A semiconductor integrated circuit device comprising a Cu alloy added in a range of less than 1. 5. The electrical resistivity of the Cu alloy is 3.5 [μΩ
cm] or less, the semiconductor integrated circuit device according to claim 4. 6. A Cu alloy film, to which an element having an electronegativity equal to or smaller than Si in an amount of 0.01 wt% or more and less than 10 wt% is added, is deposited on a semiconductor substrate, and then the Cu alloy is formed. The method for manufacturing a semiconductor integrated circuit device according to claim 4, wherein the film is patterned to form a Cu wiring, and then the Cu wiring is annealed at a temperature of 250 ° C. or higher. 7. A sputtering target used for manufacturing a semiconductor integrated circuit device, wherein an element whose electronegativity is equal to or larger than Cu is 0.01% by weight or more and 10% by weight or less.
A sputter target comprising a Cu alloy added in a range of less than. 8. A sputter target used for manufacturing a semiconductor integrated circuit device, wherein an element whose electronegativity is equal to or smaller than Si is 0.01 wt% or more and 10 wt% or less.
A sputter target comprising a Cu alloy added in a range of less than.