JP6821261B2 - 被加工物の加工方法 - Google Patents
被加工物の加工方法 Download PDFInfo
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- JP6821261B2 JP6821261B2 JP2017084705A JP2017084705A JP6821261B2 JP 6821261 B2 JP6821261 B2 JP 6821261B2 JP 2017084705 A JP2017084705 A JP 2017084705A JP 2017084705 A JP2017084705 A JP 2017084705A JP 6821261 B2 JP6821261 B2 JP 6821261B2
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- 238000003672 processing method Methods 0.000 title claims description 7
- 239000000758 substrate Substances 0.000 claims description 91
- 239000011347 resin Substances 0.000 claims description 68
- 229920005989 resin Polymers 0.000 claims description 68
- 239000002390 adhesive tape Substances 0.000 claims description 16
- 239000011148 porous material Substances 0.000 claims description 12
- 238000002679 ablation Methods 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 11
- 230000002745 absorbent Effects 0.000 claims description 2
- 239000002250 absorbent Substances 0.000 claims description 2
- 239000011521 glass Substances 0.000 description 31
- 230000001678 irradiating effect Effects 0.000 description 7
- 238000003825 pressing Methods 0.000 description 7
- 230000004075 alteration Effects 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 230000005284 excitation Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000003754 machining Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000035699 permeability Effects 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
- H01L2221/68331—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding of passive members, e.g. die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
- H01L2221/68336—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Laser Beam Processing (AREA)
- Structure Of Printed Boards (AREA)
Description
波長 :355nm(YAGレーザーの第3高調波)
繰り返し周波数 :200kHz
平均出力 :15W
加工送り速度 :500mm/s
波長 :355nm(YAGレーザーの第3高調波)
繰り返し周波数 :200kHz
平均出力 :15W
加工送り速度 :500mm/s
波長 :355nm(YAGレーザーの第3高調波)
繰り返し周波数 :200kHz
平均出力 :第1ステップ10W 第2ステップ7W
加工送り速度 :500mm/s
11 インターポーザー基板
13 ガラス基板
14 集光器
15 第1樹脂層(再配線層)
16 集光レンズ
17 第2樹脂層(再配線層)
19 分割予定ライン
20 エキスパンド装置
21 加工溝
22 外筒
23 シールドトンネル
25 細孔
26 円筒状押圧部材
27 変質領域
31 インターポーザーチップ
Claims (4)
- 透明な基板と、該基板の表面に積層された第1樹脂層と、該基板の裏面に積層された第2樹脂層とを有し、該第1樹脂層が互いに交差する複数の分割予定ラインによって複数の領域に区画された板状の被加工物の加工方法であって、
該被加工物の該第2樹脂層にエキスパンド性のある粘着テープを貼着するテープ貼着ステップと、
該粘着テープを介して該被加工物をレーザー加工装置のチャックテーブルで保持する保持ステップと、
該第1樹脂層に対して吸収性を有し、該透明基板に対して透過性を有する波長のレーザービームを該被加工物に照射し、該第1樹脂層を該分割予定ラインに沿ってアブレーション加工で除去する樹脂層除去ステップと、
該樹脂層除去ステップを実施した後、該第1樹脂層が除去された表面側の領域越しに前記レーザービームを該被加工物に照射し、該透明基板の内部に該分割予定ラインに沿って周囲とは屈折率又は機械的強度が異なる改質層を形成する改質層形成ステップと、
該改質層形成ステップを実施した後、該粘着テープを拡張し、該改質層を破断起点に該透明基板及び裏面側の該第2樹脂層を該分割予定ラインに沿って破断して該被加工物をチップに分割する分割ステップと、
を備えたことを特徴とする被加工物の加工方法。 - 前記改質層は、細孔と該細孔をシールドする該透明基板の変質領域とからなるシールドトンネルから構成される請求項1記載の被加工物の加工方法。
- 前記第1及び第2樹脂層は再配線層であり、該被加工物はインターポーザー基板である請求項1記載の被加工物の加工方法。
- 該シールドトンネルは、該透明基板の表面又は裏面に表出することを特徴とする請求項2記載の被加工物の加工方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017084705A JP6821261B2 (ja) | 2017-04-21 | 2017-04-21 | 被加工物の加工方法 |
CN201810316110.7A CN108735666B (zh) | 2017-04-21 | 2018-04-10 | 被加工物的加工方法 |
KR1020180042633A KR102400418B1 (ko) | 2017-04-21 | 2018-04-12 | 피가공물의 가공 방법 |
US15/957,369 US10861712B2 (en) | 2017-04-21 | 2018-04-19 | Workpiece processing method |
TW107113285A TWI743353B (zh) | 2017-04-21 | 2018-04-19 | 工件加工方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017084705A JP6821261B2 (ja) | 2017-04-21 | 2017-04-21 | 被加工物の加工方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2018182260A JP2018182260A (ja) | 2018-11-15 |
JP6821261B2 true JP6821261B2 (ja) | 2021-01-27 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2017084705A Active JP6821261B2 (ja) | 2017-04-21 | 2017-04-21 | 被加工物の加工方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US10861712B2 (ja) |
JP (1) | JP6821261B2 (ja) |
KR (1) | KR102400418B1 (ja) |
CN (1) | CN108735666B (ja) |
TW (1) | TWI743353B (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11171031B2 (en) * | 2018-07-23 | 2021-11-09 | Texas Instruments Incorporated | Die matrix expander with partitioned subring |
KR102697974B1 (ko) * | 2018-11-21 | 2024-08-22 | 서울바이오시스 주식회사 | 발광 소자 및 이를 포함하는 발광 모듈 |
KR102715198B1 (ko) * | 2018-11-27 | 2024-10-08 | 린텍 가부시키가이샤 | 반도체 장치의 제조 방법 |
US11508606B2 (en) | 2019-11-05 | 2022-11-22 | Nxp B.V. | Technique for handling diced wafers of integrated circuits |
US11658056B2 (en) * | 2019-11-05 | 2023-05-23 | Nxp B.V. | Technique for handling diced wafers of integrated circuits |
JP7406247B2 (ja) * | 2020-05-22 | 2023-12-27 | アピックヤマダ株式会社 | 樹脂モールド装置 |
Family Cites Families (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4300687B2 (ja) | 1999-10-28 | 2009-07-22 | 味の素株式会社 | 接着フィルムを用いた多層プリント配線板の製造法 |
DE10219388A1 (de) | 2002-04-30 | 2003-11-20 | Siemens Ag | Verfahren zur Erzeugung einer Grabenstruktur in einem Polymer-Substrat |
JP2005116844A (ja) | 2003-10-09 | 2005-04-28 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JP4471632B2 (ja) | 2003-11-18 | 2010-06-02 | 株式会社ディスコ | ウエーハの加工方法 |
JP2007012733A (ja) * | 2005-06-29 | 2007-01-18 | Seiko Epson Corp | 基板の分割方法 |
JP2009146988A (ja) | 2007-12-12 | 2009-07-02 | Fujitsu Ltd | 配線基板の個片化方法およびパッケージ用基板 |
JP2009290148A (ja) * | 2008-06-02 | 2009-12-10 | Disco Abrasive Syst Ltd | ウエーハの分割方法 |
JP5335576B2 (ja) * | 2009-06-26 | 2013-11-06 | 株式会社ディスコ | 半導体ウエーハの加工方法 |
JP2011035253A (ja) * | 2009-08-04 | 2011-02-17 | Disco Abrasive Syst Ltd | ウエーハの加工方法 |
JP5528904B2 (ja) | 2010-05-20 | 2014-06-25 | 株式会社ディスコ | サファイアウェーハの分割方法 |
JP5608521B2 (ja) | 2010-11-26 | 2014-10-15 | 新光電気工業株式会社 | 半導体ウエハの分割方法と半導体チップ及び半導体装置 |
JP6012186B2 (ja) * | 2012-01-31 | 2016-10-25 | 浜松ホトニクス株式会社 | 加工対象物切断方法 |
JP5946307B2 (ja) | 2012-03-28 | 2016-07-06 | 株式会社ディスコ | ウエーハの分割方法 |
JP5946308B2 (ja) * | 2012-03-28 | 2016-07-06 | 株式会社ディスコ | ウエーハの分割方法 |
JP6013858B2 (ja) * | 2012-10-01 | 2016-10-25 | 株式会社ディスコ | ウェーハの加工方法 |
JP6246561B2 (ja) * | 2013-11-01 | 2017-12-13 | 株式会社ディスコ | レーザー加工方法およびレーザー加工装置 |
JP6334223B2 (ja) * | 2014-03-26 | 2018-05-30 | リンテック株式会社 | 粘着シート |
JP2015207580A (ja) * | 2014-04-17 | 2015-11-19 | 凸版印刷株式会社 | 配線基板およびその製造方法 |
JP2015207604A (ja) * | 2014-04-17 | 2015-11-19 | 株式会社ディスコ | ウェーハの加工方法 |
JP2015211080A (ja) * | 2014-04-24 | 2015-11-24 | 日東電工株式会社 | 半導体装置の製造方法 |
JP6377428B2 (ja) | 2014-06-24 | 2018-08-22 | 株式会社ディスコ | ウエーハの加工方法およびレーザー加工装置 |
JP6305853B2 (ja) * | 2014-07-08 | 2018-04-04 | 株式会社ディスコ | ウエーハの加工方法 |
JP2016025282A (ja) | 2014-07-23 | 2016-02-08 | 株式会社ディスコ | パッケージ基板の加工方法 |
JP2016082162A (ja) * | 2014-10-21 | 2016-05-16 | 株式会社ディスコ | ウエーハの加工方法 |
JP2016134433A (ja) | 2015-01-16 | 2016-07-25 | 株式会社東芝 | ダイシング装置 |
JP6377514B2 (ja) | 2014-12-17 | 2018-08-22 | 株式会社ディスコ | パッケージ基板の加工方法 |
JP6494334B2 (ja) * | 2015-03-05 | 2019-04-03 | 株式会社ディスコ | デバイスチップの製造方法 |
JP6495056B2 (ja) | 2015-03-06 | 2019-04-03 | 株式会社ディスコ | 単結晶基板の加工方法 |
JP2016171214A (ja) * | 2015-03-12 | 2016-09-23 | 株式会社ディスコ | 単結晶基板の加工方法 |
JP2017152569A (ja) * | 2016-02-25 | 2017-08-31 | 株式会社ディスコ | ウエーハの加工方法 |
JP2018181902A (ja) * | 2017-04-04 | 2018-11-15 | 株式会社ディスコ | 加工方法 |
-
2017
- 2017-04-21 JP JP2017084705A patent/JP6821261B2/ja active Active
-
2018
- 2018-04-10 CN CN201810316110.7A patent/CN108735666B/zh active Active
- 2018-04-12 KR KR1020180042633A patent/KR102400418B1/ko active IP Right Grant
- 2018-04-19 US US15/957,369 patent/US10861712B2/en active Active
- 2018-04-19 TW TW107113285A patent/TWI743353B/zh active
Also Published As
Publication number | Publication date |
---|---|
TWI743353B (zh) | 2021-10-21 |
KR102400418B1 (ko) | 2022-05-19 |
CN108735666B (zh) | 2023-10-27 |
KR20180118527A (ko) | 2018-10-31 |
TW201838753A (zh) | 2018-11-01 |
JP2018182260A (ja) | 2018-11-15 |
US10861712B2 (en) | 2020-12-08 |
CN108735666A (zh) | 2018-11-02 |
US20180308711A1 (en) | 2018-10-25 |
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