JP5887901B2 - 半導体装置及び半導体装置の製造方法 - Google Patents
半導体装置及び半導体装置の製造方法 Download PDFInfo
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- JP5887901B2 JP5887901B2 JP2011272902A JP2011272902A JP5887901B2 JP 5887901 B2 JP5887901 B2 JP 5887901B2 JP 2011272902 A JP2011272902 A JP 2011272902A JP 2011272902 A JP2011272902 A JP 2011272902A JP 5887901 B2 JP5887901 B2 JP 5887901B2
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- implant
- cylindrical terminal
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- substrate
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- 239000004065 semiconductor Substances 0.000 title claims description 192
- 238000004519 manufacturing process Methods 0.000 title claims description 20
- 239000007943 implant Substances 0.000 claims description 204
- 239000000758 substrate Substances 0.000 claims description 128
- 239000000463 material Substances 0.000 claims description 49
- 230000002093 peripheral effect Effects 0.000 claims description 23
- 238000007747 plating Methods 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 13
- 238000005304 joining Methods 0.000 claims description 9
- 238000010438 heat treatment Methods 0.000 claims description 8
- 238000003825 pressing Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 97
- 229910052751 metal Inorganic materials 0.000 description 53
- 239000002184 metal Substances 0.000 description 53
- 229910000679 solder Inorganic materials 0.000 description 34
- 229920005989 resin Polymers 0.000 description 22
- 239000011347 resin Substances 0.000 description 22
- 238000001816 cooling Methods 0.000 description 14
- 238000007789 sealing Methods 0.000 description 10
- 239000010949 copper Substances 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 230000017525 heat dissipation Effects 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 238000005245 sintering Methods 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910007637 SnAg Inorganic materials 0.000 description 1
- 229910008433 SnCU Inorganic materials 0.000 description 1
- 229910006913 SnSb Inorganic materials 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000000191 radiation effect Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
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- H01L23/5226—Via connections in a multilevel interconnection structure
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Description
前記インプラントピンの他端に圧入された筒状端子を介して、前記インプラントピンが前記半導体搭載基板の半導体素子及び/又は回路パターンに接合され、
前記筒状端子に圧入された状態での前記インプラントピンと前記筒状端子との合計長さが、前記半導体搭載基板上の半導体素子及び/又は回路パターンと前記インプラント基板との距離に適合するように、前記インプラントピンの前記筒状端子への圧入深さが調整可能とされていることを特徴とする。
絶縁配線基板上に半導体素子が搭載された半導体搭載基板と、
プリント配線を有する絶縁基板に電気接続用のビアホールを設け、このビアホールにインプラントピンの一端を圧入してなるインプラント基板とを用い、
前記インプラント基板のインプラントピンの他端を、前記半導体搭載基板の半導体素子及び/又は回路パターンに接合することにより、前記半導体搭載基板の半導体素子を電気接続する半導体装置の製造方法において、
前記インプラントピンの他端に筒状端子を圧入し、その圧入深さを調整することによって、前記インプラントピンの長さを、前記半導体搭載基板上の半導体素子及び/又は回路パターンと、前記インプラント基板との距離に適合させ、前記筒状端子を介して前記インプラントピンを前記半導体搭載基板の半導体素子及び/又は回路パターンに接合することを特徴とする。
2:樹脂ケース
3:絶縁配線基板
4:絶縁基板
5、6:金属層
7a,7b,7c,7d,7e:はんだ又は焼結材層
8、8a,8b:半導体素子
9:外部端子
10:筒状端子
15:封止樹脂
20:インプラントピン
28:メッキ層
29:焼結材
30:インプラント基板
31:絶縁基板
32、33:金属層
34:絶縁配線基板
35:ビアホール
36:接合材
51:冷却板
52:樹脂ケース
53:絶縁基板
54,55:金属層
56:絶縁配線基板
58:半導体素子
59:外部端子
60:ボンディングワイヤ
61:封止樹脂
71:絶縁基板
72、73:金属層
74:ビアホール
75:絶縁配線基板
76:インプラントピン
79:インプラント基板
Claims (13)
- 絶縁配線基板上に半導体素子が搭載された半導体搭載基板と、
プリント配線を有する絶縁基板に電気接続用のビアホールを設け、このビアホールにインプラントピンの一端を圧入してなるインプラント基板とを備え、
前記インプラント基板のインプラントピンの他端を、前記半導体搭載基板の半導体素子及び/又は回路パターンに接合することにより、前記半導体搭載基板の半導体素子を電気接続した半導体装置において、
前記インプラントピンの他端に圧入された筒状端子を介して、前記インプラントピンが前記半導体搭載基板の半導体素子及び/又は回路パターンに接合され、
前記筒状端子に圧入された状態での前記インプラントピンと前記筒状端子との合計長さが、前記半導体搭載基板上の半導体素子及び/又は回路パターンと前記インプラント基板との距離に適合するように、前記インプラントピンの前記筒状端子への圧入深さが調整可能とされていることを特徴とする半導体装置。 - 前記インプラントピンの前記筒状端子への圧入部表面及び/又は前記筒状端子の内周面に設けられたメッキ層を介して、前記インプラントピンと前記筒状端子との接触部が接合されている請求項1に記載の半導体装置。
- 前記インプラントピンの前記筒状端子への圧入部表面及び/又は前記筒状端子の内周面に設けられた焼結材を介して、前記インプラントピンと前記筒状端子との接触部が接合されている請求項1に記載の半導体装置。
- 前記インプラントピンと前記筒状端子の内周面との接触部における、前記インプラントピンと直交する方向の断面において、前記インプラントピンが、前記筒状端子の内周に対し40%以上接触している請求項1〜3のいずれか1項に記載の半導体装置。
- 前記インプラントピンの前記筒状端子への圧入部には、絞り加工により外周に突出した突起部が設けられ、この突起部が前記筒状端子の内周面に接触している請求項1〜4のいずれか1項に記載の半導体装置。
- 前記圧入前の状態で、前記インプラントピンの圧入部の最大径から、前記筒状端子の内径を引いた値が、0〜0.25mmである請求項5に記載の半導体装置。
- 前記インプラントピンの圧入部には、絞り加工のないストレートな柱状部が設けられ、この柱状部の少なくとも一部が前記筒状端子の内周面に接触している請求項1〜4のいずれか1項に記載の半導体装置。
- 前記圧入前の状態で、前記インプラントピンの圧入部の最大径から、前記筒状端子の内径を引いた値が、0〜0.15mmである請求項7に記載の半導体装置。
- 前記インプラントピンの前記筒状端子側の先端は、先端に向かってテーパ状に縮径している請求項1〜8のいずれか1項に記載の半導体装置。
- 前記筒状端子の内周が、前記インプラントピンの圧入部に適合する形状をなしている請求項1〜9のいずれか1つに記載の半導体装置。
- 絶縁配線基板上に半導体素子が搭載された半導体搭載基板と、
プリント配線を有する絶縁基板に電気接続用のビアホールを設け、このビアホールにインプラントピンの一端を圧入してなるインプラント基板とを用い、
前記インプラント基板のインプラントピンの他端を、前記半導体搭載基板の半導体素子及び/又は回路パターンに接合することにより、前記半導体搭載基板の半導体素子を電気接続する半導体装置の製造方法において、
前記インプラントピンの他端に筒状端子を圧入し、その圧入深さを調整することによって、前記インプラントピンの長さを、前記半導体搭載基板上の半導体素子及び/又は回路パターンと、前記インプラント基板との距離に適合させ、前記筒状端子を介して前記インプラントピンを前記半導体搭載基板の半導体素子及び/又は回路パターンに接合することを特徴とする半導体装置の製造方法。 - 前記インプラントピンの前記筒状端子への圧入部表面及び/又は前記筒状端子の内周面に、メッキ層を形成しておき、前記インプラント基板のインプラントピンの他端を、前記筒状端子を介して前記半導体搭載基板の半導体素子及び/又は回路パターンに当接させ、その状態でリフロー炉に入れて加熱することにより、前記半導体素子と前記絶縁配線基板との接続、前記インプラントピンの筒状端子と半導体搭載基板の半導体素子及び/又は回路パターンとの接続を行うと共に、前記メッキ層を溶融させて前記インプラントピンと前記筒状端子とを接続する請求項11に記載の半導体装置の製造方法。
- 前記インプラントピンの前記筒状端子への圧入部表面及び/又は前記筒状端子の内周面に、焼結材を塗布しておき、前記インプラント基板のインプラントピンの他端を、前記筒状端子を介して前記半導体搭載基板の半導体素子及び/又は回路パターンに当接させ、その状態でリフロー炉に入れて加熱することにより、前記半導体素子と前記絶縁配線基板との接続、前記インプラントピンの筒状端子と半導体搭載基板の半導体素子及び/又は回路パターンとの接続を行うと共に、前記焼結材を焼結させて前記インプラントピンと前記筒状端子とを接続する請求項11に記載の半導体装置の製造方法。
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